stats.txt revision 11308:7d8836fd043d
1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.000014 # Number of seconds simulated 4sim_ticks 14181 # Number of ticks simulated 5final_tick 14181 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000 # Frequency of simulated ticks 7host_tick_rate 88786 # Simulator tick rate (ticks/s) 8host_mem_usage 463996 # Number of bytes of host memory used 9host_seconds 0.16 # Real time elapsed on the host 10system.voltage_domain.voltage 1 # Voltage in Volts 11system.clk_domain.clock 1 # Clock period in ticks 12system.mem_ctrls.bytes_read::dir_cntrl0 16576 # Number of bytes read from this memory 13system.mem_ctrls.bytes_read::total 16576 # Number of bytes read from this memory 14system.mem_ctrls.bytes_written::dir_cntrl0 576 # Number of bytes written to this memory 15system.mem_ctrls.bytes_written::total 576 # Number of bytes written to this memory 16system.mem_ctrls.num_reads::dir_cntrl0 259 # Number of read requests responded to by this memory 17system.mem_ctrls.num_reads::total 259 # Number of read requests responded to by this memory 18system.mem_ctrls.num_writes::dir_cntrl0 9 # Number of write requests responded to by this memory 19system.mem_ctrls.num_writes::total 9 # Number of write requests responded to by this memory 20system.mem_ctrls.bw_read::dir_cntrl0 1168887949 # Total read bandwidth from this memory (bytes/s) 21system.mem_ctrls.bw_read::total 1168887949 # Total read bandwidth from this memory (bytes/s) 22system.mem_ctrls.bw_write::dir_cntrl0 40617728 # Write bandwidth from this memory (bytes/s) 23system.mem_ctrls.bw_write::total 40617728 # Write bandwidth from this memory (bytes/s) 24system.mem_ctrls.bw_total::dir_cntrl0 1209505677 # Total bandwidth to/from this memory (bytes/s) 25system.mem_ctrls.bw_total::total 1209505677 # Total bandwidth to/from this memory (bytes/s) 26system.mem_ctrls.readReqs 259 # Number of read requests accepted 27system.mem_ctrls.writeReqs 9 # Number of write requests accepted 28system.mem_ctrls.readBursts 259 # Number of DRAM read bursts, including those serviced by the write queue 29system.mem_ctrls.writeBursts 9 # Number of DRAM write bursts, including those merged in the write queue 30system.mem_ctrls.bytesReadDRAM 15936 # Total number of bytes read from DRAM 31system.mem_ctrls.bytesReadWrQ 640 # Total number of bytes read from write queue 32system.mem_ctrls.bytesWritten 0 # Total number of bytes written to DRAM 33system.mem_ctrls.bytesReadSys 16576 # Total read bytes from the system interface side 34system.mem_ctrls.bytesWrittenSys 576 # Total written bytes from the system interface side 35system.mem_ctrls.servicedByWrQ 10 # Number of DRAM read bursts serviced by the write queue 36system.mem_ctrls.mergedWrBursts 0 # Number of DRAM write bursts merged with an existing one 37system.mem_ctrls.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write 38system.mem_ctrls.perBankRdBursts::0 100 # Per bank write bursts 39system.mem_ctrls.perBankRdBursts::1 71 # Per bank write bursts 40system.mem_ctrls.perBankRdBursts::2 66 # Per bank write bursts 41system.mem_ctrls.perBankRdBursts::3 12 # Per bank write bursts 42system.mem_ctrls.perBankRdBursts::4 0 # Per bank write bursts 43system.mem_ctrls.perBankRdBursts::5 0 # Per bank write bursts 44system.mem_ctrls.perBankRdBursts::6 0 # Per bank write bursts 45system.mem_ctrls.perBankRdBursts::7 0 # Per bank write bursts 46system.mem_ctrls.perBankRdBursts::8 0 # Per bank write bursts 47system.mem_ctrls.perBankRdBursts::9 0 # Per bank write bursts 48system.mem_ctrls.perBankRdBursts::10 0 # Per bank write bursts 49system.mem_ctrls.perBankRdBursts::11 0 # Per bank write bursts 50system.mem_ctrls.perBankRdBursts::12 0 # Per bank write bursts 51system.mem_ctrls.perBankRdBursts::13 0 # Per bank write bursts 52system.mem_ctrls.perBankRdBursts::14 0 # Per bank write bursts 53system.mem_ctrls.perBankRdBursts::15 0 # Per bank write bursts 54system.mem_ctrls.perBankWrBursts::0 0 # Per bank write bursts 55system.mem_ctrls.perBankWrBursts::1 0 # Per bank write bursts 56system.mem_ctrls.perBankWrBursts::2 0 # Per bank write bursts 57system.mem_ctrls.perBankWrBursts::3 0 # Per bank write bursts 58system.mem_ctrls.perBankWrBursts::4 0 # Per bank write bursts 59system.mem_ctrls.perBankWrBursts::5 0 # Per bank write bursts 60system.mem_ctrls.perBankWrBursts::6 0 # Per bank write bursts 61system.mem_ctrls.perBankWrBursts::7 0 # Per bank write bursts 62system.mem_ctrls.perBankWrBursts::8 0 # Per bank write bursts 63system.mem_ctrls.perBankWrBursts::9 0 # Per bank write bursts 64system.mem_ctrls.perBankWrBursts::10 0 # Per bank write bursts 65system.mem_ctrls.perBankWrBursts::11 0 # Per bank write bursts 66system.mem_ctrls.perBankWrBursts::12 0 # Per bank write bursts 67system.mem_ctrls.perBankWrBursts::13 0 # Per bank write bursts 68system.mem_ctrls.perBankWrBursts::14 0 # Per bank write bursts 69system.mem_ctrls.perBankWrBursts::15 0 # Per bank write bursts 70system.mem_ctrls.numRdRetry 0 # Number of times read queue was full causing retry 71system.mem_ctrls.numWrRetry 0 # Number of times write queue was full causing retry 72system.mem_ctrls.totGap 13941 # Total gap between requests 73system.mem_ctrls.readPktSize::0 0 # Read request sizes (log2) 74system.mem_ctrls.readPktSize::1 0 # Read request sizes (log2) 75system.mem_ctrls.readPktSize::2 0 # Read request sizes (log2) 76system.mem_ctrls.readPktSize::3 0 # Read request sizes (log2) 77system.mem_ctrls.readPktSize::4 0 # Read request sizes (log2) 78system.mem_ctrls.readPktSize::5 0 # Read request sizes (log2) 79system.mem_ctrls.readPktSize::6 259 # Read request sizes (log2) 80system.mem_ctrls.writePktSize::0 0 # Write request sizes (log2) 81system.mem_ctrls.writePktSize::1 0 # Write request sizes (log2) 82system.mem_ctrls.writePktSize::2 0 # Write request sizes (log2) 83system.mem_ctrls.writePktSize::3 0 # Write request sizes (log2) 84system.mem_ctrls.writePktSize::4 0 # Write request sizes (log2) 85system.mem_ctrls.writePktSize::5 0 # Write request sizes (log2) 86system.mem_ctrls.writePktSize::6 9 # Write request sizes (log2) 87system.mem_ctrls.rdQLenPdf::0 214 # What read queue length does an incoming req see 88system.mem_ctrls.rdQLenPdf::1 27 # What read queue length does an incoming req see 89system.mem_ctrls.rdQLenPdf::2 7 # What read queue length does an incoming req see 90system.mem_ctrls.rdQLenPdf::3 1 # What read queue length does an incoming req see 91system.mem_ctrls.rdQLenPdf::4 0 # What read queue length does an incoming req see 92system.mem_ctrls.rdQLenPdf::5 0 # What read queue length does an incoming req see 93system.mem_ctrls.rdQLenPdf::6 0 # What read queue length does an incoming req see 94system.mem_ctrls.rdQLenPdf::7 0 # What read queue length does an incoming req see 95system.mem_ctrls.rdQLenPdf::8 0 # What read queue length does an incoming req see 96system.mem_ctrls.rdQLenPdf::9 0 # What read queue length does an incoming req see 97system.mem_ctrls.rdQLenPdf::10 0 # What read queue length does an incoming req see 98system.mem_ctrls.rdQLenPdf::11 0 # What read queue length does an incoming req see 99system.mem_ctrls.rdQLenPdf::12 0 # What read queue length does an incoming req see 100system.mem_ctrls.rdQLenPdf::13 0 # What read queue length does an incoming req see 101system.mem_ctrls.rdQLenPdf::14 0 # What read queue length does an incoming req see 102system.mem_ctrls.rdQLenPdf::15 0 # What read queue length does an incoming req see 103system.mem_ctrls.rdQLenPdf::16 0 # What read queue length does an incoming req see 104system.mem_ctrls.rdQLenPdf::17 0 # What read queue length does an incoming req see 105system.mem_ctrls.rdQLenPdf::18 0 # What read queue length does an incoming req see 106system.mem_ctrls.rdQLenPdf::19 0 # What read queue length does an incoming req see 107system.mem_ctrls.rdQLenPdf::20 0 # What read queue length does an incoming req see 108system.mem_ctrls.rdQLenPdf::21 0 # What read queue length does an incoming req see 109system.mem_ctrls.rdQLenPdf::22 0 # What read queue length does an incoming req see 110system.mem_ctrls.rdQLenPdf::23 0 # What read queue length does an incoming req see 111system.mem_ctrls.rdQLenPdf::24 0 # What read queue length does an incoming req see 112system.mem_ctrls.rdQLenPdf::25 0 # What read queue length does an incoming req see 113system.mem_ctrls.rdQLenPdf::26 0 # What read queue length does an incoming req see 114system.mem_ctrls.rdQLenPdf::27 0 # What read queue length does an incoming req see 115system.mem_ctrls.rdQLenPdf::28 0 # What read queue length does an incoming req see 116system.mem_ctrls.rdQLenPdf::29 0 # What read queue length does an incoming req see 117system.mem_ctrls.rdQLenPdf::30 0 # What read queue length does an incoming req see 118system.mem_ctrls.rdQLenPdf::31 0 # What read queue length does an incoming req see 119system.mem_ctrls.wrQLenPdf::0 1 # What write queue length does an incoming req see 120system.mem_ctrls.wrQLenPdf::1 1 # What write queue length does an incoming req see 121system.mem_ctrls.wrQLenPdf::2 1 # What write queue length does an incoming req see 122system.mem_ctrls.wrQLenPdf::3 1 # What write queue length does an incoming req see 123system.mem_ctrls.wrQLenPdf::4 1 # What write queue length does an incoming req see 124system.mem_ctrls.wrQLenPdf::5 1 # What write queue length does an incoming req see 125system.mem_ctrls.wrQLenPdf::6 1 # What write queue length does an incoming req see 126system.mem_ctrls.wrQLenPdf::7 1 # What write queue length does an incoming req see 127system.mem_ctrls.wrQLenPdf::8 1 # What write queue length does an incoming req see 128system.mem_ctrls.wrQLenPdf::9 0 # What write queue length does an incoming req see 129system.mem_ctrls.wrQLenPdf::10 0 # What write queue length does an incoming req see 130system.mem_ctrls.wrQLenPdf::11 0 # What write queue length does an incoming req see 131system.mem_ctrls.wrQLenPdf::12 0 # What write queue length does an incoming req see 132system.mem_ctrls.wrQLenPdf::13 0 # What write queue length does an incoming req see 133system.mem_ctrls.wrQLenPdf::14 0 # What write queue length does an incoming req see 134system.mem_ctrls.wrQLenPdf::15 0 # What write queue length does an incoming req see 135system.mem_ctrls.wrQLenPdf::16 0 # What write queue length does an incoming req see 136system.mem_ctrls.wrQLenPdf::17 0 # What write queue length does an incoming req see 137system.mem_ctrls.wrQLenPdf::18 0 # What write queue length does an incoming req see 138system.mem_ctrls.wrQLenPdf::19 0 # What write queue length does an incoming req see 139system.mem_ctrls.wrQLenPdf::20 0 # What write queue length does an incoming req see 140system.mem_ctrls.wrQLenPdf::21 0 # What write queue length does an incoming req see 141system.mem_ctrls.wrQLenPdf::22 0 # What write queue length does an incoming req see 142system.mem_ctrls.wrQLenPdf::23 0 # What write queue length does an incoming req see 143system.mem_ctrls.wrQLenPdf::24 0 # What write queue length does an incoming req see 144system.mem_ctrls.wrQLenPdf::25 0 # What write queue length does an incoming req see 145system.mem_ctrls.wrQLenPdf::26 0 # What write queue length does an incoming req see 146system.mem_ctrls.wrQLenPdf::27 0 # What write queue length does an incoming req see 147system.mem_ctrls.wrQLenPdf::28 0 # What write queue length does an incoming req see 148system.mem_ctrls.wrQLenPdf::29 0 # What write queue length does an incoming req see 149system.mem_ctrls.wrQLenPdf::30 0 # What write queue length does an incoming req see 150system.mem_ctrls.wrQLenPdf::31 0 # What write queue length does an incoming req see 151system.mem_ctrls.wrQLenPdf::32 0 # What write queue length does an incoming req see 152system.mem_ctrls.wrQLenPdf::33 0 # What write queue length does an incoming req see 153system.mem_ctrls.wrQLenPdf::34 0 # What write queue length does an incoming req see 154system.mem_ctrls.wrQLenPdf::35 0 # What write queue length does an incoming req see 155system.mem_ctrls.wrQLenPdf::36 0 # What write queue length does an incoming req see 156system.mem_ctrls.wrQLenPdf::37 0 # What write queue length does an incoming req see 157system.mem_ctrls.wrQLenPdf::38 0 # What write queue length does an incoming req see 158system.mem_ctrls.wrQLenPdf::39 0 # What write queue length does an incoming req see 159system.mem_ctrls.wrQLenPdf::40 0 # What write queue length does an incoming req see 160system.mem_ctrls.wrQLenPdf::41 0 # What write queue length does an incoming req see 161system.mem_ctrls.wrQLenPdf::42 0 # What write queue length does an incoming req see 162system.mem_ctrls.wrQLenPdf::43 0 # What write queue length does an incoming req see 163system.mem_ctrls.wrQLenPdf::44 0 # What write queue length does an incoming req see 164system.mem_ctrls.wrQLenPdf::45 0 # What write queue length does an incoming req see 165system.mem_ctrls.wrQLenPdf::46 0 # What write queue length does an incoming req see 166system.mem_ctrls.wrQLenPdf::47 0 # What write queue length does an incoming req see 167system.mem_ctrls.wrQLenPdf::48 0 # What write queue length does an incoming req see 168system.mem_ctrls.wrQLenPdf::49 0 # What write queue length does an incoming req see 169system.mem_ctrls.wrQLenPdf::50 0 # What write queue length does an incoming req see 170system.mem_ctrls.wrQLenPdf::51 0 # What write queue length does an incoming req see 171system.mem_ctrls.wrQLenPdf::52 0 # What write queue length does an incoming req see 172system.mem_ctrls.wrQLenPdf::53 0 # What write queue length does an incoming req see 173system.mem_ctrls.wrQLenPdf::54 0 # What write queue length does an incoming req see 174system.mem_ctrls.wrQLenPdf::55 0 # What write queue length does an incoming req see 175system.mem_ctrls.wrQLenPdf::56 0 # What write queue length does an incoming req see 176system.mem_ctrls.wrQLenPdf::57 0 # What write queue length does an incoming req see 177system.mem_ctrls.wrQLenPdf::58 0 # What write queue length does an incoming req see 178system.mem_ctrls.wrQLenPdf::59 0 # What write queue length does an incoming req see 179system.mem_ctrls.wrQLenPdf::60 0 # What write queue length does an incoming req see 180system.mem_ctrls.wrQLenPdf::61 0 # What write queue length does an incoming req see 181system.mem_ctrls.wrQLenPdf::62 0 # What write queue length does an incoming req see 182system.mem_ctrls.wrQLenPdf::63 0 # What write queue length does an incoming req see 183system.mem_ctrls.bytesPerActivate::samples 15 # Bytes accessed per row activation 184system.mem_ctrls.bytesPerActivate::mean 913.066667 # Bytes accessed per row activation 185system.mem_ctrls.bytesPerActivate::gmean 883.543279 # Bytes accessed per row activation 186system.mem_ctrls.bytesPerActivate::stdev 210.139908 # Bytes accessed per row activation 187system.mem_ctrls.bytesPerActivate::512-639 3 20.00% 20.00% # Bytes accessed per row activation 188system.mem_ctrls.bytesPerActivate::896-1023 1 6.67% 26.67% # Bytes accessed per row activation 189system.mem_ctrls.bytesPerActivate::1024-1151 11 73.33% 100.00% # Bytes accessed per row activation 190system.mem_ctrls.bytesPerActivate::total 15 # Bytes accessed per row activation 191system.mem_ctrls.totQLat 973 # Total ticks spent queuing 192system.mem_ctrls.totMemAccLat 5704 # Total ticks spent from burst creation until serviced by the DRAM 193system.mem_ctrls.totBusLat 1245 # Total ticks spent in databus transfers 194system.mem_ctrls.avgQLat 3.91 # Average queueing delay per DRAM burst 195system.mem_ctrls.avgBusLat 5.00 # Average bus latency per DRAM burst 196system.mem_ctrls.avgMemAccLat 22.91 # Average memory access latency per DRAM burst 197system.mem_ctrls.avgRdBW 1123.76 # Average DRAM read bandwidth in MiByte/s 198system.mem_ctrls.avgWrBW 0.00 # Average achieved write bandwidth in MiByte/s 199system.mem_ctrls.avgRdBWSys 1168.89 # Average system read bandwidth in MiByte/s 200system.mem_ctrls.avgWrBWSys 40.62 # Average system write bandwidth in MiByte/s 201system.mem_ctrls.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s 202system.mem_ctrls.busUtil 8.78 # Data bus utilization in percentage 203system.mem_ctrls.busUtilRead 8.78 # Data bus utilization in percentage for reads 204system.mem_ctrls.busUtilWrite 0.00 # Data bus utilization in percentage for writes 205system.mem_ctrls.avgRdQLen 1.17 # Average read queue length when enqueuing 206system.mem_ctrls.avgWrQLen 2.63 # Average write queue length when enqueuing 207system.mem_ctrls.readRowHits 230 # Number of row buffer hits during reads 208system.mem_ctrls.writeRowHits 0 # Number of row buffer hits during writes 209system.mem_ctrls.readRowHitRate 92.37 # Row buffer hit rate for reads 210system.mem_ctrls.writeRowHitRate 0.00 # Row buffer hit rate for writes 211system.mem_ctrls.avgGap 52.02 # Average gap between requests 212system.mem_ctrls.pageHitRate 89.15 # Row buffer hit rate, read and write combined 213system.mem_ctrls_0.actEnergy 83160 # Energy for activate commands per rank (pJ) 214system.mem_ctrls_0.preEnergy 46200 # Energy for precharge commands per rank (pJ) 215system.mem_ctrls_0.readEnergy 1872000 # Energy for read commands per rank (pJ) 216system.mem_ctrls_0.writeEnergy 0 # Energy for write commands per rank (pJ) 217system.mem_ctrls_0.refreshEnergy 508560 # Energy for refresh commands per rank (pJ) 218system.mem_ctrls_0.actBackEnergy 5437116 # Energy for active background per rank (pJ) 219system.mem_ctrls_0.preBackEnergy 58200 # Energy for precharge background per rank (pJ) 220system.mem_ctrls_0.totalEnergy 8005236 # Total energy per rank (pJ) 221system.mem_ctrls_0.averagePower 994.933632 # Core power per rank (mW) 222system.mem_ctrls_0.memoryStateTime::IDLE 83 # Time in different power states 223system.mem_ctrls_0.memoryStateTime::REF 260 # Time in different power states 224system.mem_ctrls_0.memoryStateTime::PRE_PDN 0 # Time in different power states 225system.mem_ctrls_0.memoryStateTime::ACT 7717 # Time in different power states 226system.mem_ctrls_0.memoryStateTime::ACT_PDN 0 # Time in different power states 227system.mem_ctrls_1.actEnergy 0 # Energy for activate commands per rank (pJ) 228system.mem_ctrls_1.preEnergy 0 # Energy for precharge commands per rank (pJ) 229system.mem_ctrls_1.readEnergy 0 # Energy for read commands per rank (pJ) 230system.mem_ctrls_1.writeEnergy 0 # Energy for write commands per rank (pJ) 231system.mem_ctrls_1.refreshEnergy 508560 # Energy for refresh commands per rank (pJ) 232system.mem_ctrls_1.actBackEnergy 168264 # Energy for active background per rank (pJ) 233system.mem_ctrls_1.preBackEnergy 4671600 # Energy for precharge background per rank (pJ) 234system.mem_ctrls_1.totalEnergy 5348424 # Total energy per rank (pJ) 235system.mem_ctrls_1.averagePower 665.889442 # Core power per rank (mW) 236system.mem_ctrls_1.memoryStateTime::IDLE 7786 # Time in different power states 237system.mem_ctrls_1.memoryStateTime::REF 260 # Time in different power states 238system.mem_ctrls_1.memoryStateTime::PRE_PDN 0 # Time in different power states 239system.mem_ctrls_1.memoryStateTime::ACT 0 # Time in different power states 240system.mem_ctrls_1.memoryStateTime::ACT_PDN 0 # Time in different power states 241system.ruby.clk_domain.clock 1 # Clock period in ticks 242system.ruby.outstanding_req_hist::bucket_size 2 243system.ruby.outstanding_req_hist::max_bucket 19 244system.ruby.outstanding_req_hist::samples 63 245system.ruby.outstanding_req_hist::mean 12.920635 246system.ruby.outstanding_req_hist::gmean 11.694862 247system.ruby.outstanding_req_hist::stdev 4.228557 248system.ruby.outstanding_req_hist | 1 1.59% 1.59% | 2 3.17% 4.76% | 2 3.17% 7.94% | 5 7.94% 15.87% | 4 6.35% 22.22% | 3 4.76% 26.98% | 5 7.94% 34.92% | 14 22.22% 57.14% | 27 42.86% 100.00% | 0 0.00% 100.00% 249system.ruby.outstanding_req_hist::total 63 250system.ruby.latency_hist::bucket_size 1024 251system.ruby.latency_hist::max_bucket 10239 252system.ruby.latency_hist::samples 48 253system.ruby.latency_hist::mean 3351.354167 254system.ruby.latency_hist::gmean 1865.352879 255system.ruby.latency_hist::stdev 1934.275107 256system.ruby.latency_hist | 11 22.92% 22.92% | 3 6.25% 29.17% | 3 6.25% 35.42% | 7 14.58% 50.00% | 18 37.50% 87.50% | 6 12.50% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 257system.ruby.latency_hist::total 48 258system.ruby.hit_latency_hist::bucket_size 1024 259system.ruby.hit_latency_hist::max_bucket 10239 260system.ruby.hit_latency_hist::samples 42 261system.ruby.hit_latency_hist::mean 3684.428571 262system.ruby.hit_latency_hist::gmean 2778.454716 263system.ruby.hit_latency_hist::stdev 1783.107224 264system.ruby.hit_latency_hist | 7 16.67% 16.67% | 3 7.14% 23.81% | 1 2.38% 26.19% | 7 16.67% 42.86% | 18 42.86% 85.71% | 6 14.29% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 265system.ruby.hit_latency_hist::total 42 266system.ruby.miss_latency_hist::bucket_size 512 267system.ruby.miss_latency_hist::max_bucket 5119 268system.ruby.miss_latency_hist::samples 6 269system.ruby.miss_latency_hist::mean 1019.833333 270system.ruby.miss_latency_hist::gmean 114.673945 271system.ruby.miss_latency_hist::stdev 1281.644790 272system.ruby.miss_latency_hist | 3 50.00% 50.00% | 1 16.67% 66.67% | 0 0.00% 66.67% | 0 0.00% 66.67% | 0 0.00% 66.67% | 2 33.33% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 273system.ruby.miss_latency_hist::total 6 274system.ruby.L1Cache.incomplete_times 6 275system.cp_cntrl0.L1D0cache.demand_hits 0 # Number of cache demand hits 276system.cp_cntrl0.L1D0cache.demand_misses 45 # Number of cache demand misses 277system.cp_cntrl0.L1D0cache.demand_accesses 45 # Number of cache demand accesses 278system.cp_cntrl0.L1D0cache.num_data_array_writes 43 # number of data array writes 279system.cp_cntrl0.L1D0cache.num_tag_array_reads 154 # number of tag array reads 280system.cp_cntrl0.L1D0cache.num_tag_array_writes 41 # number of tag array writes 281system.cp_cntrl0.L1D1cache.demand_hits 0 # Number of cache demand hits 282system.cp_cntrl0.L1D1cache.demand_misses 43 # Number of cache demand misses 283system.cp_cntrl0.L1D1cache.demand_accesses 43 # Number of cache demand accesses 284system.cp_cntrl0.L1D1cache.num_data_array_writes 41 # number of data array writes 285system.cp_cntrl0.L1D1cache.num_tag_array_reads 73 # number of tag array reads 286system.cp_cntrl0.L1D1cache.num_tag_array_writes 41 # number of tag array writes 287system.cp_cntrl0.L1Icache.demand_hits 0 # Number of cache demand hits 288system.cp_cntrl0.L1Icache.demand_misses 3 # Number of cache demand misses 289system.cp_cntrl0.L1Icache.demand_accesses 3 # Number of cache demand accesses 290system.cp_cntrl0.L1Icache.num_tag_array_reads 3 # number of tag array reads 291system.cp_cntrl0.L2cache.demand_hits 0 # Number of cache demand hits 292system.cp_cntrl0.L2cache.demand_misses 91 # Number of cache demand misses 293system.cp_cntrl0.L2cache.demand_accesses 91 # Number of cache demand accesses 294system.cp_cntrl0.L2cache.num_data_array_reads 81 # number of data array reads 295system.cp_cntrl0.L2cache.num_data_array_writes 84 # number of data array writes 296system.cp_cntrl0.L2cache.num_tag_array_reads 380 # number of tag array reads 297system.cp_cntrl0.L2cache.num_tag_array_writes 371 # number of tag array writes 298system.cp_cntrl0.sequencer.store_waiting_on_load 2 # Number of times a store aliased with a pending load 299system.cp_cntrl0.sequencer.store_waiting_on_store 3 # Number of times a store aliased with a pending store 300system.cp_cntrl0.sequencer1.store_waiting_on_load 1 # Number of times a store aliased with a pending load 301system.cp_cntrl0.sequencer1.store_waiting_on_store 4 # Number of times a store aliased with a pending store 302system.cp_cntrl0.fully_busy_cycles 2 # cycles for which number of transistions == max transitions 303system.dir_cntrl0.L3CacheMemory.demand_hits 0 # Number of cache demand hits 304system.dir_cntrl0.L3CacheMemory.demand_misses 0 # Number of cache demand misses 305system.dir_cntrl0.L3CacheMemory.demand_accesses 0 # Number of cache demand accesses 306system.dir_cntrl0.L3CacheMemory.num_data_array_writes 374 # number of data array writes 307system.dir_cntrl0.L3CacheMemory.num_tag_array_reads 378 # number of tag array reads 308system.dir_cntrl0.L3CacheMemory.num_tag_array_writes 378 # number of tag array writes 309system.dir_cntrl0.L3CacheMemory.num_tag_array_stalls 10169 # number of stalls caused by tag array 310system.dir_cntrl0.L3CacheMemory.num_data_array_stalls 5502 # number of stalls caused by data array 311system.ruby.network.ext_links00.int_node.percent_links_utilized 0.199210 312system.ruby.network.ext_links00.int_node.msg_count.Control::0 308 313system.ruby.network.ext_links00.int_node.msg_count.Request_Control::0 385 314system.ruby.network.ext_links00.int_node.msg_count.Response_Data::2 393 315system.ruby.network.ext_links00.int_node.msg_count.Response_Control::2 227 316system.ruby.network.ext_links00.int_node.msg_count.Writeback_Data::2 66 317system.ruby.network.ext_links00.int_node.msg_count.Writeback_Control::2 70 318system.ruby.network.ext_links00.int_node.msg_count.Unblock_Control::4 303 319system.ruby.network.ext_links00.int_node.msg_bytes.Control::0 2464 320system.ruby.network.ext_links00.int_node.msg_bytes.Request_Control::0 3080 321system.ruby.network.ext_links00.int_node.msg_bytes.Response_Data::2 28296 322system.ruby.network.ext_links00.int_node.msg_bytes.Response_Control::2 1816 323system.ruby.network.ext_links00.int_node.msg_bytes.Writeback_Data::2 4752 324system.ruby.network.ext_links00.int_node.msg_bytes.Writeback_Control::2 560 325system.ruby.network.ext_links00.int_node.msg_bytes.Unblock_Control::4 2424 326system.ruby.network.ext_links01.int_node.percent_links_utilized 0.120981 327system.ruby.network.ext_links01.int_node.msg_count.Control::0 227 328system.ruby.network.ext_links01.int_node.msg_count.Request_Control::0 153 329system.ruby.network.ext_links01.int_node.msg_count.Response_Data::2 95 330system.ruby.network.ext_links01.int_node.msg_count.Response_Control::2 217 331system.ruby.network.ext_links01.int_node.msg_count.Writeback_Data::2 66 332system.ruby.network.ext_links01.int_node.msg_count.Writeback_Control::2 70 333system.ruby.network.ext_links01.int_node.msg_count.Unblock_Control::4 80 334system.ruby.network.ext_links01.int_node.msg_bytes.Control::0 1816 335system.ruby.network.ext_links01.int_node.msg_bytes.Request_Control::0 1224 336system.ruby.network.ext_links01.int_node.msg_bytes.Response_Data::2 6840 337system.ruby.network.ext_links01.int_node.msg_bytes.Response_Control::2 1736 338system.ruby.network.ext_links01.int_node.msg_bytes.Writeback_Data::2 4752 339system.ruby.network.ext_links01.int_node.msg_bytes.Writeback_Control::2 560 340system.ruby.network.ext_links01.int_node.msg_bytes.Unblock_Control::4 640 341system.tcp_cntrl0.L1cache.demand_hits 0 # Number of cache demand hits 342system.tcp_cntrl0.L1cache.demand_misses 0 # Number of cache demand misses 343system.tcp_cntrl0.L1cache.demand_accesses 0 # Number of cache demand accesses 344system.tcp_cntrl0.L1cache.num_data_array_reads 14 # number of data array reads 345system.tcp_cntrl0.L1cache.num_data_array_writes 116 # number of data array writes 346system.tcp_cntrl0.L1cache.num_tag_array_reads 314 # number of tag array reads 347system.tcp_cntrl0.L1cache.num_tag_array_writes 305 # number of tag array writes 348system.tcp_cntrl0.L1cache.num_tag_array_stalls 38 # number of stalls caused by tag array 349system.tcp_cntrl0.coalescer.gpu_tcp_ld_hits 0 # loads that hit in the TCP 350system.tcp_cntrl0.coalescer.gpu_tcp_ld_transfers 5 # TCP to TCP load transfers 351system.tcp_cntrl0.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC 352system.tcp_cntrl0.coalescer.gpu_ld_misses 0 # loads that miss in the GPU 353system.tcp_cntrl0.coalescer.gpu_tcp_st_hits 9 # stores that hit in the TCP 354system.tcp_cntrl0.coalescer.gpu_tcp_st_transfers 79 # TCP to TCP store transfers 355system.tcp_cntrl0.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC 356system.tcp_cntrl0.coalescer.gpu_st_misses 21 # stores that miss in the GPU 357system.tcp_cntrl0.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP 358system.tcp_cntrl0.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers 359system.tcp_cntrl0.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC 360system.tcp_cntrl0.coalescer.cp_ld_misses 0 # loads that miss in the GPU 361system.tcp_cntrl0.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP 362system.tcp_cntrl0.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers 363system.tcp_cntrl0.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC 364system.tcp_cntrl0.coalescer.cp_st_misses 0 # stores that miss in the GPU 365system.ruby.network.ext_links02.int_node.percent_links_utilized 0.173894 366system.ruby.network.ext_links02.int_node.msg_count.Control::0 81 367system.ruby.network.ext_links02.int_node.msg_count.Control::1 814 368system.ruby.network.ext_links02.int_node.msg_count.Request_Control::0 232 369system.ruby.network.ext_links02.int_node.msg_count.Request_Control::1 846 370system.ruby.network.ext_links02.int_node.msg_count.Response_Data::2 298 371system.ruby.network.ext_links02.int_node.msg_count.Response_Data::3 1644 372system.ruby.network.ext_links02.int_node.msg_count.Response_Control::2 10 373system.ruby.network.ext_links02.int_node.msg_count.Response_Control::3 2 374system.ruby.network.ext_links02.int_node.msg_count.Unblock_Control::4 223 375system.ruby.network.ext_links02.int_node.msg_count.Unblock_Control::5 831 376system.ruby.network.ext_links02.int_node.msg_bytes.Control::0 648 377system.ruby.network.ext_links02.int_node.msg_bytes.Control::1 6512 378system.ruby.network.ext_links02.int_node.msg_bytes.Request_Control::0 1856 379system.ruby.network.ext_links02.int_node.msg_bytes.Request_Control::1 6768 380system.ruby.network.ext_links02.int_node.msg_bytes.Response_Data::2 21456 381system.ruby.network.ext_links02.int_node.msg_bytes.Response_Data::3 118368 382system.ruby.network.ext_links02.int_node.msg_bytes.Response_Control::2 80 383system.ruby.network.ext_links02.int_node.msg_bytes.Response_Control::3 16 384system.ruby.network.ext_links02.int_node.msg_bytes.Unblock_Control::4 1784 385system.ruby.network.ext_links02.int_node.msg_bytes.Unblock_Control::5 6648 386system.tcp_cntrl1.L1cache.demand_hits 0 # Number of cache demand hits 387system.tcp_cntrl1.L1cache.demand_misses 0 # Number of cache demand misses 388system.tcp_cntrl1.L1cache.demand_accesses 0 # Number of cache demand accesses 389system.tcp_cntrl1.L1cache.num_data_array_reads 10 # number of data array reads 390system.tcp_cntrl1.L1cache.num_data_array_writes 108 # number of data array writes 391system.tcp_cntrl1.L1cache.num_tag_array_reads 300 # number of tag array reads 392system.tcp_cntrl1.L1cache.num_tag_array_writes 289 # number of tag array writes 393system.tcp_cntrl1.L1cache.num_tag_array_stalls 44 # number of stalls caused by tag array 394system.tcp_cntrl1.coalescer.gpu_tcp_ld_hits 1 # loads that hit in the TCP 395system.tcp_cntrl1.coalescer.gpu_tcp_ld_transfers 4 # TCP to TCP load transfers 396system.tcp_cntrl1.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC 397system.tcp_cntrl1.coalescer.gpu_ld_misses 1 # loads that miss in the GPU 398system.tcp_cntrl1.coalescer.gpu_tcp_st_hits 9 # stores that hit in the TCP 399system.tcp_cntrl1.coalescer.gpu_tcp_st_transfers 74 # TCP to TCP store transfers 400system.tcp_cntrl1.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC 401system.tcp_cntrl1.coalescer.gpu_st_misses 20 # stores that miss in the GPU 402system.tcp_cntrl1.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP 403system.tcp_cntrl1.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers 404system.tcp_cntrl1.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC 405system.tcp_cntrl1.coalescer.cp_ld_misses 0 # loads that miss in the GPU 406system.tcp_cntrl1.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP 407system.tcp_cntrl1.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers 408system.tcp_cntrl1.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC 409system.tcp_cntrl1.coalescer.cp_st_misses 0 # stores that miss in the GPU 410system.tcp_cntrl2.L1cache.demand_hits 0 # Number of cache demand hits 411system.tcp_cntrl2.L1cache.demand_misses 0 # Number of cache demand misses 412system.tcp_cntrl2.L1cache.demand_accesses 0 # Number of cache demand accesses 413system.tcp_cntrl2.L1cache.num_data_array_reads 19 # number of data array reads 414system.tcp_cntrl2.L1cache.num_data_array_writes 108 # number of data array writes 415system.tcp_cntrl2.L1cache.num_tag_array_reads 302 # number of tag array reads 416system.tcp_cntrl2.L1cache.num_tag_array_writes 292 # number of tag array writes 417system.tcp_cntrl2.L1cache.num_tag_array_stalls 36 # number of stalls caused by tag array 418system.tcp_cntrl2.L1cache.num_data_array_stalls 3 # number of stalls caused by data array 419system.tcp_cntrl2.coalescer.gpu_tcp_ld_hits 1 # loads that hit in the TCP 420system.tcp_cntrl2.coalescer.gpu_tcp_ld_transfers 9 # TCP to TCP load transfers 421system.tcp_cntrl2.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC 422system.tcp_cntrl2.coalescer.gpu_ld_misses 0 # loads that miss in the GPU 423system.tcp_cntrl2.coalescer.gpu_tcp_st_hits 7 # stores that hit in the TCP 424system.tcp_cntrl2.coalescer.gpu_tcp_st_transfers 72 # TCP to TCP store transfers 425system.tcp_cntrl2.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC 426system.tcp_cntrl2.coalescer.gpu_st_misses 18 # stores that miss in the GPU 427system.tcp_cntrl2.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP 428system.tcp_cntrl2.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers 429system.tcp_cntrl2.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC 430system.tcp_cntrl2.coalescer.cp_ld_misses 0 # loads that miss in the GPU 431system.tcp_cntrl2.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP 432system.tcp_cntrl2.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers 433system.tcp_cntrl2.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC 434system.tcp_cntrl2.coalescer.cp_st_misses 0 # stores that miss in the GPU 435system.tcp_cntrl3.L1cache.demand_hits 0 # Number of cache demand hits 436system.tcp_cntrl3.L1cache.demand_misses 0 # Number of cache demand misses 437system.tcp_cntrl3.L1cache.demand_accesses 0 # Number of cache demand accesses 438system.tcp_cntrl3.L1cache.num_data_array_reads 7 # number of data array reads 439system.tcp_cntrl3.L1cache.num_data_array_writes 104 # number of data array writes 440system.tcp_cntrl3.L1cache.num_tag_array_reads 272 # number of tag array reads 441system.tcp_cntrl3.L1cache.num_tag_array_writes 262 # number of tag array writes 442system.tcp_cntrl3.L1cache.num_tag_array_stalls 16 # number of stalls caused by tag array 443system.tcp_cntrl3.L1cache.num_data_array_stalls 3 # number of stalls caused by data array 444system.tcp_cntrl3.coalescer.gpu_tcp_ld_hits 0 # loads that hit in the TCP 445system.tcp_cntrl3.coalescer.gpu_tcp_ld_transfers 13 # TCP to TCP load transfers 446system.tcp_cntrl3.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC 447system.tcp_cntrl3.coalescer.gpu_ld_misses 0 # loads that miss in the GPU 448system.tcp_cntrl3.coalescer.gpu_tcp_st_hits 10 # stores that hit in the TCP 449system.tcp_cntrl3.coalescer.gpu_tcp_st_transfers 63 # TCP to TCP store transfers 450system.tcp_cntrl3.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC 451system.tcp_cntrl3.coalescer.gpu_st_misses 18 # stores that miss in the GPU 452system.tcp_cntrl3.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP 453system.tcp_cntrl3.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers 454system.tcp_cntrl3.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC 455system.tcp_cntrl3.coalescer.cp_ld_misses 0 # loads that miss in the GPU 456system.tcp_cntrl3.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP 457system.tcp_cntrl3.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers 458system.tcp_cntrl3.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC 459system.tcp_cntrl3.coalescer.cp_st_misses 0 # stores that miss in the GPU 460system.tcp_cntrl4.L1cache.demand_hits 0 # Number of cache demand hits 461system.tcp_cntrl4.L1cache.demand_misses 0 # Number of cache demand misses 462system.tcp_cntrl4.L1cache.demand_accesses 0 # Number of cache demand accesses 463system.tcp_cntrl4.L1cache.num_data_array_reads 14 # number of data array reads 464system.tcp_cntrl4.L1cache.num_data_array_writes 115 # number of data array writes 465system.tcp_cntrl4.L1cache.num_tag_array_reads 317 # number of tag array reads 466system.tcp_cntrl4.L1cache.num_tag_array_writes 309 # number of tag array writes 467system.tcp_cntrl4.L1cache.num_tag_array_stalls 29 # number of stalls caused by tag array 468system.tcp_cntrl4.coalescer.gpu_tcp_ld_hits 0 # loads that hit in the TCP 469system.tcp_cntrl4.coalescer.gpu_tcp_ld_transfers 4 # TCP to TCP load transfers 470system.tcp_cntrl4.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC 471system.tcp_cntrl4.coalescer.gpu_ld_misses 0 # loads that miss in the GPU 472system.tcp_cntrl4.coalescer.gpu_tcp_st_hits 6 # stores that hit in the TCP 473system.tcp_cntrl4.coalescer.gpu_tcp_st_transfers 76 # TCP to TCP store transfers 474system.tcp_cntrl4.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC 475system.tcp_cntrl4.coalescer.gpu_st_misses 26 # stores that miss in the GPU 476system.tcp_cntrl4.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP 477system.tcp_cntrl4.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers 478system.tcp_cntrl4.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC 479system.tcp_cntrl4.coalescer.cp_ld_misses 0 # loads that miss in the GPU 480system.tcp_cntrl4.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP 481system.tcp_cntrl4.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers 482system.tcp_cntrl4.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC 483system.tcp_cntrl4.coalescer.cp_st_misses 0 # stores that miss in the GPU 484system.tcp_cntrl5.L1cache.demand_hits 0 # Number of cache demand hits 485system.tcp_cntrl5.L1cache.demand_misses 0 # Number of cache demand misses 486system.tcp_cntrl5.L1cache.demand_accesses 0 # Number of cache demand accesses 487system.tcp_cntrl5.L1cache.num_data_array_reads 10 # number of data array reads 488system.tcp_cntrl5.L1cache.num_data_array_writes 107 # number of data array writes 489system.tcp_cntrl5.L1cache.num_tag_array_reads 295 # number of tag array reads 490system.tcp_cntrl5.L1cache.num_tag_array_writes 287 # number of tag array writes 491system.tcp_cntrl5.L1cache.num_tag_array_stalls 31 # number of stalls caused by tag array 492system.tcp_cntrl5.coalescer.gpu_tcp_ld_hits 0 # loads that hit in the TCP 493system.tcp_cntrl5.coalescer.gpu_tcp_ld_transfers 6 # TCP to TCP load transfers 494system.tcp_cntrl5.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC 495system.tcp_cntrl5.coalescer.gpu_ld_misses 0 # loads that miss in the GPU 496system.tcp_cntrl5.coalescer.gpu_tcp_st_hits 8 # stores that hit in the TCP 497system.tcp_cntrl5.coalescer.gpu_tcp_st_transfers 69 # TCP to TCP store transfers 498system.tcp_cntrl5.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC 499system.tcp_cntrl5.coalescer.gpu_st_misses 23 # stores that miss in the GPU 500system.tcp_cntrl5.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP 501system.tcp_cntrl5.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers 502system.tcp_cntrl5.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC 503system.tcp_cntrl5.coalescer.cp_ld_misses 0 # loads that miss in the GPU 504system.tcp_cntrl5.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP 505system.tcp_cntrl5.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers 506system.tcp_cntrl5.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC 507system.tcp_cntrl5.coalescer.cp_st_misses 0 # stores that miss in the GPU 508system.tcp_cntrl6.L1cache.demand_hits 0 # Number of cache demand hits 509system.tcp_cntrl6.L1cache.demand_misses 0 # Number of cache demand misses 510system.tcp_cntrl6.L1cache.demand_accesses 0 # Number of cache demand accesses 511system.tcp_cntrl6.L1cache.num_data_array_reads 13 # number of data array reads 512system.tcp_cntrl6.L1cache.num_data_array_writes 123 # number of data array writes 513system.tcp_cntrl6.L1cache.num_tag_array_reads 342 # number of tag array reads 514system.tcp_cntrl6.L1cache.num_tag_array_writes 335 # number of tag array writes 515system.tcp_cntrl6.L1cache.num_tag_array_stalls 49 # number of stalls caused by tag array 516system.tcp_cntrl6.coalescer.gpu_tcp_ld_hits 1 # loads that hit in the TCP 517system.tcp_cntrl6.coalescer.gpu_tcp_ld_transfers 11 # TCP to TCP load transfers 518system.tcp_cntrl6.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC 519system.tcp_cntrl6.coalescer.gpu_ld_misses 1 # loads that miss in the GPU 520system.tcp_cntrl6.coalescer.gpu_tcp_st_hits 5 # stores that hit in the TCP 521system.tcp_cntrl6.coalescer.gpu_tcp_st_transfers 86 # TCP to TCP store transfers 522system.tcp_cntrl6.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC 523system.tcp_cntrl6.coalescer.gpu_st_misses 19 # stores that miss in the GPU 524system.tcp_cntrl6.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP 525system.tcp_cntrl6.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers 526system.tcp_cntrl6.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC 527system.tcp_cntrl6.coalescer.cp_ld_misses 0 # loads that miss in the GPU 528system.tcp_cntrl6.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP 529system.tcp_cntrl6.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers 530system.tcp_cntrl6.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC 531system.tcp_cntrl6.coalescer.cp_st_misses 0 # stores that miss in the GPU 532system.tcp_cntrl7.L1cache.demand_hits 0 # Number of cache demand hits 533system.tcp_cntrl7.L1cache.demand_misses 0 # Number of cache demand misses 534system.tcp_cntrl7.L1cache.demand_accesses 0 # Number of cache demand accesses 535system.tcp_cntrl7.L1cache.num_data_array_reads 10 # number of data array reads 536system.tcp_cntrl7.L1cache.num_data_array_writes 97 # number of data array writes 537system.tcp_cntrl7.L1cache.num_tag_array_reads 263 # number of tag array reads 538system.tcp_cntrl7.L1cache.num_tag_array_writes 256 # number of tag array writes 539system.tcp_cntrl7.L1cache.num_tag_array_stalls 11 # number of stalls caused by tag array 540system.tcp_cntrl7.coalescer.gpu_tcp_ld_hits 1 # loads that hit in the TCP 541system.tcp_cntrl7.coalescer.gpu_tcp_ld_transfers 10 # TCP to TCP load transfers 542system.tcp_cntrl7.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC 543system.tcp_cntrl7.coalescer.gpu_ld_misses 1 # loads that miss in the GPU 544system.tcp_cntrl7.coalescer.gpu_tcp_st_hits 6 # stores that hit in the TCP 545system.tcp_cntrl7.coalescer.gpu_tcp_st_transfers 63 # TCP to TCP store transfers 546system.tcp_cntrl7.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC 547system.tcp_cntrl7.coalescer.gpu_st_misses 16 # stores that miss in the GPU 548system.tcp_cntrl7.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP 549system.tcp_cntrl7.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers 550system.tcp_cntrl7.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC 551system.tcp_cntrl7.coalescer.cp_ld_misses 0 # loads that miss in the GPU 552system.tcp_cntrl7.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP 553system.tcp_cntrl7.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers 554system.tcp_cntrl7.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC 555system.tcp_cntrl7.coalescer.cp_st_misses 0 # stores that miss in the GPU 556system.sqc_cntrl0.L1cache.demand_hits 0 # Number of cache demand hits 557system.sqc_cntrl0.L1cache.demand_misses 0 # Number of cache demand misses 558system.sqc_cntrl0.L1cache.demand_accesses 0 # Number of cache demand accesses 559system.sqc_cntrl0.L1cache.num_data_array_reads 12 # number of data array reads 560system.sqc_cntrl0.L1cache.num_data_array_writes 12 # number of data array writes 561system.sqc_cntrl0.L1cache.num_tag_array_reads 22 # number of tag array reads 562system.sqc_cntrl0.L1cache.num_tag_array_writes 22 # number of tag array writes 563system.sqc_cntrl1.L1cache.demand_hits 0 # Number of cache demand hits 564system.sqc_cntrl1.L1cache.demand_misses 0 # Number of cache demand misses 565system.sqc_cntrl1.L1cache.demand_accesses 0 # Number of cache demand accesses 566system.sqc_cntrl1.L1cache.num_data_array_reads 15 # number of data array reads 567system.sqc_cntrl1.L1cache.num_data_array_writes 15 # number of data array writes 568system.sqc_cntrl1.L1cache.num_tag_array_reads 29 # number of tag array reads 569system.sqc_cntrl1.L1cache.num_tag_array_writes 29 # number of tag array writes 570system.tcc_cntrl0.L2cache.demand_hits 0 # Number of cache demand hits 571system.tcc_cntrl0.L2cache.demand_misses 0 # Number of cache demand misses 572system.tcc_cntrl0.L2cache.demand_accesses 0 # Number of cache demand accesses 573system.tccdir_cntrl0.directory.demand_hits 0 # Number of cache demand hits 574system.tccdir_cntrl0.directory.demand_misses 0 # Number of cache demand misses 575system.tccdir_cntrl0.directory.demand_accesses 0 # Number of cache demand accesses 576system.tccdir_cntrl0.directory.num_tag_array_reads 917 # number of tag array reads 577system.tccdir_cntrl0.directory.num_tag_array_writes 902 # number of tag array writes 578system.ruby.network.msg_count.Control 1430 579system.ruby.network.msg_count.Request_Control 1616 580system.ruby.network.msg_count.Response_Data 2430 581system.ruby.network.msg_count.Response_Control 456 582system.ruby.network.msg_count.Writeback_Data 132 583system.ruby.network.msg_count.Writeback_Control 140 584system.ruby.network.msg_count.Unblock_Control 1437 585system.ruby.network.msg_byte.Control 11440 586system.ruby.network.msg_byte.Request_Control 12928 587system.ruby.network.msg_byte.Response_Data 174960 588system.ruby.network.msg_byte.Response_Control 3648 589system.ruby.network.msg_byte.Writeback_Data 9504 590system.ruby.network.msg_byte.Writeback_Control 1120 591system.ruby.network.msg_byte.Unblock_Control 11496 592system.ruby.network.ext_links00.int_node.throttle0.link_utilization 0.250555 593system.ruby.network.ext_links00.int_node.throttle0.msg_count.Request_Control::0 385 594system.ruby.network.ext_links00.int_node.throttle0.msg_count.Response_Data::2 85 595system.ruby.network.ext_links00.int_node.throttle0.msg_count.Response_Control::2 227 596system.ruby.network.ext_links00.int_node.throttle0.msg_count.Writeback_Data::2 66 597system.ruby.network.ext_links00.int_node.throttle0.msg_count.Unblock_Control::4 303 598system.ruby.network.ext_links00.int_node.throttle0.msg_bytes.Request_Control::0 3080 599system.ruby.network.ext_links00.int_node.throttle0.msg_bytes.Response_Data::2 6120 600system.ruby.network.ext_links00.int_node.throttle0.msg_bytes.Response_Control::2 1816 601system.ruby.network.ext_links00.int_node.throttle0.msg_bytes.Writeback_Data::2 4752 602system.ruby.network.ext_links00.int_node.throttle0.msg_bytes.Unblock_Control::4 2424 603system.ruby.network.ext_links00.int_node.throttle1.link_utilization 0.113047 604system.ruby.network.ext_links00.int_node.throttle1.msg_count.Control::0 227 605system.ruby.network.ext_links00.int_node.throttle1.msg_count.Response_Data::2 81 606system.ruby.network.ext_links00.int_node.throttle1.msg_count.Writeback_Control::2 70 607system.ruby.network.ext_links00.int_node.throttle1.msg_bytes.Control::0 1816 608system.ruby.network.ext_links00.int_node.throttle1.msg_bytes.Response_Data::2 5832 609system.ruby.network.ext_links00.int_node.throttle1.msg_bytes.Writeback_Control::2 560 610system.ruby.network.ext_links00.int_node.throttle2.link_utilization 0.234028 611system.ruby.network.ext_links00.int_node.throttle2.msg_count.Control::0 81 612system.ruby.network.ext_links00.int_node.throttle2.msg_count.Response_Data::2 227 613system.ruby.network.ext_links00.int_node.throttle2.msg_bytes.Control::0 648 614system.ruby.network.ext_links00.int_node.throttle2.msg_bytes.Response_Data::2 16344 615system.ruby.network.ext_links01.int_node.throttle0.link_utilization 0.113047 616system.ruby.network.ext_links01.int_node.throttle0.msg_count.Control::0 227 617system.ruby.network.ext_links01.int_node.throttle0.msg_count.Response_Data::2 81 618system.ruby.network.ext_links01.int_node.throttle0.msg_count.Writeback_Control::2 70 619system.ruby.network.ext_links01.int_node.throttle0.msg_bytes.Control::0 1816 620system.ruby.network.ext_links01.int_node.throttle0.msg_bytes.Response_Data::2 5832 621system.ruby.network.ext_links01.int_node.throttle0.msg_bytes.Writeback_Control::2 560 622system.ruby.network.ext_links01.int_node.throttle1.link_utilization 0.128914 623system.ruby.network.ext_links01.int_node.throttle1.msg_count.Request_Control::0 153 624system.ruby.network.ext_links01.int_node.throttle1.msg_count.Response_Data::2 14 625system.ruby.network.ext_links01.int_node.throttle1.msg_count.Response_Control::2 217 626system.ruby.network.ext_links01.int_node.throttle1.msg_count.Writeback_Data::2 66 627system.ruby.network.ext_links01.int_node.throttle1.msg_count.Unblock_Control::4 80 628system.ruby.network.ext_links01.int_node.throttle1.msg_bytes.Request_Control::0 1224 629system.ruby.network.ext_links01.int_node.throttle1.msg_bytes.Response_Data::2 1008 630system.ruby.network.ext_links01.int_node.throttle1.msg_bytes.Response_Control::2 1736 631system.ruby.network.ext_links01.int_node.throttle1.msg_bytes.Writeback_Data::2 4752 632system.ruby.network.ext_links01.int_node.throttle1.msg_bytes.Unblock_Control::4 640 633system.ruby.network.ext_links02.int_node.throttle0.link_utilization 0.115361 634system.ruby.network.ext_links02.int_node.throttle0.msg_count.Control::1 102 635system.ruby.network.ext_links02.int_node.throttle0.msg_count.Response_Data::3 105 636system.ruby.network.ext_links02.int_node.throttle0.msg_bytes.Control::1 816 637system.ruby.network.ext_links02.int_node.throttle0.msg_bytes.Response_Data::3 7560 638system.ruby.network.ext_links02.int_node.throttle1.link_utilization 0.108750 639system.ruby.network.ext_links02.int_node.throttle1.msg_count.Control::1 96 640system.ruby.network.ext_links02.int_node.throttle1.msg_count.Response_Data::3 99 641system.ruby.network.ext_links02.int_node.throttle1.msg_bytes.Control::1 768 642system.ruby.network.ext_links02.int_node.throttle1.msg_bytes.Response_Data::3 7128 643system.ruby.network.ext_links02.int_node.throttle2.link_utilization 0.109742 644system.ruby.network.ext_links02.int_node.throttle2.msg_count.Control::1 105 645system.ruby.network.ext_links02.int_node.throttle2.msg_count.Response_Data::3 99 646system.ruby.network.ext_links02.int_node.throttle2.msg_bytes.Control::1 840 647system.ruby.network.ext_links02.int_node.throttle2.msg_bytes.Response_Data::3 7128 648system.ruby.network.ext_links02.int_node.throttle3.link_utilization 0.102690 649system.ruby.network.ext_links02.int_node.throttle3.msg_count.Control::1 86 650system.ruby.network.ext_links02.int_node.throttle3.msg_count.Response_Data::3 94 651system.ruby.network.ext_links02.int_node.throttle3.msg_bytes.Control::1 688 652system.ruby.network.ext_links02.int_node.throttle3.msg_bytes.Response_Data::3 6768 653system.ruby.network.ext_links02.int_node.throttle4.link_utilization 0.116573 654system.ruby.network.ext_links02.int_node.throttle4.msg_count.Control::1 104 655system.ruby.network.ext_links02.int_node.throttle4.msg_count.Response_Data::3 106 656system.ruby.network.ext_links02.int_node.throttle4.msg_bytes.Control::1 832 657system.ruby.network.ext_links02.int_node.throttle4.msg_bytes.Response_Data::3 7632 658system.ruby.network.ext_links02.int_node.throttle5.link_utilization 0.107759 659system.ruby.network.ext_links02.int_node.throttle5.msg_count.Control::1 96 660system.ruby.network.ext_links02.int_node.throttle5.msg_count.Response_Data::3 98 661system.ruby.network.ext_links02.int_node.throttle5.msg_bytes.Control::1 768 662system.ruby.network.ext_links02.int_node.throttle5.msg_bytes.Response_Data::3 7056 663system.ruby.network.ext_links02.int_node.throttle6.link_utilization 0.128473 664system.ruby.network.ext_links02.int_node.throttle6.msg_count.Control::1 113 665system.ruby.network.ext_links02.int_node.throttle6.msg_count.Response_Data::3 117 666system.ruby.network.ext_links02.int_node.throttle6.msg_bytes.Control::1 904 667system.ruby.network.ext_links02.int_node.throttle6.msg_bytes.Response_Data::3 8424 668system.ruby.network.ext_links02.int_node.throttle7.link_utilization 0.098944 669system.ruby.network.ext_links02.int_node.throttle7.msg_count.Control::1 88 670system.ruby.network.ext_links02.int_node.throttle7.msg_count.Response_Data::3 90 671system.ruby.network.ext_links02.int_node.throttle7.msg_bytes.Control::1 704 672system.ruby.network.ext_links02.int_node.throttle7.msg_bytes.Response_Data::3 6480 673system.ruby.network.ext_links02.int_node.throttle8.link_utilization 0 674system.ruby.network.ext_links02.int_node.throttle9.link_utilization 1.221264 675system.ruby.network.ext_links02.int_node.throttle9.msg_count.Control::0 81 676system.ruby.network.ext_links02.int_node.throttle9.msg_count.Request_Control::1 846 677system.ruby.network.ext_links02.int_node.throttle9.msg_count.Response_Data::2 227 678system.ruby.network.ext_links02.int_node.throttle9.msg_count.Response_Data::3 809 679system.ruby.network.ext_links02.int_node.throttle9.msg_count.Response_Control::3 2 680system.ruby.network.ext_links02.int_node.throttle9.msg_count.Unblock_Control::5 831 681system.ruby.network.ext_links02.int_node.throttle9.msg_bytes.Control::0 648 682system.ruby.network.ext_links02.int_node.throttle9.msg_bytes.Request_Control::1 6768 683system.ruby.network.ext_links02.int_node.throttle9.msg_bytes.Response_Data::2 16344 684system.ruby.network.ext_links02.int_node.throttle9.msg_bytes.Response_Data::3 58248 685system.ruby.network.ext_links02.int_node.throttle9.msg_bytes.Response_Control::3 16 686system.ruby.network.ext_links02.int_node.throttle9.msg_bytes.Unblock_Control::5 6648 687system.ruby.network.ext_links02.int_node.throttle10.link_utilization 0.013002 688system.ruby.network.ext_links02.int_node.throttle10.msg_count.Control::1 10 689system.ruby.network.ext_links02.int_node.throttle10.msg_count.Response_Data::3 12 690system.ruby.network.ext_links02.int_node.throttle10.msg_bytes.Control::1 80 691system.ruby.network.ext_links02.int_node.throttle10.msg_bytes.Response_Data::3 864 692system.ruby.network.ext_links02.int_node.throttle11.link_utilization 0.016417 693system.ruby.network.ext_links02.int_node.throttle11.msg_count.Control::1 14 694system.ruby.network.ext_links02.int_node.throttle11.msg_count.Response_Data::3 15 695system.ruby.network.ext_links02.int_node.throttle11.msg_bytes.Control::1 112 696system.ruby.network.ext_links02.int_node.throttle11.msg_bytes.Response_Data::3 1080 697system.ruby.network.ext_links02.int_node.throttle12.link_utilization 0.121642 698system.ruby.network.ext_links02.int_node.throttle12.msg_count.Request_Control::0 232 699system.ruby.network.ext_links02.int_node.throttle12.msg_count.Response_Data::2 71 700system.ruby.network.ext_links02.int_node.throttle12.msg_count.Response_Control::2 10 701system.ruby.network.ext_links02.int_node.throttle12.msg_count.Unblock_Control::4 223 702system.ruby.network.ext_links02.int_node.throttle12.msg_bytes.Request_Control::0 1856 703system.ruby.network.ext_links02.int_node.throttle12.msg_bytes.Response_Data::2 5112 704system.ruby.network.ext_links02.int_node.throttle12.msg_bytes.Response_Control::2 80 705system.ruby.network.ext_links02.int_node.throttle12.msg_bytes.Unblock_Control::4 1784 706system.ruby.CorePair_Controller.C0_Load_L1miss 1 0.00% 0.00% 707system.ruby.CorePair_Controller.C1_Load_L1miss 1 0.00% 0.00% 708system.ruby.CorePair_Controller.Ifetch0_L1miss 2 0.00% 0.00% 709system.ruby.CorePair_Controller.Ifetch1_L1miss 1 0.00% 0.00% 710system.ruby.CorePair_Controller.C0_Store_L1miss 45 0.00% 0.00% 711system.ruby.CorePair_Controller.C0_Store_L1hit 2 0.00% 0.00% 712system.ruby.CorePair_Controller.C1_Store_L1miss 73 0.00% 0.00% 713system.ruby.CorePair_Controller.NB_AckS 4 0.00% 0.00% 714system.ruby.CorePair_Controller.NB_AckM 77 0.00% 0.00% 715system.ruby.CorePair_Controller.NB_AckWB 70 0.00% 0.00% 716system.ruby.CorePair_Controller.L1D0_Repl 19 0.00% 0.00% 717system.ruby.CorePair_Controller.L2_Repl 36624 0.00% 0.00% 718system.ruby.CorePair_Controller.PrbInvData 223 0.00% 0.00% 719system.ruby.CorePair_Controller.PrbShrData 4 0.00% 0.00% 720system.ruby.CorePair_Controller.I.C0_Load_L1miss 1 0.00% 0.00% 721system.ruby.CorePair_Controller.I.C1_Load_L1miss 1 0.00% 0.00% 722system.ruby.CorePair_Controller.I.Ifetch0_L1miss 2 0.00% 0.00% 723system.ruby.CorePair_Controller.I.Ifetch1_L1miss 1 0.00% 0.00% 724system.ruby.CorePair_Controller.I.C0_Store_L1miss 41 0.00% 0.00% 725system.ruby.CorePair_Controller.I.C1_Store_L1miss 37 0.00% 0.00% 726system.ruby.CorePair_Controller.I.PrbInvData 209 0.00% 0.00% 727system.ruby.CorePair_Controller.I.PrbShrData 3 0.00% 0.00% 728system.ruby.CorePair_Controller.S.L2_Repl 3 0.00% 0.00% 729system.ruby.CorePair_Controller.S.PrbInvData 1 0.00% 0.00% 730system.ruby.CorePair_Controller.O.PrbInvData 1 0.00% 0.00% 731system.ruby.CorePair_Controller.M0.C0_Store_L1hit 2 0.00% 0.00% 732system.ruby.CorePair_Controller.M0.L2_Repl 33 0.00% 0.00% 733system.ruby.CorePair_Controller.M0.PrbInvData 5 0.00% 0.00% 734system.ruby.CorePair_Controller.M0.PrbShrData 1 0.00% 0.00% 735system.ruby.CorePair_Controller.M1.C0_Store_L1miss 1 0.00% 0.00% 736system.ruby.CorePair_Controller.M1.L2_Repl 36 0.00% 0.00% 737system.ruby.CorePair_Controller.M1.PrbInvData 2 0.00% 0.00% 738system.ruby.CorePair_Controller.I_M0.C1_Store_L1miss 5 0.00% 0.00% 739system.ruby.CorePair_Controller.I_M0.NB_AckM 35 0.00% 0.00% 740system.ruby.CorePair_Controller.I_M0.L1D0_Repl 11 0.00% 0.00% 741system.ruby.CorePair_Controller.I_M0.L2_Repl 16208 0.00% 0.00% 742system.ruby.CorePair_Controller.I_M1.C0_Store_L1miss 3 0.00% 0.00% 743system.ruby.CorePair_Controller.I_M1.NB_AckM 34 0.00% 0.00% 744system.ruby.CorePair_Controller.I_M1.L2_Repl 14782 0.00% 0.00% 745system.ruby.CorePair_Controller.I_M0M1.NB_AckM 5 0.00% 0.00% 746system.ruby.CorePair_Controller.I_M0M1.L2_Repl 3020 0.00% 0.00% 747system.ruby.CorePair_Controller.I_M1M0.NB_AckM 3 0.00% 0.00% 748system.ruby.CorePair_Controller.I_M1M0.L2_Repl 1059 0.00% 0.00% 749system.ruby.CorePair_Controller.I_E0S.NB_AckS 1 0.00% 0.00% 750system.ruby.CorePair_Controller.I_E0S.L1D0_Repl 8 0.00% 0.00% 751system.ruby.CorePair_Controller.I_E0S.L2_Repl 493 0.00% 0.00% 752system.ruby.CorePair_Controller.I_E1S.NB_AckS 1 0.00% 0.00% 753system.ruby.CorePair_Controller.I_E1S.L2_Repl 638 0.00% 0.00% 754system.ruby.CorePair_Controller.ES_I.NB_AckWB 2 0.00% 0.00% 755system.ruby.CorePair_Controller.MO_I.NB_AckWB 64 0.00% 0.00% 756system.ruby.CorePair_Controller.MO_I.PrbInvData 5 0.00% 0.00% 757system.ruby.CorePair_Controller.S0.C1_Store_L1miss 31 0.00% 0.00% 758system.ruby.CorePair_Controller.S0.NB_AckS 1 0.00% 0.00% 759system.ruby.CorePair_Controller.S0.L2_Repl 352 0.00% 0.00% 760system.ruby.CorePair_Controller.S1.NB_AckS 1 0.00% 0.00% 761system.ruby.CorePair_Controller.I_C.NB_AckWB 4 0.00% 0.00% 762system.ruby.Directory_Controller.RdBlkS 3 0.00% 0.00% 763system.ruby.Directory_Controller.RdBlkM 309 0.00% 0.00% 764system.ruby.Directory_Controller.RdBlk 6 0.00% 0.00% 765system.ruby.Directory_Controller.VicDirty 68 0.00% 0.00% 766system.ruby.Directory_Controller.VicClean 2 0.00% 0.00% 767system.ruby.Directory_Controller.CPUData 66 0.00% 0.00% 768system.ruby.Directory_Controller.StaleWB 4 0.00% 0.00% 769system.ruby.Directory_Controller.CPUPrbResp 308 0.00% 0.00% 770system.ruby.Directory_Controller.ProbeAcksComplete 308 0.00% 0.00% 771system.ruby.Directory_Controller.L3Hit 49 0.00% 0.00% 772system.ruby.Directory_Controller.MemData 259 0.00% 0.00% 773system.ruby.Directory_Controller.WBAck 9 0.00% 0.00% 774system.ruby.Directory_Controller.CoreUnblock 303 0.00% 0.00% 775system.ruby.Directory_Controller.U.RdBlkS 3 0.00% 0.00% 776system.ruby.Directory_Controller.U.RdBlkM 300 0.00% 0.00% 777system.ruby.Directory_Controller.U.RdBlk 5 0.00% 0.00% 778system.ruby.Directory_Controller.U.VicDirty 68 0.00% 0.00% 779system.ruby.Directory_Controller.U.VicClean 2 0.00% 0.00% 780system.ruby.Directory_Controller.U.WBAck 9 0.00% 0.00% 781system.ruby.Directory_Controller.BL.RdBlkM 1 0.00% 0.00% 782system.ruby.Directory_Controller.BL.CPUData 66 0.00% 0.00% 783system.ruby.Directory_Controller.BL.StaleWB 4 0.00% 0.00% 784system.ruby.Directory_Controller.BM_M.MemData 8 0.00% 0.00% 785system.ruby.Directory_Controller.BS_PM.L3Hit 1 0.00% 0.00% 786system.ruby.Directory_Controller.BS_PM.MemData 2 0.00% 0.00% 787system.ruby.Directory_Controller.BM_PM.RdBlkM 1 0.00% 0.00% 788system.ruby.Directory_Controller.BM_PM.CPUPrbResp 12 0.00% 0.00% 789system.ruby.Directory_Controller.BM_PM.ProbeAcksComplete 8 0.00% 0.00% 790system.ruby.Directory_Controller.BM_PM.L3Hit 46 0.00% 0.00% 791system.ruby.Directory_Controller.BM_PM.MemData 246 0.00% 0.00% 792system.ruby.Directory_Controller.B_PM.L3Hit 2 0.00% 0.00% 793system.ruby.Directory_Controller.B_PM.MemData 3 0.00% 0.00% 794system.ruby.Directory_Controller.BS_Pm.CPUPrbResp 3 0.00% 0.00% 795system.ruby.Directory_Controller.BS_Pm.ProbeAcksComplete 3 0.00% 0.00% 796system.ruby.Directory_Controller.BM_Pm.RdBlkM 3 0.00% 0.00% 797system.ruby.Directory_Controller.BM_Pm.CPUPrbResp 288 0.00% 0.00% 798system.ruby.Directory_Controller.BM_Pm.ProbeAcksComplete 292 0.00% 0.00% 799system.ruby.Directory_Controller.B_Pm.CPUPrbResp 5 0.00% 0.00% 800system.ruby.Directory_Controller.B_Pm.ProbeAcksComplete 5 0.00% 0.00% 801system.ruby.Directory_Controller.B.RdBlkM 4 0.00% 0.00% 802system.ruby.Directory_Controller.B.RdBlk 1 0.00% 0.00% 803system.ruby.Directory_Controller.B.CoreUnblock 303 0.00% 0.00% 804system.ruby.LD.latency_hist::bucket_size 1024 805system.ruby.LD.latency_hist::max_bucket 10239 806system.ruby.LD.latency_hist::samples 1 807system.ruby.LD.latency_hist::mean 5324 808system.ruby.LD.latency_hist::gmean 5324.000000 809system.ruby.LD.latency_hist::stdev nan 810system.ruby.LD.latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 811system.ruby.LD.latency_hist::total 1 812system.ruby.LD.hit_latency_hist::bucket_size 1024 813system.ruby.LD.hit_latency_hist::max_bucket 10239 814system.ruby.LD.hit_latency_hist::samples 1 815system.ruby.LD.hit_latency_hist::mean 5324 816system.ruby.LD.hit_latency_hist::gmean 5324.000000 817system.ruby.LD.hit_latency_hist::stdev nan 818system.ruby.LD.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 819system.ruby.LD.hit_latency_hist::total 1 820system.ruby.ST.latency_hist::bucket_size 1024 821system.ruby.ST.latency_hist::max_bucket 10239 822system.ruby.ST.latency_hist::samples 46 823system.ruby.ST.latency_hist::mean 3269.239130 824system.ruby.ST.latency_hist::gmean 1783.447677 825system.ruby.ST.latency_hist::stdev 1934.416354 826system.ruby.ST.latency_hist | 11 23.91% 23.91% | 3 6.52% 30.43% | 3 6.52% 36.96% | 7 15.22% 52.17% | 18 39.13% 91.30% | 4 8.70% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 827system.ruby.ST.latency_hist::total 46 828system.ruby.ST.hit_latency_hist::bucket_size 1024 829system.ruby.ST.hit_latency_hist::max_bucket 10239 830system.ruby.ST.hit_latency_hist::samples 40 831system.ruby.ST.hit_latency_hist::mean 3606.650000 832system.ruby.ST.hit_latency_hist::gmean 2691.718970 833system.ruby.ST.hit_latency_hist::stdev 1792.166924 834system.ruby.ST.hit_latency_hist | 7 17.50% 17.50% | 3 7.50% 25.00% | 1 2.50% 27.50% | 7 17.50% 45.00% | 18 45.00% 90.00% | 4 10.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 835system.ruby.ST.hit_latency_hist::total 40 836system.ruby.ST.miss_latency_hist::bucket_size 512 837system.ruby.ST.miss_latency_hist::max_bucket 5119 838system.ruby.ST.miss_latency_hist::samples 6 839system.ruby.ST.miss_latency_hist::mean 1019.833333 840system.ruby.ST.miss_latency_hist::gmean 114.673945 841system.ruby.ST.miss_latency_hist::stdev 1281.644790 842system.ruby.ST.miss_latency_hist | 3 50.00% 50.00% | 1 16.67% 66.67% | 0 0.00% 66.67% | 0 0.00% 66.67% | 0 0.00% 66.67% | 2 33.33% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 843system.ruby.ST.miss_latency_hist::total 6 844system.ruby.IFETCH.latency_hist::bucket_size 1024 845system.ruby.IFETCH.latency_hist::max_bucket 10239 846system.ruby.IFETCH.latency_hist::samples 1 847system.ruby.IFETCH.latency_hist::mean 5156 848system.ruby.IFETCH.latency_hist::gmean 5156.000000 849system.ruby.IFETCH.latency_hist::stdev nan 850system.ruby.IFETCH.latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 851system.ruby.IFETCH.latency_hist::total 1 852system.ruby.IFETCH.hit_latency_hist::bucket_size 1024 853system.ruby.IFETCH.hit_latency_hist::max_bucket 10239 854system.ruby.IFETCH.hit_latency_hist::samples 1 855system.ruby.IFETCH.hit_latency_hist::mean 5156 856system.ruby.IFETCH.hit_latency_hist::gmean 5156.000000 857system.ruby.IFETCH.hit_latency_hist::stdev nan 858system.ruby.IFETCH.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 859system.ruby.IFETCH.hit_latency_hist::total 1 860system.ruby.L1Cache.miss_mach_latency_hist::bucket_size 512 861system.ruby.L1Cache.miss_mach_latency_hist::max_bucket 5119 862system.ruby.L1Cache.miss_mach_latency_hist::samples 6 863system.ruby.L1Cache.miss_mach_latency_hist::mean 1019.833333 864system.ruby.L1Cache.miss_mach_latency_hist::gmean 114.673945 865system.ruby.L1Cache.miss_mach_latency_hist::stdev 1281.644790 866system.ruby.L1Cache.miss_mach_latency_hist | 3 50.00% 50.00% | 1 16.67% 66.67% | 0 0.00% 66.67% | 0 0.00% 66.67% | 0 0.00% 66.67% | 2 33.33% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 867system.ruby.L1Cache.miss_mach_latency_hist::total 6 868system.ruby.Directory.hit_mach_latency_hist::bucket_size 1024 869system.ruby.Directory.hit_mach_latency_hist::max_bucket 10239 870system.ruby.Directory.hit_mach_latency_hist::samples 42 871system.ruby.Directory.hit_mach_latency_hist::mean 3684.428571 872system.ruby.Directory.hit_mach_latency_hist::gmean 2778.454716 873system.ruby.Directory.hit_mach_latency_hist::stdev 1783.107224 874system.ruby.Directory.hit_mach_latency_hist | 7 16.67% 16.67% | 3 7.14% 23.81% | 1 2.38% 26.19% | 7 16.67% 42.86% | 18 42.86% 85.71% | 6 14.29% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 875system.ruby.Directory.hit_mach_latency_hist::total 42 876system.ruby.LD.Directory.hit_type_mach_latency_hist::bucket_size 1024 877system.ruby.LD.Directory.hit_type_mach_latency_hist::max_bucket 10239 878system.ruby.LD.Directory.hit_type_mach_latency_hist::samples 1 879system.ruby.LD.Directory.hit_type_mach_latency_hist::mean 5324 880system.ruby.LD.Directory.hit_type_mach_latency_hist::gmean 5324.000000 881system.ruby.LD.Directory.hit_type_mach_latency_hist::stdev nan 882system.ruby.LD.Directory.hit_type_mach_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 883system.ruby.LD.Directory.hit_type_mach_latency_hist::total 1 884system.ruby.ST.L1Cache.miss_type_mach_latency_hist::bucket_size 512 885system.ruby.ST.L1Cache.miss_type_mach_latency_hist::max_bucket 5119 886system.ruby.ST.L1Cache.miss_type_mach_latency_hist::samples 6 887system.ruby.ST.L1Cache.miss_type_mach_latency_hist::mean 1019.833333 888system.ruby.ST.L1Cache.miss_type_mach_latency_hist::gmean 114.673945 889system.ruby.ST.L1Cache.miss_type_mach_latency_hist::stdev 1281.644790 890system.ruby.ST.L1Cache.miss_type_mach_latency_hist | 3 50.00% 50.00% | 1 16.67% 66.67% | 0 0.00% 66.67% | 0 0.00% 66.67% | 0 0.00% 66.67% | 2 33.33% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 891system.ruby.ST.L1Cache.miss_type_mach_latency_hist::total 6 892system.ruby.ST.Directory.hit_type_mach_latency_hist::bucket_size 1024 893system.ruby.ST.Directory.hit_type_mach_latency_hist::max_bucket 10239 894system.ruby.ST.Directory.hit_type_mach_latency_hist::samples 40 895system.ruby.ST.Directory.hit_type_mach_latency_hist::mean 3606.650000 896system.ruby.ST.Directory.hit_type_mach_latency_hist::gmean 2691.718970 897system.ruby.ST.Directory.hit_type_mach_latency_hist::stdev 1792.166924 898system.ruby.ST.Directory.hit_type_mach_latency_hist | 7 17.50% 17.50% | 3 7.50% 25.00% | 1 2.50% 27.50% | 7 17.50% 45.00% | 18 45.00% 90.00% | 4 10.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 899system.ruby.ST.Directory.hit_type_mach_latency_hist::total 40 900system.ruby.IFETCH.Directory.hit_type_mach_latency_hist::bucket_size 1024 901system.ruby.IFETCH.Directory.hit_type_mach_latency_hist::max_bucket 10239 902system.ruby.IFETCH.Directory.hit_type_mach_latency_hist::samples 1 903system.ruby.IFETCH.Directory.hit_type_mach_latency_hist::mean 5156 904system.ruby.IFETCH.Directory.hit_type_mach_latency_hist::gmean 5156.000000 905system.ruby.IFETCH.Directory.hit_type_mach_latency_hist::stdev nan 906system.ruby.IFETCH.Directory.hit_type_mach_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 907system.ruby.IFETCH.Directory.hit_type_mach_latency_hist::total 1 908system.ruby.SQC_Controller.Fetch | 12 44.44% 44.44% | 15 55.56% 100.00% 909system.ruby.SQC_Controller.Fetch::total 27 910system.ruby.SQC_Controller.TCC_AckS | 12 44.44% 44.44% | 15 55.56% 100.00% 911system.ruby.SQC_Controller.TCC_AckS::total 27 912system.ruby.SQC_Controller.PrbInvData | 10 41.67% 41.67% | 14 58.33% 100.00% 913system.ruby.SQC_Controller.PrbInvData::total 24 914system.ruby.SQC_Controller.I.Fetch | 12 44.44% 44.44% | 15 55.56% 100.00% 915system.ruby.SQC_Controller.I.Fetch::total 27 916system.ruby.SQC_Controller.S.PrbInvData | 10 41.67% 41.67% | 14 58.33% 100.00% 917system.ruby.SQC_Controller.S.PrbInvData::total 24 918system.ruby.SQC_Controller.I_S.TCC_AckS | 12 44.44% 44.44% | 15 55.56% 100.00% 919system.ruby.SQC_Controller.I_S.TCC_AckS::total 27 920system.ruby.TCCdir_Controller.RdBlk 174 0.00% 0.00% 921system.ruby.TCCdir_Controller.RdBlkM 2638 0.00% 0.00% 922system.ruby.TCCdir_Controller.RdBlkS 195 0.00% 0.00% 923system.ruby.TCCdir_Controller.CPUPrbResp 811 0.00% 0.00% 924system.ruby.TCCdir_Controller.ProbeAcksComplete 751 0.00% 0.00% 925system.ruby.TCCdir_Controller.CoreUnblock 829 0.00% 0.00% 926system.ruby.TCCdir_Controller.LastCoreUnblock 2 0.00% 0.00% 927system.ruby.TCCdir_Controller.NB_AckS 2 0.00% 0.00% 928system.ruby.TCCdir_Controller.NB_AckE 2 0.00% 0.00% 929system.ruby.TCCdir_Controller.NB_AckM 223 0.00% 0.00% 930system.ruby.TCCdir_Controller.PrbInvData 112 0.00% 0.00% 931system.ruby.TCCdir_Controller.PrbShrData 4 0.00% 0.00% 932system.ruby.TCCdir_Controller.I.RdBlk 3 0.00% 0.00% 933system.ruby.TCCdir_Controller.I.RdBlkM 156 0.00% 0.00% 934system.ruby.TCCdir_Controller.I.RdBlkS 1 0.00% 0.00% 935system.ruby.TCCdir_Controller.I.PrbInvData 9 0.00% 0.00% 936system.ruby.TCCdir_Controller.S.RdBlkM 2 0.00% 0.00% 937system.ruby.TCCdir_Controller.S.RdBlkS 1 0.00% 0.00% 938system.ruby.TCCdir_Controller.E.RdBlkM 1 0.00% 0.00% 939system.ruby.TCCdir_Controller.O.RdBlk 1 0.00% 0.00% 940system.ruby.TCCdir_Controller.O.RdBlkM 70 0.00% 0.00% 941system.ruby.TCCdir_Controller.O.PrbInvData 6 0.00% 0.00% 942system.ruby.TCCdir_Controller.M.RdBlk 61 0.00% 0.00% 943system.ruby.TCCdir_Controller.M.RdBlkM 521 0.00% 0.00% 944system.ruby.TCCdir_Controller.M.RdBlkS 25 0.00% 0.00% 945system.ruby.TCCdir_Controller.M.PrbInvData 59 0.00% 0.00% 946system.ruby.TCCdir_Controller.M.PrbShrData 4 0.00% 0.00% 947system.ruby.TCCdir_Controller.CP_I.RdBlk 9 0.00% 0.00% 948system.ruby.TCCdir_Controller.CP_I.RdBlkM 15 0.00% 0.00% 949system.ruby.TCCdir_Controller.CP_I.RdBlkS 7 0.00% 0.00% 950system.ruby.TCCdir_Controller.CP_I.CPUPrbResp 71 0.00% 0.00% 951system.ruby.TCCdir_Controller.CP_I.ProbeAcksComplete 65 0.00% 0.00% 952system.ruby.TCCdir_Controller.CP_O.RdBlkM 4 0.00% 0.00% 953system.ruby.TCCdir_Controller.CP_O.CPUPrbResp 4 0.00% 0.00% 954system.ruby.TCCdir_Controller.CP_O.ProbeAcksComplete 4 0.00% 0.00% 955system.ruby.TCCdir_Controller.CP_IOM.RdBlkM 5 0.00% 0.00% 956system.ruby.TCCdir_Controller.CP_IOM.CPUPrbResp 2 0.00% 0.00% 957system.ruby.TCCdir_Controller.CP_IOM.ProbeAcksComplete 2 0.00% 0.00% 958system.ruby.TCCdir_Controller.I_M.RdBlkM 897 0.00% 0.00% 959system.ruby.TCCdir_Controller.I_M.RdBlkS 30 0.00% 0.00% 960system.ruby.TCCdir_Controller.I_M.NB_AckM 156 0.00% 0.00% 961system.ruby.TCCdir_Controller.I_M.PrbInvData 1 0.00% 0.00% 962system.ruby.TCCdir_Controller.I_ES.RdBlkM 24 0.00% 0.00% 963system.ruby.TCCdir_Controller.I_ES.RdBlkS 34 0.00% 0.00% 964system.ruby.TCCdir_Controller.I_ES.NB_AckS 1 0.00% 0.00% 965system.ruby.TCCdir_Controller.I_ES.NB_AckE 2 0.00% 0.00% 966system.ruby.TCCdir_Controller.I_S.RdBlkM 11 0.00% 0.00% 967system.ruby.TCCdir_Controller.I_S.NB_AckS 1 0.00% 0.00% 968system.ruby.TCCdir_Controller.BBS_S.RdBlkM 5 0.00% 0.00% 969system.ruby.TCCdir_Controller.BBS_S.CPUPrbResp 1 0.00% 0.00% 970system.ruby.TCCdir_Controller.BBS_S.ProbeAcksComplete 1 0.00% 0.00% 971system.ruby.TCCdir_Controller.BBO_O.CPUPrbResp 1 0.00% 0.00% 972system.ruby.TCCdir_Controller.BBO_O.ProbeAcksComplete 1 0.00% 0.00% 973system.ruby.TCCdir_Controller.BBM_M.RdBlk 11 0.00% 0.00% 974system.ruby.TCCdir_Controller.BBM_M.RdBlkM 104 0.00% 0.00% 975system.ruby.TCCdir_Controller.BBM_M.RdBlkS 12 0.00% 0.00% 976system.ruby.TCCdir_Controller.BBM_M.CPUPrbResp 520 0.00% 0.00% 977system.ruby.TCCdir_Controller.BBM_M.ProbeAcksComplete 520 0.00% 0.00% 978system.ruby.TCCdir_Controller.BBM_M.PrbInvData 14 0.00% 0.00% 979system.ruby.TCCdir_Controller.BBM_O.RdBlkM 13 0.00% 0.00% 980system.ruby.TCCdir_Controller.BBM_O.CPUPrbResp 86 0.00% 0.00% 981system.ruby.TCCdir_Controller.BBM_O.ProbeAcksComplete 86 0.00% 0.00% 982system.ruby.TCCdir_Controller.BB_M.RdBlk 20 0.00% 0.00% 983system.ruby.TCCdir_Controller.BB_M.RdBlkM 181 0.00% 0.00% 984system.ruby.TCCdir_Controller.BB_M.RdBlkS 15 0.00% 0.00% 985system.ruby.TCCdir_Controller.BB_M.CoreUnblock 518 0.00% 0.00% 986system.ruby.TCCdir_Controller.BB_M.PrbInvData 19 0.00% 0.00% 987system.ruby.TCCdir_Controller.BB_O.RdBlkM 35 0.00% 0.00% 988system.ruby.TCCdir_Controller.BB_O.CoreUnblock 84 0.00% 0.00% 989system.ruby.TCCdir_Controller.BB_O.PrbInvData 2 0.00% 0.00% 990system.ruby.TCCdir_Controller.BB_OO.LastCoreUnblock 1 0.00% 0.00% 991system.ruby.TCCdir_Controller.BB_S.RdBlkM 9 0.00% 0.00% 992system.ruby.TCCdir_Controller.BB_S.LastCoreUnblock 1 0.00% 0.00% 993system.ruby.TCCdir_Controller.BBS_M.RdBlk 9 0.00% 0.00% 994system.ruby.TCCdir_Controller.BBS_M.RdBlkM 18 0.00% 0.00% 995system.ruby.TCCdir_Controller.BBS_M.CPUPrbResp 4 0.00% 0.00% 996system.ruby.TCCdir_Controller.BBS_M.ProbeAcksComplete 3 0.00% 0.00% 997system.ruby.TCCdir_Controller.BBO_M.RdBlkM 20 0.00% 0.00% 998system.ruby.TCCdir_Controller.BBO_M.CPUPrbResp 122 0.00% 0.00% 999system.ruby.TCCdir_Controller.BBO_M.ProbeAcksComplete 69 0.00% 0.00% 1000system.ruby.TCCdir_Controller.S_M.RdBlk 28 0.00% 0.00% 1001system.ruby.TCCdir_Controller.S_M.RdBlkM 69 0.00% 0.00% 1002system.ruby.TCCdir_Controller.S_M.NB_AckM 3 0.00% 0.00% 1003system.ruby.TCCdir_Controller.O_M.RdBlk 20 0.00% 0.00% 1004system.ruby.TCCdir_Controller.O_M.RdBlkM 249 0.00% 0.00% 1005system.ruby.TCCdir_Controller.O_M.RdBlkS 51 0.00% 0.00% 1006system.ruby.TCCdir_Controller.O_M.NB_AckM 64 0.00% 0.00% 1007system.ruby.TCCdir_Controller.O_M.PrbInvData 2 0.00% 0.00% 1008system.ruby.TCCdir_Controller.BBB_S.RdBlk 3 0.00% 0.00% 1009system.ruby.TCCdir_Controller.BBB_S.RdBlkM 23 0.00% 0.00% 1010system.ruby.TCCdir_Controller.BBB_S.RdBlkS 5 0.00% 0.00% 1011system.ruby.TCCdir_Controller.BBB_S.CoreUnblock 2 0.00% 0.00% 1012system.ruby.TCCdir_Controller.BBB_M.RdBlk 9 0.00% 0.00% 1013system.ruby.TCCdir_Controller.BBB_M.RdBlkM 206 0.00% 0.00% 1014system.ruby.TCCdir_Controller.BBB_M.RdBlkS 14 0.00% 0.00% 1015system.ruby.TCCdir_Controller.BBB_M.CoreUnblock 223 0.00% 0.00% 1016system.ruby.TCCdir_Controller.BBB_E.CoreUnblock 2 0.00% 0.00% 1017system.ruby.TCP_Controller.Load | 5 7.04% 7.04% | 6 8.45% 15.49% | 10 14.08% 29.58% | 13 18.31% 47.89% | 6 8.45% 56.34% | 6 8.45% 64.79% | 13 18.31% 83.10% | 12 16.90% 100.00% 1018system.ruby.TCP_Controller.Load::total 71 1019system.ruby.TCP_Controller.Store | 109 13.39% 13.39% | 104 12.78% 26.17% | 98 12.04% 38.21% | 93 11.43% 49.63% | 109 13.39% 63.02% | 102 12.53% 75.55% | 113 13.88% 89.43% | 86 10.57% 100.00% 1020system.ruby.TCP_Controller.Store::total 814 1021system.ruby.TCP_Controller.TCC_AckS | 5 7.94% 7.94% | 5 7.94% 15.87% | 9 14.29% 30.16% | 13 20.63% 50.79% | 4 6.35% 57.14% | 6 9.52% 66.67% | 11 17.46% 84.13% | 10 15.87% 100.00% 1022system.ruby.TCP_Controller.TCC_AckS::total 63 1023system.ruby.TCP_Controller.TCC_AckE | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 50.00% 50.00% | 1 50.00% 100.00% 1024system.ruby.TCP_Controller.TCC_AckE::total 2 1025system.ruby.TCP_Controller.TCC_AckM | 100 13.46% 13.46% | 94 12.65% 26.11% | 90 12.11% 38.22% | 81 10.90% 49.13% | 102 13.73% 62.85% | 92 12.38% 75.24% | 105 14.13% 89.37% | 79 10.63% 100.00% 1026system.ruby.TCP_Controller.TCC_AckM::total 743 1027system.ruby.TCP_Controller.PrbInvData | 88 12.61% 12.61% | 87 12.46% 25.07% | 88 12.61% 37.68% | 79 11.32% 49.00% | 90 12.89% 61.89% | 86 12.32% 74.21% | 101 14.47% 88.68% | 79 11.32% 100.00% 1028system.ruby.TCP_Controller.PrbInvData::total 698 1029system.ruby.TCP_Controller.PrbShrData | 14 15.22% 15.22% | 9 9.78% 25.00% | 17 18.48% 43.48% | 7 7.61% 51.09% | 14 15.22% 66.30% | 10 10.87% 77.17% | 12 13.04% 90.22% | 9 9.78% 100.00% 1030system.ruby.TCP_Controller.PrbShrData::total 92 1031system.ruby.TCP_Controller.I.Load | 5 7.46% 7.46% | 5 7.46% 14.93% | 9 13.43% 28.36% | 13 19.40% 47.76% | 6 8.96% 56.72% | 6 8.96% 65.67% | 12 17.91% 83.58% | 11 16.42% 100.00% 1032system.ruby.TCP_Controller.I.Load::total 67 1033system.ruby.TCP_Controller.I.Store | 98 13.26% 13.26% | 95 12.86% 26.12% | 89 12.04% 38.16% | 82 11.10% 49.26% | 99 13.40% 62.65% | 93 12.58% 75.24% | 105 14.21% 89.45% | 78 10.55% 100.00% 1034system.ruby.TCP_Controller.I.Store::total 739 1035system.ruby.TCP_Controller.I.PrbInvData | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 50.00% 50.00% | 1 50.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 1036system.ruby.TCP_Controller.I.PrbInvData::total 2 1037system.ruby.TCP_Controller.S.Store | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 20.00% 20.00% | 1 20.00% 40.00% | 0 0.00% 40.00% | 2 40.00% 80.00% | 1 20.00% 100.00% 1038system.ruby.TCP_Controller.S.Store::total 5 1039system.ruby.TCP_Controller.S.PrbInvData | 4 8.33% 8.33% | 4 8.33% 16.67% | 8 16.67% 33.33% | 9 18.75% 52.08% | 3 6.25% 58.33% | 4 8.33% 66.67% | 8 16.67% 83.33% | 8 16.67% 100.00% 1040system.ruby.TCP_Controller.S.PrbInvData::total 48 1041system.ruby.TCP_Controller.S.PrbShrData | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 1042system.ruby.TCP_Controller.S.PrbShrData::total 1 1043system.ruby.TCP_Controller.E.PrbInvData | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00% 1044system.ruby.TCP_Controller.E.PrbInvData::total 1 1045system.ruby.TCP_Controller.O.Store | 2 20.00% 20.00% | 0 0.00% 20.00% | 2 20.00% 40.00% | 0 0.00% 40.00% | 3 30.00% 70.00% | 1 10.00% 80.00% | 1 10.00% 90.00% | 1 10.00% 100.00% 1046system.ruby.TCP_Controller.O.Store::total 10 1047system.ruby.TCP_Controller.O.PrbInvData | 9 13.64% 13.64% | 7 10.61% 24.24% | 12 18.18% 42.42% | 7 10.61% 53.03% | 10 15.15% 68.18% | 5 7.58% 75.76% | 10 15.15% 90.91% | 6 9.09% 100.00% 1048system.ruby.TCP_Controller.O.PrbInvData::total 66 1049system.ruby.TCP_Controller.O.PrbShrData | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 1050system.ruby.TCP_Controller.O.PrbShrData::total 1 1051system.ruby.TCP_Controller.M.Load | 0 0.00% 0.00% | 1 25.00% 25.00% | 1 25.00% 50.00% | 0 0.00% 50.00% | 0 0.00% 50.00% | 0 0.00% 50.00% | 1 25.00% 75.00% | 1 25.00% 100.00% 1052system.ruby.TCP_Controller.M.Load::total 4 1053system.ruby.TCP_Controller.M.Store | 9 15.00% 15.00% | 9 15.00% 30.00% | 7 11.67% 41.67% | 10 16.67% 58.33% | 6 10.00% 68.33% | 8 13.33% 81.67% | 5 8.33% 90.00% | 6 10.00% 100.00% 1054system.ruby.TCP_Controller.M.Store::total 60 1055system.ruby.TCP_Controller.M.PrbInvData | 75 12.93% 12.93% | 76 13.10% 26.03% | 67 11.55% 37.59% | 62 10.69% 48.28% | 76 13.10% 61.38% | 77 13.28% 74.66% | 82 14.14% 88.79% | 65 11.21% 100.00% 1056system.ruby.TCP_Controller.M.PrbInvData::total 580 1057system.ruby.TCP_Controller.M.PrbShrData | 14 15.56% 15.56% | 8 8.89% 24.44% | 16 17.78% 42.22% | 7 7.78% 50.00% | 14 15.56% 65.56% | 10 11.11% 76.67% | 12 13.33% 90.00% | 9 10.00% 100.00% 1058system.ruby.TCP_Controller.M.PrbShrData::total 90 1059system.ruby.TCP_Controller.I_M.TCC_AckM | 98 13.42% 13.42% | 94 12.88% 26.30% | 89 12.19% 38.49% | 80 10.96% 49.45% | 98 13.42% 62.88% | 91 12.47% 75.34% | 103 14.11% 89.45% | 77 10.55% 100.00% 1060system.ruby.TCP_Controller.I_M.TCC_AckM::total 730 1061system.ruby.TCP_Controller.I_ES.TCC_AckS | 5 7.94% 7.94% | 5 7.94% 15.87% | 9 14.29% 30.16% | 13 20.63% 50.79% | 4 6.35% 57.14% | 6 9.52% 66.67% | 11 17.46% 84.13% | 10 15.87% 100.00% 1062system.ruby.TCP_Controller.I_ES.TCC_AckS::total 63 1063system.ruby.TCP_Controller.I_ES.TCC_AckE | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 50.00% 50.00% | 1 50.00% 100.00% 1064system.ruby.TCP_Controller.I_ES.TCC_AckE::total 2 1065system.ruby.TCP_Controller.S_M.TCC_AckM | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 25.00% 25.00% | 1 25.00% 50.00% | 0 0.00% 50.00% | 1 25.00% 75.00% | 1 25.00% 100.00% 1066system.ruby.TCP_Controller.S_M.TCC_AckM::total 4 1067system.ruby.TCP_Controller.O_M.TCC_AckM | 2 22.22% 22.22% | 0 0.00% 22.22% | 1 11.11% 33.33% | 0 0.00% 33.33% | 3 33.33% 66.67% | 1 11.11% 77.78% | 1 11.11% 88.89% | 1 11.11% 100.00% 1068system.ruby.TCP_Controller.O_M.TCC_AckM::total 9 1069system.ruby.TCP_Controller.O_M.PrbInvData | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 1070system.ruby.TCP_Controller.O_M.PrbInvData::total 1 1071 1072---------- End Simulation Statistics ---------- 1073