config.ini revision 10315
11736SN/A[root] 21736SN/Atype=Root 31736SN/Achildren=system 41736SN/Aeventq_index=0 51736SN/Afull_system=false 61736SN/Asim_quantum=0 71736SN/Atime_sync_enable=false 81736SN/Atime_sync_period=100000000000 91736SN/Atime_sync_spin_threshold=100000000 101736SN/A 111736SN/A[system] 121736SN/Atype=System 131736SN/Achildren=clk_domain cpu0 cpu1 cpu2 cpu3 cpu_clk_domain dvfs_handler l2c membus physmem toL2Bus voltage_domain 141736SN/Aboot_osflags=a 151736SN/Acache_line_size=64 161736SN/Aclk_domain=system.clk_domain 171736SN/Aeventq_index=0 181736SN/Ainit_param=0 191736SN/Akernel= 201736SN/Akernel_addr_check=true 211736SN/Aload_addr_mask=1099511627775 221736SN/Aload_offset=0 231736SN/Amem_mode=atomic 241736SN/Amem_ranges= 251736SN/Amemories=system.physmem 262665Ssaidi@eecs.umich.edunum_work_ids=16 272665Ssaidi@eecs.umich.edureadfile= 282665Ssaidi@eecs.umich.edusymbolfile= 291736SN/Awork_begin_ckpt_count=0 302667Sstever@eecs.umich.eduwork_begin_cpu_id_exit=-1 312655Sstever@eecs.umich.eduwork_begin_exit_count=0 322667Sstever@eecs.umich.eduwork_cpus_ckpt_count=0 332667Sstever@eecs.umich.eduwork_end_ckpt_count=0 342667Sstever@eecs.umich.eduwork_end_exit_count=0 352667Sstever@eecs.umich.eduwork_item_id=-1 362667Sstever@eecs.umich.edusystem_port=system.membus.slave[0] 372667Sstever@eecs.umich.edu 382655Sstever@eecs.umich.edu[system.clk_domain] 392667Sstever@eecs.umich.edutype=SrcClockDomain 402667Sstever@eecs.umich.educlock=1000 411530SN/Adomain_id=-1 421530SN/Aeventq_index=0 431530SN/Ainit_perf_level=0 441530SN/Avoltage_domain=system.voltage_domain 451530SN/A 461530SN/A[system.cpu0] 472667Sstever@eecs.umich.edutype=AtomicSimpleCPU 482667Sstever@eecs.umich.educhildren=dcache dtb icache interrupts isa itb tracer workload 492667Sstever@eecs.umich.edubranchPred=Null 501692SN/Achecker=Null 511869SN/Aclk_domain=system.cpu_clk_domain 521869SN/Acpu_id=0 531869SN/Ado_checkpoint_insts=true 541869SN/Ado_quiesce=true 551692SN/Ado_statistics_insts=true 561869SN/Adtb=system.cpu0.dtb 571869SN/Aeventq_index=0 581869SN/Afastmem=false 591581SN/Afunction_trace=false 602667Sstever@eecs.umich.edufunction_trace_start=0 612667Sstever@eecs.umich.eduinterrupts=system.cpu0.interrupts 622667Sstever@eecs.umich.eduisa=system.cpu0.isa 632667Sstever@eecs.umich.eduitb=system.cpu0.itb 642667Sstever@eecs.umich.edumax_insts_all_threads=0 652667Sstever@eecs.umich.edumax_insts_any_thread=0 662667Sstever@eecs.umich.edumax_loads_all_threads=0 672667Sstever@eecs.umich.edumax_loads_any_thread=0 682667Sstever@eecs.umich.edunumThreads=1 692667Sstever@eecs.umich.eduprofile=0 702667Sstever@eecs.umich.eduprogress_interval=0 712667Sstever@eecs.umich.edusimpoint_interval=100000000 722667Sstever@eecs.umich.edusimpoint_profile=false 731530SN/Asimpoint_profile_file=simpoint.bb.gz 741530SN/Asimpoint_start_insts= 751530SN/Asimulate_data_stalls=false 761530SN/Asimulate_inst_stalls=false 772667Sstever@eecs.umich.edusocket_id=0 781530SN/Aswitched_out=false 791530SN/Asystem=system 801530SN/Atracer=system.cpu0.tracer 811530SN/Awidth=1 821530SN/Aworkload=system.cpu0.workload 832738Sstever@eecs.umich.edudcache_port=system.cpu0.dcache.cpu_side 842738Sstever@eecs.umich.eduicache_port=system.cpu0.icache.cpu_side 852738Sstever@eecs.umich.edu 862738Sstever@eecs.umich.edu[system.cpu0.dcache] 872738Sstever@eecs.umich.edutype=BaseCache 882738Sstever@eecs.umich.educhildren=tags 892738Sstever@eecs.umich.eduaddr_ranges=0:18446744073709551615 902738Sstever@eecs.umich.eduassoc=4 912738Sstever@eecs.umich.educlk_domain=system.cpu_clk_domain 922738Sstever@eecs.umich.edueventq_index=0 932667Sstever@eecs.umich.eduforward_snoops=true 942667Sstever@eecs.umich.eduhit_latency=2 952667Sstever@eecs.umich.eduis_top_level=true 962667Sstever@eecs.umich.edumax_miss_count=0 972667Sstever@eecs.umich.edumshrs=4 982667Sstever@eecs.umich.eduprefetch_on_access=false 992667Sstever@eecs.umich.eduprefetcher=Null 1002667Sstever@eecs.umich.eduresponse_latency=2 1012667Sstever@eecs.umich.edusequential_access=false 1022738Sstever@eecs.umich.edusize=32768 1032738Sstever@eecs.umich.edusystem=system 1042738Sstever@eecs.umich.edutags=system.cpu0.dcache.tags 1052738Sstever@eecs.umich.edutgts_per_mshr=20 1062667Sstever@eecs.umich.edutwo_queue=false 1072667Sstever@eecs.umich.eduwrite_buffers=8 1082667Sstever@eecs.umich.educpu_side=system.cpu0.dcache_port 1092667Sstever@eecs.umich.edumem_side=system.toL2Bus.slave[1] 1102667Sstever@eecs.umich.edu 1112667Sstever@eecs.umich.edu[system.cpu0.dcache.tags] 1122667Sstever@eecs.umich.edutype=LRU 1132667Sstever@eecs.umich.eduassoc=4 1142667Sstever@eecs.umich.edublock_size=64 1152667Sstever@eecs.umich.educlk_domain=system.cpu_clk_domain 1161527SN/Aeventq_index=0 1172667Sstever@eecs.umich.eduhit_latency=2 1182667Sstever@eecs.umich.edusequential_access=false 1192667Sstever@eecs.umich.edusize=32768 1201511SN/A 1212667Sstever@eecs.umich.edu[system.cpu0.dtb] 1222667Sstever@eecs.umich.edutype=SparcTLB 1232655Sstever@eecs.umich.edueventq_index=0 1242667Sstever@eecs.umich.edusize=64 1252667Sstever@eecs.umich.edu 1262667Sstever@eecs.umich.edu[system.cpu0.icache] 1272667Sstever@eecs.umich.edutype=BaseCache 128children=tags 129addr_ranges=0:18446744073709551615 130assoc=1 131clk_domain=system.cpu_clk_domain 132eventq_index=0 133forward_snoops=true 134hit_latency=2 135is_top_level=true 136max_miss_count=0 137mshrs=4 138prefetch_on_access=false 139prefetcher=Null 140response_latency=2 141sequential_access=false 142size=32768 143system=system 144tags=system.cpu0.icache.tags 145tgts_per_mshr=20 146two_queue=false 147write_buffers=8 148cpu_side=system.cpu0.icache_port 149mem_side=system.toL2Bus.slave[0] 150 151[system.cpu0.icache.tags] 152type=LRU 153assoc=1 154block_size=64 155clk_domain=system.cpu_clk_domain 156eventq_index=0 157hit_latency=2 158sequential_access=false 159size=32768 160 161[system.cpu0.interrupts] 162type=SparcInterrupts 163eventq_index=0 164 165[system.cpu0.isa] 166type=SparcISA 167eventq_index=0 168 169[system.cpu0.itb] 170type=SparcTLB 171eventq_index=0 172size=64 173 174[system.cpu0.tracer] 175type=ExeTracer 176eventq_index=0 177 178[system.cpu0.workload] 179type=LiveProcess 180cmd=test_atomic 4 181cwd= 182egid=100 183env= 184errout=cerr 185euid=100 186eventq_index=0 187executable=/scratch/nilay/GEM5/gem5/tests/test-progs/m5threads/bin/sparc/linux/test_atomic 188gid=100 189input=cin 190max_stack_size=67108864 191output=cout 192pid=100 193ppid=99 194simpoint=0 195system=system 196uid=100 197 198[system.cpu1] 199type=AtomicSimpleCPU 200children=dcache dtb icache interrupts isa itb tracer 201branchPred=Null 202checker=Null 203clk_domain=system.cpu_clk_domain 204cpu_id=1 205do_checkpoint_insts=true 206do_quiesce=true 207do_statistics_insts=true 208dtb=system.cpu1.dtb 209eventq_index=0 210fastmem=false 211function_trace=false 212function_trace_start=0 213interrupts=system.cpu1.interrupts 214isa=system.cpu1.isa 215itb=system.cpu1.itb 216max_insts_all_threads=0 217max_insts_any_thread=0 218max_loads_all_threads=0 219max_loads_any_thread=0 220numThreads=1 221profile=0 222progress_interval=0 223simpoint_interval=100000000 224simpoint_profile=false 225simpoint_profile_file=simpoint.bb.gz 226simpoint_start_insts= 227simulate_data_stalls=false 228simulate_inst_stalls=false 229socket_id=0 230switched_out=false 231system=system 232tracer=system.cpu1.tracer 233width=1 234workload=system.cpu0.workload 235dcache_port=system.cpu1.dcache.cpu_side 236icache_port=system.cpu1.icache.cpu_side 237 238[system.cpu1.dcache] 239type=BaseCache 240children=tags 241addr_ranges=0:18446744073709551615 242assoc=4 243clk_domain=system.cpu_clk_domain 244eventq_index=0 245forward_snoops=true 246hit_latency=2 247is_top_level=true 248max_miss_count=0 249mshrs=4 250prefetch_on_access=false 251prefetcher=Null 252response_latency=2 253sequential_access=false 254size=32768 255system=system 256tags=system.cpu1.dcache.tags 257tgts_per_mshr=20 258two_queue=false 259write_buffers=8 260cpu_side=system.cpu1.dcache_port 261mem_side=system.toL2Bus.slave[3] 262 263[system.cpu1.dcache.tags] 264type=LRU 265assoc=4 266block_size=64 267clk_domain=system.cpu_clk_domain 268eventq_index=0 269hit_latency=2 270sequential_access=false 271size=32768 272 273[system.cpu1.dtb] 274type=SparcTLB 275eventq_index=0 276size=64 277 278[system.cpu1.icache] 279type=BaseCache 280children=tags 281addr_ranges=0:18446744073709551615 282assoc=1 283clk_domain=system.cpu_clk_domain 284eventq_index=0 285forward_snoops=true 286hit_latency=2 287is_top_level=true 288max_miss_count=0 289mshrs=4 290prefetch_on_access=false 291prefetcher=Null 292response_latency=2 293sequential_access=false 294size=32768 295system=system 296tags=system.cpu1.icache.tags 297tgts_per_mshr=20 298two_queue=false 299write_buffers=8 300cpu_side=system.cpu1.icache_port 301mem_side=system.toL2Bus.slave[2] 302 303[system.cpu1.icache.tags] 304type=LRU 305assoc=1 306block_size=64 307clk_domain=system.cpu_clk_domain 308eventq_index=0 309hit_latency=2 310sequential_access=false 311size=32768 312 313[system.cpu1.interrupts] 314type=SparcInterrupts 315eventq_index=0 316 317[system.cpu1.isa] 318type=SparcISA 319eventq_index=0 320 321[system.cpu1.itb] 322type=SparcTLB 323eventq_index=0 324size=64 325 326[system.cpu1.tracer] 327type=ExeTracer 328eventq_index=0 329 330[system.cpu2] 331type=AtomicSimpleCPU 332children=dcache dtb icache interrupts isa itb tracer 333branchPred=Null 334checker=Null 335clk_domain=system.cpu_clk_domain 336cpu_id=2 337do_checkpoint_insts=true 338do_quiesce=true 339do_statistics_insts=true 340dtb=system.cpu2.dtb 341eventq_index=0 342fastmem=false 343function_trace=false 344function_trace_start=0 345interrupts=system.cpu2.interrupts 346isa=system.cpu2.isa 347itb=system.cpu2.itb 348max_insts_all_threads=0 349max_insts_any_thread=0 350max_loads_all_threads=0 351max_loads_any_thread=0 352numThreads=1 353profile=0 354progress_interval=0 355simpoint_interval=100000000 356simpoint_profile=false 357simpoint_profile_file=simpoint.bb.gz 358simpoint_start_insts= 359simulate_data_stalls=false 360simulate_inst_stalls=false 361socket_id=0 362switched_out=false 363system=system 364tracer=system.cpu2.tracer 365width=1 366workload=system.cpu0.workload 367dcache_port=system.cpu2.dcache.cpu_side 368icache_port=system.cpu2.icache.cpu_side 369 370[system.cpu2.dcache] 371type=BaseCache 372children=tags 373addr_ranges=0:18446744073709551615 374assoc=4 375clk_domain=system.cpu_clk_domain 376eventq_index=0 377forward_snoops=true 378hit_latency=2 379is_top_level=true 380max_miss_count=0 381mshrs=4 382prefetch_on_access=false 383prefetcher=Null 384response_latency=2 385sequential_access=false 386size=32768 387system=system 388tags=system.cpu2.dcache.tags 389tgts_per_mshr=20 390two_queue=false 391write_buffers=8 392cpu_side=system.cpu2.dcache_port 393mem_side=system.toL2Bus.slave[5] 394 395[system.cpu2.dcache.tags] 396type=LRU 397assoc=4 398block_size=64 399clk_domain=system.cpu_clk_domain 400eventq_index=0 401hit_latency=2 402sequential_access=false 403size=32768 404 405[system.cpu2.dtb] 406type=SparcTLB 407eventq_index=0 408size=64 409 410[system.cpu2.icache] 411type=BaseCache 412children=tags 413addr_ranges=0:18446744073709551615 414assoc=1 415clk_domain=system.cpu_clk_domain 416eventq_index=0 417forward_snoops=true 418hit_latency=2 419is_top_level=true 420max_miss_count=0 421mshrs=4 422prefetch_on_access=false 423prefetcher=Null 424response_latency=2 425sequential_access=false 426size=32768 427system=system 428tags=system.cpu2.icache.tags 429tgts_per_mshr=20 430two_queue=false 431write_buffers=8 432cpu_side=system.cpu2.icache_port 433mem_side=system.toL2Bus.slave[4] 434 435[system.cpu2.icache.tags] 436type=LRU 437assoc=1 438block_size=64 439clk_domain=system.cpu_clk_domain 440eventq_index=0 441hit_latency=2 442sequential_access=false 443size=32768 444 445[system.cpu2.interrupts] 446type=SparcInterrupts 447eventq_index=0 448 449[system.cpu2.isa] 450type=SparcISA 451eventq_index=0 452 453[system.cpu2.itb] 454type=SparcTLB 455eventq_index=0 456size=64 457 458[system.cpu2.tracer] 459type=ExeTracer 460eventq_index=0 461 462[system.cpu3] 463type=AtomicSimpleCPU 464children=dcache dtb icache interrupts isa itb tracer 465branchPred=Null 466checker=Null 467clk_domain=system.cpu_clk_domain 468cpu_id=3 469do_checkpoint_insts=true 470do_quiesce=true 471do_statistics_insts=true 472dtb=system.cpu3.dtb 473eventq_index=0 474fastmem=false 475function_trace=false 476function_trace_start=0 477interrupts=system.cpu3.interrupts 478isa=system.cpu3.isa 479itb=system.cpu3.itb 480max_insts_all_threads=0 481max_insts_any_thread=0 482max_loads_all_threads=0 483max_loads_any_thread=0 484numThreads=1 485profile=0 486progress_interval=0 487simpoint_interval=100000000 488simpoint_profile=false 489simpoint_profile_file=simpoint.bb.gz 490simpoint_start_insts= 491simulate_data_stalls=false 492simulate_inst_stalls=false 493socket_id=0 494switched_out=false 495system=system 496tracer=system.cpu3.tracer 497width=1 498workload=system.cpu0.workload 499dcache_port=system.cpu3.dcache.cpu_side 500icache_port=system.cpu3.icache.cpu_side 501 502[system.cpu3.dcache] 503type=BaseCache 504children=tags 505addr_ranges=0:18446744073709551615 506assoc=4 507clk_domain=system.cpu_clk_domain 508eventq_index=0 509forward_snoops=true 510hit_latency=2 511is_top_level=true 512max_miss_count=0 513mshrs=4 514prefetch_on_access=false 515prefetcher=Null 516response_latency=2 517sequential_access=false 518size=32768 519system=system 520tags=system.cpu3.dcache.tags 521tgts_per_mshr=20 522two_queue=false 523write_buffers=8 524cpu_side=system.cpu3.dcache_port 525mem_side=system.toL2Bus.slave[7] 526 527[system.cpu3.dcache.tags] 528type=LRU 529assoc=4 530block_size=64 531clk_domain=system.cpu_clk_domain 532eventq_index=0 533hit_latency=2 534sequential_access=false 535size=32768 536 537[system.cpu3.dtb] 538type=SparcTLB 539eventq_index=0 540size=64 541 542[system.cpu3.icache] 543type=BaseCache 544children=tags 545addr_ranges=0:18446744073709551615 546assoc=1 547clk_domain=system.cpu_clk_domain 548eventq_index=0 549forward_snoops=true 550hit_latency=2 551is_top_level=true 552max_miss_count=0 553mshrs=4 554prefetch_on_access=false 555prefetcher=Null 556response_latency=2 557sequential_access=false 558size=32768 559system=system 560tags=system.cpu3.icache.tags 561tgts_per_mshr=20 562two_queue=false 563write_buffers=8 564cpu_side=system.cpu3.icache_port 565mem_side=system.toL2Bus.slave[6] 566 567[system.cpu3.icache.tags] 568type=LRU 569assoc=1 570block_size=64 571clk_domain=system.cpu_clk_domain 572eventq_index=0 573hit_latency=2 574sequential_access=false 575size=32768 576 577[system.cpu3.interrupts] 578type=SparcInterrupts 579eventq_index=0 580 581[system.cpu3.isa] 582type=SparcISA 583eventq_index=0 584 585[system.cpu3.itb] 586type=SparcTLB 587eventq_index=0 588size=64 589 590[system.cpu3.tracer] 591type=ExeTracer 592eventq_index=0 593 594[system.cpu_clk_domain] 595type=SrcClockDomain 596clock=500 597domain_id=-1 598eventq_index=0 599init_perf_level=0 600voltage_domain=system.voltage_domain 601 602[system.dvfs_handler] 603type=DVFSHandler 604domains= 605enable=false 606eventq_index=0 607sys_clk_domain=system.clk_domain 608transition_latency=100000000 609 610[system.l2c] 611type=BaseCache 612children=tags 613addr_ranges=0:18446744073709551615 614assoc=8 615clk_domain=system.cpu_clk_domain 616eventq_index=0 617forward_snoops=true 618hit_latency=20 619is_top_level=false 620max_miss_count=0 621mshrs=20 622prefetch_on_access=false 623prefetcher=Null 624response_latency=20 625sequential_access=false 626size=4194304 627system=system 628tags=system.l2c.tags 629tgts_per_mshr=12 630two_queue=false 631write_buffers=8 632cpu_side=system.toL2Bus.master[0] 633mem_side=system.membus.slave[1] 634 635[system.l2c.tags] 636type=LRU 637assoc=8 638block_size=64 639clk_domain=system.cpu_clk_domain 640eventq_index=0 641hit_latency=20 642sequential_access=false 643size=4194304 644 645[system.membus] 646type=CoherentBus 647clk_domain=system.clk_domain 648eventq_index=0 649header_cycles=1 650system=system 651use_default_range=false 652width=8 653master=system.physmem.port 654slave=system.system_port system.l2c.mem_side 655 656[system.physmem] 657type=SimpleMemory 658bandwidth=73.000000 659clk_domain=system.clk_domain 660conf_table_reported=true 661eventq_index=0 662in_addr_map=true 663latency=30000 664latency_var=0 665null=false 666range=0:134217727 667port=system.membus.master[0] 668 669[system.toL2Bus] 670type=CoherentBus 671clk_domain=system.cpu_clk_domain 672eventq_index=0 673header_cycles=1 674system=system 675use_default_range=false 676width=8 677master=system.l2c.cpu_side 678slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side 679 680[system.voltage_domain] 681type=VoltageDomain 682eventq_index=0 683voltage=1.000000 684 685