config.ini revision 11106:878dd30741c4
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu dvfs_handler l2bus l2cache mem_ctrl membus 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain 17eventq_index=0 18init_param=0 19kernel= 20kernel_addr_check=true 21load_addr_mask=1099511627775 22load_offset=0 23mem_mode=timing 24mem_ranges=0:536870911 25memories=system.mem_ctrl 26mmap_using_noreserve=false 27num_work_ids=16 28readfile= 29symbolfile= 30work_begin_ckpt_count=0 31work_begin_cpu_id_exit=-1 32work_begin_exit_count=0 33work_cpus_ckpt_count=0 34work_end_ckpt_count=0 35work_end_exit_count=0 36work_item_id=-1 37system_port=system.membus.slave[1] 38 39[system.clk_domain] 40type=SrcClockDomain 41children=voltage_domain 42clock=1000 43domain_id=-1 44eventq_index=0 45init_perf_level=0 46voltage_domain=system.clk_domain.voltage_domain 47 48[system.clk_domain.voltage_domain] 49type=VoltageDomain 50eventq_index=0 51voltage=1.000000 52 53[system.cpu] 54type=TimingSimpleCPU 55children=dcache dtb icache interrupts isa itb tracer workload 56branchPred=Null 57checker=Null 58clk_domain=system.clk_domain 59cpu_id=-1 60do_checkpoint_insts=true 61do_quiesce=true 62do_statistics_insts=true 63dtb=system.cpu.dtb 64eventq_index=0 65function_trace=false 66function_trace_start=0 67interrupts=system.cpu.interrupts 68isa=system.cpu.isa 69itb=system.cpu.itb 70max_insts_all_threads=0 71max_insts_any_thread=0 72max_loads_all_threads=0 73max_loads_any_thread=0 74numThreads=1 75profile=0 76progress_interval=0 77simpoint_start_insts= 78socket_id=0 79switched_out=false 80system=system 81tracer=system.cpu.tracer 82workload=system.cpu.workload 83dcache_port=system.cpu.dcache.cpu_side 84icache_port=system.cpu.icache.cpu_side 85 86[system.cpu.dcache] 87type=Cache 88children=tags 89addr_ranges=0:18446744073709551615 90assoc=2 91clk_domain=system.clk_domain 92demand_mshr_reserve=1 93eventq_index=0 94forward_snoops=true 95hit_latency=2 96is_read_only=false 97max_miss_count=0 98mshrs=4 99prefetch_on_access=false 100prefetcher=Null 101response_latency=2 102sequential_access=false 103size=65536 104system=system 105tags=system.cpu.dcache.tags 106tgts_per_mshr=20 107write_buffers=8 108cpu_side=system.cpu.dcache_port 109mem_side=system.l2bus.slave[1] 110 111[system.cpu.dcache.tags] 112type=LRU 113assoc=2 114block_size=64 115clk_domain=system.clk_domain 116eventq_index=0 117hit_latency=2 118sequential_access=false 119size=65536 120 121[system.cpu.dtb] 122type=MipsTLB 123eventq_index=0 124size=64 125 126[system.cpu.icache] 127type=Cache 128children=tags 129addr_ranges=0:18446744073709551615 130assoc=2 131clk_domain=system.clk_domain 132demand_mshr_reserve=1 133eventq_index=0 134forward_snoops=true 135hit_latency=2 136is_read_only=false 137max_miss_count=0 138mshrs=4 139prefetch_on_access=false 140prefetcher=Null 141response_latency=2 142sequential_access=false 143size=16384 144system=system 145tags=system.cpu.icache.tags 146tgts_per_mshr=20 147write_buffers=8 148cpu_side=system.cpu.icache_port 149mem_side=system.l2bus.slave[0] 150 151[system.cpu.icache.tags] 152type=LRU 153assoc=2 154block_size=64 155clk_domain=system.clk_domain 156eventq_index=0 157hit_latency=2 158sequential_access=false 159size=16384 160 161[system.cpu.interrupts] 162type=MipsInterrupts 163eventq_index=0 164 165[system.cpu.isa] 166type=MipsISA 167eventq_index=0 168num_threads=1 169num_vpes=1 170system=system 171 172[system.cpu.itb] 173type=MipsTLB 174eventq_index=0 175size=64 176 177[system.cpu.tracer] 178type=ExeTracer 179eventq_index=0 180 181[system.cpu.workload] 182type=LiveProcess 183cmd=tests/test-progs/hello/bin/mips/linux/hello 184cwd= 185drivers= 186egid=100 187env= 188errout=cerr 189euid=100 190eventq_index=0 191executable= 192gid=100 193input=cin 194kvmInSE=false 195max_stack_size=67108864 196output=cout 197pid=100 198ppid=99 199simpoint=0 200system=system 201uid=100 202useArchPT=false 203 204[system.dvfs_handler] 205type=DVFSHandler 206domains= 207enable=false 208eventq_index=0 209sys_clk_domain=system.clk_domain 210transition_latency=100000000 211 212[system.l2bus] 213type=CoherentXBar 214clk_domain=system.clk_domain 215eventq_index=0 216forward_latency=0 217frontend_latency=1 218response_latency=1 219snoop_filter=Null 220snoop_response_latency=1 221system=system 222use_default_range=false 223width=32 224master=system.l2cache.cpu_side 225slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side 226 227[system.l2cache] 228type=Cache 229children=tags 230addr_ranges=0:18446744073709551615 231assoc=8 232clk_domain=system.clk_domain 233demand_mshr_reserve=1 234eventq_index=0 235forward_snoops=true 236hit_latency=20 237is_read_only=false 238max_miss_count=0 239mshrs=20 240prefetch_on_access=false 241prefetcher=Null 242response_latency=20 243sequential_access=false 244size=262144 245system=system 246tags=system.l2cache.tags 247tgts_per_mshr=12 248write_buffers=8 249cpu_side=system.l2bus.master[0] 250mem_side=system.membus.slave[0] 251 252[system.l2cache.tags] 253type=LRU 254assoc=8 255block_size=64 256clk_domain=system.clk_domain 257eventq_index=0 258hit_latency=20 259sequential_access=false 260size=262144 261 262[system.mem_ctrl] 263type=DRAMCtrl 264IDD0=0.075000 265IDD02=0.000000 266IDD2N=0.050000 267IDD2N2=0.000000 268IDD2P0=0.000000 269IDD2P02=0.000000 270IDD2P1=0.000000 271IDD2P12=0.000000 272IDD3N=0.057000 273IDD3N2=0.000000 274IDD3P0=0.000000 275IDD3P02=0.000000 276IDD3P1=0.000000 277IDD3P12=0.000000 278IDD4R=0.187000 279IDD4R2=0.000000 280IDD4W=0.165000 281IDD4W2=0.000000 282IDD5=0.220000 283IDD52=0.000000 284IDD6=0.000000 285IDD62=0.000000 286VDD=1.500000 287VDD2=0.000000 288activation_limit=4 289addr_mapping=RoRaBaCoCh 290bank_groups_per_rank=0 291banks_per_rank=8 292burst_length=8 293channels=1 294clk_domain=system.clk_domain 295conf_table_reported=true 296device_bus_width=8 297device_rowbuffer_size=1024 298device_size=536870912 299devices_per_rank=8 300dll=true 301eventq_index=0 302in_addr_map=true 303max_accesses_per_row=16 304mem_sched_policy=frfcfs 305min_writes_per_switch=16 306null=false 307page_policy=open_adaptive 308range=0:536870911 309ranks_per_channel=2 310read_buffer_size=32 311static_backend_latency=10000 312static_frontend_latency=10000 313tBURST=5000 314tCCD_L=0 315tCK=1250 316tCL=13750 317tCS=2500 318tRAS=35000 319tRCD=13750 320tREFI=7800000 321tRFC=260000 322tRP=13750 323tRRD=6000 324tRRD_L=0 325tRTP=7500 326tRTW=2500 327tWR=15000 328tWTR=7500 329tXAW=30000 330tXP=0 331tXPDLL=0 332tXS=0 333tXSDLL=0 334write_buffer_size=64 335write_high_thresh_perc=85 336write_low_thresh_perc=50 337port=system.membus.master[0] 338 339[system.membus] 340type=CoherentXBar 341clk_domain=system.clk_domain 342eventq_index=0 343forward_latency=4 344frontend_latency=3 345response_latency=2 346snoop_filter=Null 347snoop_response_latency=4 348system=system 349use_default_range=false 350width=16 351master=system.mem_ctrl.port 352slave=system.l2cache.mem_side system.system_port 353 354