config.ini revision 11312:3d7a85d71bd1
11196Shsul@eecs.umich.edu[root]
21196Shsul@eecs.umich.edutype=Root
31196Shsul@eecs.umich.educhildren=system
41196Shsul@eecs.umich.edueventq_index=0
51196Shsul@eecs.umich.edufull_system=false
61196Shsul@eecs.umich.edusim_quantum=0
71196Shsul@eecs.umich.edutime_sync_enable=false
81242Ssaidi@eecs.umich.edutime_sync_period=100000000000
91196Shsul@eecs.umich.edutime_sync_spin_threshold=100000000
101196Shsul@eecs.umich.edu
111196Shsul@eecs.umich.edu[system]
121196Shsul@eecs.umich.edutype=System
131196Shsul@eecs.umich.educhildren=clk_domain cpu dvfs_handler mem_ctrl membus
141196Shsul@eecs.umich.eduboot_osflags=a
151196Shsul@eecs.umich.educache_line_size=64
161196Shsul@eecs.umich.educlk_domain=system.clk_domain
171196Shsul@eecs.umich.edueventq_index=0
181196Shsul@eecs.umich.eduexit_on_work_items=false
191196Shsul@eecs.umich.eduinit_param=0
201196Shsul@eecs.umich.edukernel=
211196Shsul@eecs.umich.edukernel_addr_check=true
221196Shsul@eecs.umich.eduload_addr_mask=1099511627775
231196Shsul@eecs.umich.eduload_offset=0
241196Shsul@eecs.umich.edumem_mode=timing
251196Shsul@eecs.umich.edumem_ranges=0:536870911
261196Shsul@eecs.umich.edumemories=system.mem_ctrl
271196Shsul@eecs.umich.edummap_using_noreserve=false
281196Shsul@eecs.umich.edumulti_thread=false
291196Shsul@eecs.umich.edunum_work_ids=16
301196Shsul@eecs.umich.edureadfile=
311196Shsul@eecs.umich.edusymbolfile=
321196Shsul@eecs.umich.eduwork_begin_ckpt_count=0
331196Shsul@eecs.umich.eduwork_begin_cpu_id_exit=-1
341196Shsul@eecs.umich.eduwork_begin_exit_count=0
351196Shsul@eecs.umich.eduwork_cpus_ckpt_count=0
361196Shsul@eecs.umich.eduwork_end_ckpt_count=0
371196Shsul@eecs.umich.eduwork_end_exit_count=0
381196Shsul@eecs.umich.eduwork_item_id=-1
391196Shsul@eecs.umich.edusystem_port=system.membus.slave[2]
401196Shsul@eecs.umich.edu
411196Shsul@eecs.umich.edu[system.clk_domain]
421196Shsul@eecs.umich.edutype=SrcClockDomain
431196Shsul@eecs.umich.educhildren=voltage_domain
441196Shsul@eecs.umich.educlock=1000
451196Shsul@eecs.umich.edudomain_id=-1
461196Shsul@eecs.umich.edueventq_index=0
471196Shsul@eecs.umich.eduinit_perf_level=0
481196Shsul@eecs.umich.eduvoltage_domain=system.clk_domain.voltage_domain
491196Shsul@eecs.umich.edu
501196Shsul@eecs.umich.edu[system.clk_domain.voltage_domain]
511196Shsul@eecs.umich.edutype=VoltageDomain
521196Shsul@eecs.umich.edueventq_index=0
531196Shsul@eecs.umich.eduvoltage=1.000000
541196Shsul@eecs.umich.edu
551196Shsul@eecs.umich.edu[system.cpu]
561196Shsul@eecs.umich.edutype=TimingSimpleCPU
57children=dtb interrupts isa itb tracer workload
58branchPred=Null
59checker=Null
60clk_domain=system.clk_domain
61cpu_id=-1
62do_checkpoint_insts=true
63do_quiesce=true
64do_statistics_insts=true
65dtb=system.cpu.dtb
66eventq_index=0
67function_trace=false
68function_trace_start=0
69interrupts=system.cpu.interrupts
70isa=system.cpu.isa
71itb=system.cpu.itb
72max_insts_all_threads=0
73max_insts_any_thread=0
74max_loads_all_threads=0
75max_loads_any_thread=0
76numThreads=1
77profile=0
78progress_interval=0
79simpoint_start_insts=
80socket_id=0
81switched_out=false
82system=system
83tracer=system.cpu.tracer
84workload=system.cpu.workload
85dcache_port=system.membus.slave[1]
86icache_port=system.membus.slave[0]
87
88[system.cpu.dtb]
89type=MipsTLB
90eventq_index=0
91size=64
92
93[system.cpu.interrupts]
94type=MipsInterrupts
95eventq_index=0
96
97[system.cpu.isa]
98type=MipsISA
99eventq_index=0
100num_threads=1
101num_vpes=1
102system=system
103
104[system.cpu.itb]
105type=MipsTLB
106eventq_index=0
107size=64
108
109[system.cpu.tracer]
110type=ExeTracer
111eventq_index=0
112
113[system.cpu.workload]
114type=LiveProcess
115cmd=tests/test-progs/hello/bin/mips/linux/hello
116cwd=
117drivers=
118egid=100
119env=
120errout=cerr
121euid=100
122eventq_index=0
123executable=
124gid=100
125input=cin
126kvmInSE=false
127max_stack_size=67108864
128output=cout
129pid=100
130ppid=99
131simpoint=0
132system=system
133uid=100
134useArchPT=false
135
136[system.dvfs_handler]
137type=DVFSHandler
138domains=
139enable=false
140eventq_index=0
141sys_clk_domain=system.clk_domain
142transition_latency=100000000
143
144[system.mem_ctrl]
145type=DRAMCtrl
146IDD0=0.075000
147IDD02=0.000000
148IDD2N=0.050000
149IDD2N2=0.000000
150IDD2P0=0.000000
151IDD2P02=0.000000
152IDD2P1=0.000000
153IDD2P12=0.000000
154IDD3N=0.057000
155IDD3N2=0.000000
156IDD3P0=0.000000
157IDD3P02=0.000000
158IDD3P1=0.000000
159IDD3P12=0.000000
160IDD4R=0.187000
161IDD4R2=0.000000
162IDD4W=0.165000
163IDD4W2=0.000000
164IDD5=0.220000
165IDD52=0.000000
166IDD6=0.000000
167IDD62=0.000000
168VDD=1.500000
169VDD2=0.000000
170activation_limit=4
171addr_mapping=RoRaBaCoCh
172bank_groups_per_rank=0
173banks_per_rank=8
174burst_length=8
175channels=1
176clk_domain=system.clk_domain
177conf_table_reported=true
178device_bus_width=8
179device_rowbuffer_size=1024
180device_size=536870912
181devices_per_rank=8
182dll=true
183eventq_index=0
184in_addr_map=true
185max_accesses_per_row=16
186mem_sched_policy=frfcfs
187min_writes_per_switch=16
188null=false
189page_policy=open_adaptive
190range=0:536870911
191ranks_per_channel=2
192read_buffer_size=32
193static_backend_latency=10000
194static_frontend_latency=10000
195tBURST=5000
196tCCD_L=0
197tCK=1250
198tCL=13750
199tCS=2500
200tRAS=35000
201tRCD=13750
202tREFI=7800000
203tRFC=260000
204tRP=13750
205tRRD=6000
206tRRD_L=0
207tRTP=7500
208tRTW=2500
209tWR=15000
210tWTR=7500
211tXAW=30000
212tXP=0
213tXPDLL=0
214tXS=0
215tXSDLL=0
216write_buffer_size=64
217write_high_thresh_perc=85
218write_low_thresh_perc=50
219port=system.membus.master[0]
220
221[system.membus]
222type=CoherentXBar
223clk_domain=system.clk_domain
224eventq_index=0
225forward_latency=4
226frontend_latency=3
227response_latency=2
228snoop_filter=Null
229snoop_response_latency=4
230system=system
231use_default_range=false
232width=16
233master=system.mem_ctrl.port
234slave=system.cpu.icache_port system.cpu.dcache_port system.system_port
235
236