config.ini revision 11312:3d7a85d71bd1
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu dvfs_handler l2bus l2cache mem_ctrl membus 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain 17eventq_index=0 18exit_on_work_items=false 19init_param=0 20kernel= 21kernel_addr_check=true 22load_addr_mask=1099511627775 23load_offset=0 24mem_mode=timing 25mem_ranges=0:536870911 26memories=system.mem_ctrl 27mmap_using_noreserve=false 28multi_thread=false 29num_work_ids=16 30readfile= 31symbolfile= 32work_begin_ckpt_count=0 33work_begin_cpu_id_exit=-1 34work_begin_exit_count=0 35work_cpus_ckpt_count=0 36work_end_ckpt_count=0 37work_end_exit_count=0 38work_item_id=-1 39system_port=system.membus.slave[1] 40 41[system.clk_domain] 42type=SrcClockDomain 43children=voltage_domain 44clock=1000 45domain_id=-1 46eventq_index=0 47init_perf_level=0 48voltage_domain=system.clk_domain.voltage_domain 49 50[system.clk_domain.voltage_domain] 51type=VoltageDomain 52eventq_index=0 53voltage=1.000000 54 55[system.cpu] 56type=TimingSimpleCPU 57children=dcache dstage2_mmu dtb icache interrupts isa istage2_mmu itb tracer workload 58branchPred=Null 59checker=Null 60clk_domain=system.clk_domain 61cpu_id=-1 62do_checkpoint_insts=true 63do_quiesce=true 64do_statistics_insts=true 65dstage2_mmu=system.cpu.dstage2_mmu 66dtb=system.cpu.dtb 67eventq_index=0 68function_trace=false 69function_trace_start=0 70interrupts=system.cpu.interrupts 71isa=system.cpu.isa 72istage2_mmu=system.cpu.istage2_mmu 73itb=system.cpu.itb 74max_insts_all_threads=0 75max_insts_any_thread=0 76max_loads_all_threads=0 77max_loads_any_thread=0 78numThreads=1 79profile=0 80progress_interval=0 81simpoint_start_insts= 82socket_id=0 83switched_out=false 84system=system 85tracer=system.cpu.tracer 86workload=system.cpu.workload 87dcache_port=system.cpu.dcache.cpu_side 88icache_port=system.cpu.icache.cpu_side 89 90[system.cpu.dcache] 91type=Cache 92children=tags 93addr_ranges=0:18446744073709551615 94assoc=2 95clk_domain=system.clk_domain 96clusivity=mostly_incl 97demand_mshr_reserve=1 98eventq_index=0 99forward_snoops=true 100hit_latency=2 101is_read_only=false 102max_miss_count=0 103mshrs=4 104prefetch_on_access=false 105prefetcher=Null 106response_latency=2 107sequential_access=false 108size=65536 109system=system 110tags=system.cpu.dcache.tags 111tgts_per_mshr=20 112write_buffers=8 113writeback_clean=false 114cpu_side=system.cpu.dcache_port 115mem_side=system.l2bus.slave[1] 116 117[system.cpu.dcache.tags] 118type=LRU 119assoc=2 120block_size=64 121clk_domain=system.clk_domain 122eventq_index=0 123hit_latency=2 124sequential_access=false 125size=65536 126 127[system.cpu.dstage2_mmu] 128type=ArmStage2MMU 129children=stage2_tlb 130eventq_index=0 131stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb 132sys=system 133tlb=system.cpu.dtb 134 135[system.cpu.dstage2_mmu.stage2_tlb] 136type=ArmTLB 137children=walker 138eventq_index=0 139is_stage2=true 140size=32 141walker=system.cpu.dstage2_mmu.stage2_tlb.walker 142 143[system.cpu.dstage2_mmu.stage2_tlb.walker] 144type=ArmTableWalker 145clk_domain=system.clk_domain 146eventq_index=0 147is_stage2=true 148num_squash_per_cycle=2 149sys=system 150 151[system.cpu.dtb] 152type=ArmTLB 153children=walker 154eventq_index=0 155is_stage2=false 156size=64 157walker=system.cpu.dtb.walker 158 159[system.cpu.dtb.walker] 160type=ArmTableWalker 161clk_domain=system.clk_domain 162eventq_index=0 163is_stage2=false 164num_squash_per_cycle=2 165sys=system 166 167[system.cpu.icache] 168type=Cache 169children=tags 170addr_ranges=0:18446744073709551615 171assoc=2 172clk_domain=system.clk_domain 173clusivity=mostly_incl 174demand_mshr_reserve=1 175eventq_index=0 176forward_snoops=true 177hit_latency=2 178is_read_only=false 179max_miss_count=0 180mshrs=4 181prefetch_on_access=false 182prefetcher=Null 183response_latency=2 184sequential_access=false 185size=16384 186system=system 187tags=system.cpu.icache.tags 188tgts_per_mshr=20 189write_buffers=8 190writeback_clean=false 191cpu_side=system.cpu.icache_port 192mem_side=system.l2bus.slave[0] 193 194[system.cpu.icache.tags] 195type=LRU 196assoc=2 197block_size=64 198clk_domain=system.clk_domain 199eventq_index=0 200hit_latency=2 201sequential_access=false 202size=16384 203 204[system.cpu.interrupts] 205type=ArmInterrupts 206eventq_index=0 207 208[system.cpu.isa] 209type=ArmISA 210decoderFlavour=Generic 211eventq_index=0 212fpsid=1090793632 213id_aa64afr0_el1=0 214id_aa64afr1_el1=0 215id_aa64dfr0_el1=1052678 216id_aa64dfr1_el1=0 217id_aa64isar0_el1=0 218id_aa64isar1_el1=0 219id_aa64mmfr0_el1=15728642 220id_aa64mmfr1_el1=0 221id_aa64pfr0_el1=17 222id_aa64pfr1_el1=0 223id_isar0=34607377 224id_isar1=34677009 225id_isar2=555950401 226id_isar3=17899825 227id_isar4=268501314 228id_isar5=0 229id_mmfr0=270536963 230id_mmfr1=0 231id_mmfr2=19070976 232id_mmfr3=34611729 233id_pfr0=49 234id_pfr1=4113 235midr=1091551472 236pmu=Null 237system=system 238 239[system.cpu.istage2_mmu] 240type=ArmStage2MMU 241children=stage2_tlb 242eventq_index=0 243stage2_tlb=system.cpu.istage2_mmu.stage2_tlb 244sys=system 245tlb=system.cpu.itb 246 247[system.cpu.istage2_mmu.stage2_tlb] 248type=ArmTLB 249children=walker 250eventq_index=0 251is_stage2=true 252size=32 253walker=system.cpu.istage2_mmu.stage2_tlb.walker 254 255[system.cpu.istage2_mmu.stage2_tlb.walker] 256type=ArmTableWalker 257clk_domain=system.clk_domain 258eventq_index=0 259is_stage2=true 260num_squash_per_cycle=2 261sys=system 262 263[system.cpu.itb] 264type=ArmTLB 265children=walker 266eventq_index=0 267is_stage2=false 268size=64 269walker=system.cpu.itb.walker 270 271[system.cpu.itb.walker] 272type=ArmTableWalker 273clk_domain=system.clk_domain 274eventq_index=0 275is_stage2=false 276num_squash_per_cycle=2 277sys=system 278 279[system.cpu.tracer] 280type=ExeTracer 281eventq_index=0 282 283[system.cpu.workload] 284type=LiveProcess 285cmd=tests/test-progs/hello/bin/arm/linux/hello 286cwd= 287drivers= 288egid=100 289env= 290errout=cerr 291euid=100 292eventq_index=0 293executable= 294gid=100 295input=cin 296kvmInSE=false 297max_stack_size=67108864 298output=cout 299pid=100 300ppid=99 301simpoint=0 302system=system 303uid=100 304useArchPT=false 305 306[system.dvfs_handler] 307type=DVFSHandler 308domains= 309enable=false 310eventq_index=0 311sys_clk_domain=system.clk_domain 312transition_latency=100000000 313 314[system.l2bus] 315type=CoherentXBar 316children=snoop_filter 317clk_domain=system.clk_domain 318eventq_index=0 319forward_latency=0 320frontend_latency=1 321response_latency=1 322snoop_filter=system.l2bus.snoop_filter 323snoop_response_latency=1 324system=system 325use_default_range=false 326width=32 327master=system.l2cache.cpu_side 328slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side 329 330[system.l2bus.snoop_filter] 331type=SnoopFilter 332eventq_index=0 333lookup_latency=0 334max_capacity=8388608 335system=system 336 337[system.l2cache] 338type=Cache 339children=tags 340addr_ranges=0:18446744073709551615 341assoc=8 342clk_domain=system.clk_domain 343clusivity=mostly_incl 344demand_mshr_reserve=1 345eventq_index=0 346forward_snoops=true 347hit_latency=20 348is_read_only=false 349max_miss_count=0 350mshrs=20 351prefetch_on_access=false 352prefetcher=Null 353response_latency=20 354sequential_access=false 355size=262144 356system=system 357tags=system.l2cache.tags 358tgts_per_mshr=12 359write_buffers=8 360writeback_clean=false 361cpu_side=system.l2bus.master[0] 362mem_side=system.membus.slave[0] 363 364[system.l2cache.tags] 365type=LRU 366assoc=8 367block_size=64 368clk_domain=system.clk_domain 369eventq_index=0 370hit_latency=20 371sequential_access=false 372size=262144 373 374[system.mem_ctrl] 375type=DRAMCtrl 376IDD0=0.075000 377IDD02=0.000000 378IDD2N=0.050000 379IDD2N2=0.000000 380IDD2P0=0.000000 381IDD2P02=0.000000 382IDD2P1=0.000000 383IDD2P12=0.000000 384IDD3N=0.057000 385IDD3N2=0.000000 386IDD3P0=0.000000 387IDD3P02=0.000000 388IDD3P1=0.000000 389IDD3P12=0.000000 390IDD4R=0.187000 391IDD4R2=0.000000 392IDD4W=0.165000 393IDD4W2=0.000000 394IDD5=0.220000 395IDD52=0.000000 396IDD6=0.000000 397IDD62=0.000000 398VDD=1.500000 399VDD2=0.000000 400activation_limit=4 401addr_mapping=RoRaBaCoCh 402bank_groups_per_rank=0 403banks_per_rank=8 404burst_length=8 405channels=1 406clk_domain=system.clk_domain 407conf_table_reported=true 408device_bus_width=8 409device_rowbuffer_size=1024 410device_size=536870912 411devices_per_rank=8 412dll=true 413eventq_index=0 414in_addr_map=true 415max_accesses_per_row=16 416mem_sched_policy=frfcfs 417min_writes_per_switch=16 418null=false 419page_policy=open_adaptive 420range=0:536870911 421ranks_per_channel=2 422read_buffer_size=32 423static_backend_latency=10000 424static_frontend_latency=10000 425tBURST=5000 426tCCD_L=0 427tCK=1250 428tCL=13750 429tCS=2500 430tRAS=35000 431tRCD=13750 432tREFI=7800000 433tRFC=260000 434tRP=13750 435tRRD=6000 436tRRD_L=0 437tRTP=7500 438tRTW=2500 439tWR=15000 440tWTR=7500 441tXAW=30000 442tXP=0 443tXPDLL=0 444tXS=0 445tXSDLL=0 446write_buffer_size=64 447write_high_thresh_perc=85 448write_low_thresh_perc=50 449port=system.membus.master[0] 450 451[system.membus] 452type=CoherentXBar 453clk_domain=system.clk_domain 454eventq_index=0 455forward_latency=4 456frontend_latency=3 457response_latency=2 458snoop_filter=Null 459snoop_response_latency=4 460system=system 461use_default_range=false 462width=16 463master=system.mem_ctrl.port 464slave=system.l2cache.mem_side system.system_port 465 466