stats.txt revision 11955:1170d039b31e
1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.000372 # Number of seconds simulated 4sim_ticks 372284000 # Number of ticks simulated 5final_tick 372284000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks 7host_inst_rate 264702 # Simulator instruction rate (inst/s) 8host_op_rate 305997 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 19731375693 # Simulator tick rate (ticks/s) 10host_mem_usage 650740 # Number of bytes of host memory used 11host_seconds 0.02 # Real time elapsed on the host 12sim_insts 4988 # Number of instructions simulated 13sim_ops 5770 # Number of ops (including micro ops) simulated 14system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.mem_ctrl.pwrStateResidencyTicks::UNDEFINED 372284000 # Cumulative time (in ticks) in various power states 17system.mem_ctrl.bytes_read::cpu.inst 20108 # Number of bytes read from this memory 18system.mem_ctrl.bytes_read::cpu.data 4672 # Number of bytes read from this memory 19system.mem_ctrl.bytes_read::total 24780 # Number of bytes read from this memory 20system.mem_ctrl.bytes_inst_read::cpu.inst 20108 # Number of instructions bytes read from this memory 21system.mem_ctrl.bytes_inst_read::total 20108 # Number of instructions bytes read from this memory 22system.mem_ctrl.bytes_written::cpu.data 3696 # Number of bytes written to this memory 23system.mem_ctrl.bytes_written::total 3696 # Number of bytes written to this memory 24system.mem_ctrl.num_reads::cpu.inst 5027 # Number of read requests responded to by this memory 25system.mem_ctrl.num_reads::cpu.data 1061 # Number of read requests responded to by this memory 26system.mem_ctrl.num_reads::total 6088 # Number of read requests responded to by this memory 27system.mem_ctrl.num_writes::cpu.data 936 # Number of write requests responded to by this memory 28system.mem_ctrl.num_writes::total 936 # Number of write requests responded to by this memory 29system.mem_ctrl.bw_read::cpu.inst 54012528 # Total read bandwidth from this memory (bytes/s) 30system.mem_ctrl.bw_read::cpu.data 12549559 # Total read bandwidth from this memory (bytes/s) 31system.mem_ctrl.bw_read::total 66562087 # Total read bandwidth from this memory (bytes/s) 32system.mem_ctrl.bw_inst_read::cpu.inst 54012528 # Instruction read bandwidth from this memory (bytes/s) 33system.mem_ctrl.bw_inst_read::total 54012528 # Instruction read bandwidth from this memory (bytes/s) 34system.mem_ctrl.bw_write::cpu.data 9927905 # Write bandwidth from this memory (bytes/s) 35system.mem_ctrl.bw_write::total 9927905 # Write bandwidth from this memory (bytes/s) 36system.mem_ctrl.bw_total::cpu.inst 54012528 # Total bandwidth to/from this memory (bytes/s) 37system.mem_ctrl.bw_total::cpu.data 22477463 # Total bandwidth to/from this memory (bytes/s) 38system.mem_ctrl.bw_total::total 76489992 # Total bandwidth to/from this memory (bytes/s) 39system.mem_ctrl.readReqs 6089 # Number of read requests accepted 40system.mem_ctrl.writeReqs 936 # Number of write requests accepted 41system.mem_ctrl.readBursts 6089 # Number of DRAM read bursts, including those serviced by the write queue 42system.mem_ctrl.writeBursts 936 # Number of DRAM write bursts, including those merged in the write queue 43system.mem_ctrl.bytesReadDRAM 383296 # Total number of bytes read from DRAM 44system.mem_ctrl.bytesReadWrQ 6400 # Total number of bytes read from write queue 45system.mem_ctrl.bytesWritten 4096 # Total number of bytes written to DRAM 46system.mem_ctrl.bytesReadSys 24784 # Total read bytes from the system interface side 47system.mem_ctrl.bytesWrittenSys 3696 # Total written bytes from the system interface side 48system.mem_ctrl.servicedByWrQ 100 # Number of DRAM read bursts serviced by the write queue 49system.mem_ctrl.mergedWrBursts 855 # Number of DRAM write bursts merged with an existing one 50system.mem_ctrl.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write 51system.mem_ctrl.perBankRdBursts::0 911 # Per bank write bursts 52system.mem_ctrl.perBankRdBursts::1 1454 # Per bank write bursts 53system.mem_ctrl.perBankRdBursts::2 724 # Per bank write bursts 54system.mem_ctrl.perBankRdBursts::3 364 # Per bank write bursts 55system.mem_ctrl.perBankRdBursts::4 505 # Per bank write bursts 56system.mem_ctrl.perBankRdBursts::5 303 # Per bank write bursts 57system.mem_ctrl.perBankRdBursts::6 487 # Per bank write bursts 58system.mem_ctrl.perBankRdBursts::7 206 # Per bank write bursts 59system.mem_ctrl.perBankRdBursts::8 42 # Per bank write bursts 60system.mem_ctrl.perBankRdBursts::9 155 # Per bank write bursts 61system.mem_ctrl.perBankRdBursts::10 192 # Per bank write bursts 62system.mem_ctrl.perBankRdBursts::11 422 # Per bank write bursts 63system.mem_ctrl.perBankRdBursts::12 108 # Per bank write bursts 64system.mem_ctrl.perBankRdBursts::13 36 # Per bank write bursts 65system.mem_ctrl.perBankRdBursts::14 0 # Per bank write bursts 66system.mem_ctrl.perBankRdBursts::15 80 # Per bank write bursts 67system.mem_ctrl.perBankWrBursts::0 0 # Per bank write bursts 68system.mem_ctrl.perBankWrBursts::1 0 # Per bank write bursts 69system.mem_ctrl.perBankWrBursts::2 0 # Per bank write bursts 70system.mem_ctrl.perBankWrBursts::3 0 # Per bank write bursts 71system.mem_ctrl.perBankWrBursts::4 0 # Per bank write bursts 72system.mem_ctrl.perBankWrBursts::5 0 # Per bank write bursts 73system.mem_ctrl.perBankWrBursts::6 0 # Per bank write bursts 74system.mem_ctrl.perBankWrBursts::7 0 # Per bank write bursts 75system.mem_ctrl.perBankWrBursts::8 0 # Per bank write bursts 76system.mem_ctrl.perBankWrBursts::9 0 # Per bank write bursts 77system.mem_ctrl.perBankWrBursts::10 13 # Per bank write bursts 78system.mem_ctrl.perBankWrBursts::11 46 # Per bank write bursts 79system.mem_ctrl.perBankWrBursts::12 5 # Per bank write bursts 80system.mem_ctrl.perBankWrBursts::13 0 # Per bank write bursts 81system.mem_ctrl.perBankWrBursts::14 0 # Per bank write bursts 82system.mem_ctrl.perBankWrBursts::15 0 # Per bank write bursts 83system.mem_ctrl.numRdRetry 0 # Number of times read queue was full causing retry 84system.mem_ctrl.numWrRetry 0 # Number of times write queue was full causing retry 85system.mem_ctrl.totGap 372207000 # Total gap between requests 86system.mem_ctrl.readPktSize::0 70 # Read request sizes (log2) 87system.mem_ctrl.readPktSize::1 1 # Read request sizes (log2) 88system.mem_ctrl.readPktSize::2 5858 # Read request sizes (log2) 89system.mem_ctrl.readPktSize::3 160 # Read request sizes (log2) 90system.mem_ctrl.readPktSize::4 0 # Read request sizes (log2) 91system.mem_ctrl.readPktSize::5 0 # Read request sizes (log2) 92system.mem_ctrl.readPktSize::6 0 # Read request sizes (log2) 93system.mem_ctrl.writePktSize::0 16 # Write request sizes (log2) 94system.mem_ctrl.writePktSize::1 0 # Write request sizes (log2) 95system.mem_ctrl.writePktSize::2 920 # Write request sizes (log2) 96system.mem_ctrl.writePktSize::3 0 # Write request sizes (log2) 97system.mem_ctrl.writePktSize::4 0 # Write request sizes (log2) 98system.mem_ctrl.writePktSize::5 0 # Write request sizes (log2) 99system.mem_ctrl.writePktSize::6 0 # Write request sizes (log2) 100system.mem_ctrl.rdQLenPdf::0 5980 # What read queue length does an incoming req see 101system.mem_ctrl.rdQLenPdf::1 9 # What read queue length does an incoming req see 102system.mem_ctrl.rdQLenPdf::2 0 # What read queue length does an incoming req see 103system.mem_ctrl.rdQLenPdf::3 0 # What read queue length does an incoming req see 104system.mem_ctrl.rdQLenPdf::4 0 # What read queue length does an incoming req see 105system.mem_ctrl.rdQLenPdf::5 0 # What read queue length does an incoming req see 106system.mem_ctrl.rdQLenPdf::6 0 # What read queue length does an incoming req see 107system.mem_ctrl.rdQLenPdf::7 0 # What read queue length does an incoming req see 108system.mem_ctrl.rdQLenPdf::8 0 # What read queue length does an incoming req see 109system.mem_ctrl.rdQLenPdf::9 0 # What read queue length does an incoming req see 110system.mem_ctrl.rdQLenPdf::10 0 # What read queue length does an incoming req see 111system.mem_ctrl.rdQLenPdf::11 0 # What read queue length does an incoming req see 112system.mem_ctrl.rdQLenPdf::12 0 # What read queue length does an incoming req see 113system.mem_ctrl.rdQLenPdf::13 0 # What read queue length does an incoming req see 114system.mem_ctrl.rdQLenPdf::14 0 # What read queue length does an incoming req see 115system.mem_ctrl.rdQLenPdf::15 0 # What read queue length does an incoming req see 116system.mem_ctrl.rdQLenPdf::16 0 # What read queue length does an incoming req see 117system.mem_ctrl.rdQLenPdf::17 0 # What read queue length does an incoming req see 118system.mem_ctrl.rdQLenPdf::18 0 # What read queue length does an incoming req see 119system.mem_ctrl.rdQLenPdf::19 0 # What read queue length does an incoming req see 120system.mem_ctrl.rdQLenPdf::20 0 # What read queue length does an incoming req see 121system.mem_ctrl.rdQLenPdf::21 0 # What read queue length does an incoming req see 122system.mem_ctrl.rdQLenPdf::22 0 # What read queue length does an incoming req see 123system.mem_ctrl.rdQLenPdf::23 0 # What read queue length does an incoming req see 124system.mem_ctrl.rdQLenPdf::24 0 # What read queue length does an incoming req see 125system.mem_ctrl.rdQLenPdf::25 0 # What read queue length does an incoming req see 126system.mem_ctrl.rdQLenPdf::26 0 # What read queue length does an incoming req see 127system.mem_ctrl.rdQLenPdf::27 0 # What read queue length does an incoming req see 128system.mem_ctrl.rdQLenPdf::28 0 # What read queue length does an incoming req see 129system.mem_ctrl.rdQLenPdf::29 0 # What read queue length does an incoming req see 130system.mem_ctrl.rdQLenPdf::30 0 # What read queue length does an incoming req see 131system.mem_ctrl.rdQLenPdf::31 0 # What read queue length does an incoming req see 132system.mem_ctrl.wrQLenPdf::0 1 # What write queue length does an incoming req see 133system.mem_ctrl.wrQLenPdf::1 1 # What write queue length does an incoming req see 134system.mem_ctrl.wrQLenPdf::2 1 # What write queue length does an incoming req see 135system.mem_ctrl.wrQLenPdf::3 1 # What write queue length does an incoming req see 136system.mem_ctrl.wrQLenPdf::4 1 # What write queue length does an incoming req see 137system.mem_ctrl.wrQLenPdf::5 1 # What write queue length does an incoming req see 138system.mem_ctrl.wrQLenPdf::6 1 # What write queue length does an incoming req see 139system.mem_ctrl.wrQLenPdf::7 1 # What write queue length does an incoming req see 140system.mem_ctrl.wrQLenPdf::8 1 # What write queue length does an incoming req see 141system.mem_ctrl.wrQLenPdf::9 1 # What write queue length does an incoming req see 142system.mem_ctrl.wrQLenPdf::10 1 # What write queue length does an incoming req see 143system.mem_ctrl.wrQLenPdf::11 1 # What write queue length does an incoming req see 144system.mem_ctrl.wrQLenPdf::12 1 # What write queue length does an incoming req see 145system.mem_ctrl.wrQLenPdf::13 1 # What write queue length does an incoming req see 146system.mem_ctrl.wrQLenPdf::14 1 # What write queue length does an incoming req see 147system.mem_ctrl.wrQLenPdf::15 1 # What write queue length does an incoming req see 148system.mem_ctrl.wrQLenPdf::16 1 # What write queue length does an incoming req see 149system.mem_ctrl.wrQLenPdf::17 4 # What write queue length does an incoming req see 150system.mem_ctrl.wrQLenPdf::18 4 # What write queue length does an incoming req see 151system.mem_ctrl.wrQLenPdf::19 4 # What write queue length does an incoming req see 152system.mem_ctrl.wrQLenPdf::20 4 # What write queue length does an incoming req see 153system.mem_ctrl.wrQLenPdf::21 4 # What write queue length does an incoming req see 154system.mem_ctrl.wrQLenPdf::22 4 # What write queue length does an incoming req see 155system.mem_ctrl.wrQLenPdf::23 4 # What write queue length does an incoming req see 156system.mem_ctrl.wrQLenPdf::24 4 # What write queue length does an incoming req see 157system.mem_ctrl.wrQLenPdf::25 4 # What write queue length does an incoming req see 158system.mem_ctrl.wrQLenPdf::26 4 # What write queue length does an incoming req see 159system.mem_ctrl.wrQLenPdf::27 4 # What write queue length does an incoming req see 160system.mem_ctrl.wrQLenPdf::28 4 # What write queue length does an incoming req see 161system.mem_ctrl.wrQLenPdf::29 4 # What write queue length does an incoming req see 162system.mem_ctrl.wrQLenPdf::30 4 # What write queue length does an incoming req see 163system.mem_ctrl.wrQLenPdf::31 4 # What write queue length does an incoming req see 164system.mem_ctrl.wrQLenPdf::32 4 # What write queue length does an incoming req see 165system.mem_ctrl.wrQLenPdf::33 0 # What write queue length does an incoming req see 166system.mem_ctrl.wrQLenPdf::34 0 # What write queue length does an incoming req see 167system.mem_ctrl.wrQLenPdf::35 0 # What write queue length does an incoming req see 168system.mem_ctrl.wrQLenPdf::36 0 # What write queue length does an incoming req see 169system.mem_ctrl.wrQLenPdf::37 0 # What write queue length does an incoming req see 170system.mem_ctrl.wrQLenPdf::38 0 # What write queue length does an incoming req see 171system.mem_ctrl.wrQLenPdf::39 0 # What write queue length does an incoming req see 172system.mem_ctrl.wrQLenPdf::40 0 # What write queue length does an incoming req see 173system.mem_ctrl.wrQLenPdf::41 0 # What write queue length does an incoming req see 174system.mem_ctrl.wrQLenPdf::42 0 # What write queue length does an incoming req see 175system.mem_ctrl.wrQLenPdf::43 0 # What write queue length does an incoming req see 176system.mem_ctrl.wrQLenPdf::44 0 # What write queue length does an incoming req see 177system.mem_ctrl.wrQLenPdf::45 0 # What write queue length does an incoming req see 178system.mem_ctrl.wrQLenPdf::46 0 # What write queue length does an incoming req see 179system.mem_ctrl.wrQLenPdf::47 0 # What write queue length does an incoming req see 180system.mem_ctrl.wrQLenPdf::48 0 # What write queue length does an incoming req see 181system.mem_ctrl.wrQLenPdf::49 0 # What write queue length does an incoming req see 182system.mem_ctrl.wrQLenPdf::50 0 # What write queue length does an incoming req see 183system.mem_ctrl.wrQLenPdf::51 0 # What write queue length does an incoming req see 184system.mem_ctrl.wrQLenPdf::52 0 # What write queue length does an incoming req see 185system.mem_ctrl.wrQLenPdf::53 0 # What write queue length does an incoming req see 186system.mem_ctrl.wrQLenPdf::54 0 # What write queue length does an incoming req see 187system.mem_ctrl.wrQLenPdf::55 0 # What write queue length does an incoming req see 188system.mem_ctrl.wrQLenPdf::56 0 # What write queue length does an incoming req see 189system.mem_ctrl.wrQLenPdf::57 0 # What write queue length does an incoming req see 190system.mem_ctrl.wrQLenPdf::58 0 # What write queue length does an incoming req see 191system.mem_ctrl.wrQLenPdf::59 0 # What write queue length does an incoming req see 192system.mem_ctrl.wrQLenPdf::60 0 # What write queue length does an incoming req see 193system.mem_ctrl.wrQLenPdf::61 0 # What write queue length does an incoming req see 194system.mem_ctrl.wrQLenPdf::62 0 # What write queue length does an incoming req see 195system.mem_ctrl.wrQLenPdf::63 0 # What write queue length does an incoming req see 196system.mem_ctrl.bytesPerActivate::samples 514 # Bytes accessed per row activation 197system.mem_ctrl.bytesPerActivate::mean 749.322957 # Bytes accessed per row activation 198system.mem_ctrl.bytesPerActivate::gmean 608.037375 # Bytes accessed per row activation 199system.mem_ctrl.bytesPerActivate::stdev 344.826867 # Bytes accessed per row activation 200system.mem_ctrl.bytesPerActivate::0-127 25 4.86% 4.86% # Bytes accessed per row activation 201system.mem_ctrl.bytesPerActivate::128-255 42 8.17% 13.04% # Bytes accessed per row activation 202system.mem_ctrl.bytesPerActivate::256-383 44 8.56% 21.60% # Bytes accessed per row activation 203system.mem_ctrl.bytesPerActivate::384-511 26 5.06% 26.65% # Bytes accessed per row activation 204system.mem_ctrl.bytesPerActivate::512-639 25 4.86% 31.52% # Bytes accessed per row activation 205system.mem_ctrl.bytesPerActivate::640-767 34 6.61% 38.13% # Bytes accessed per row activation 206system.mem_ctrl.bytesPerActivate::768-895 27 5.25% 43.39% # Bytes accessed per row activation 207system.mem_ctrl.bytesPerActivate::896-1023 27 5.25% 48.64% # Bytes accessed per row activation 208system.mem_ctrl.bytesPerActivate::1024-1151 264 51.36% 100.00% # Bytes accessed per row activation 209system.mem_ctrl.bytesPerActivate::total 514 # Bytes accessed per row activation 210system.mem_ctrl.rdPerTurnAround::samples 4 # Reads before turning the bus around for writes 211system.mem_ctrl.rdPerTurnAround::mean 1490.500000 # Reads before turning the bus around for writes 212system.mem_ctrl.rdPerTurnAround::gmean 1373.591360 # Reads before turning the bus around for writes 213system.mem_ctrl.rdPerTurnAround::stdev 606.712727 # Reads before turning the bus around for writes 214system.mem_ctrl.rdPerTurnAround::640-767 1 25.00% 25.00% # Reads before turning the bus around for writes 215system.mem_ctrl.rdPerTurnAround::1408-1535 1 25.00% 50.00% # Reads before turning the bus around for writes 216system.mem_ctrl.rdPerTurnAround::1792-1919 1 25.00% 75.00% # Reads before turning the bus around for writes 217system.mem_ctrl.rdPerTurnAround::2048-2175 1 25.00% 100.00% # Reads before turning the bus around for writes 218system.mem_ctrl.rdPerTurnAround::total 4 # Reads before turning the bus around for writes 219system.mem_ctrl.wrPerTurnAround::samples 4 # Writes before turning the bus around for reads 220system.mem_ctrl.wrPerTurnAround::mean 16 # Writes before turning the bus around for reads 221system.mem_ctrl.wrPerTurnAround::gmean 16.000000 # Writes before turning the bus around for reads 222system.mem_ctrl.wrPerTurnAround::16 4 100.00% 100.00% # Writes before turning the bus around for reads 223system.mem_ctrl.wrPerTurnAround::total 4 # Writes before turning the bus around for reads 224system.mem_ctrl.totQLat 57609500 # Total ticks spent queuing 225system.mem_ctrl.totMemAccLat 169903250 # Total ticks spent from burst creation until serviced by the DRAM 226system.mem_ctrl.totBusLat 29945000 # Total ticks spent in databus transfers 227system.mem_ctrl.avgQLat 9619.22 # Average queueing delay per DRAM burst 228system.mem_ctrl.avgBusLat 5000.00 # Average bus latency per DRAM burst 229system.mem_ctrl.avgMemAccLat 28369.22 # Average memory access latency per DRAM burst 230system.mem_ctrl.avgRdBW 1029.58 # Average DRAM read bandwidth in MiByte/s 231system.mem_ctrl.avgWrBW 11.00 # Average achieved write bandwidth in MiByte/s 232system.mem_ctrl.avgRdBWSys 66.57 # Average system read bandwidth in MiByte/s 233system.mem_ctrl.avgWrBWSys 9.93 # Average system write bandwidth in MiByte/s 234system.mem_ctrl.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s 235system.mem_ctrl.busUtil 8.13 # Data bus utilization in percentage 236system.mem_ctrl.busUtilRead 8.04 # Data bus utilization in percentage for reads 237system.mem_ctrl.busUtilWrite 0.09 # Data bus utilization in percentage for writes 238system.mem_ctrl.avgRdQLen 1.00 # Average read queue length when enqueuing 239system.mem_ctrl.avgWrQLen 24.94 # Average write queue length when enqueuing 240system.mem_ctrl.readRowHits 5473 # Number of row buffer hits during reads 241system.mem_ctrl.writeRowHits 62 # Number of row buffer hits during writes 242system.mem_ctrl.readRowHitRate 91.38 # Row buffer hit rate for reads 243system.mem_ctrl.writeRowHitRate 76.54 # Row buffer hit rate for writes 244system.mem_ctrl.avgGap 52983.20 # Average gap between requests 245system.mem_ctrl.pageHitRate 91.19 # Row buffer hit rate, read and write combined 246system.mem_ctrl_0.actEnergy 2727480 # Energy for activate commands per rank (pJ) 247system.mem_ctrl_0.preEnergy 1438305 # Energy for precharge commands per rank (pJ) 248system.mem_ctrl_0.readEnergy 35364420 # Energy for read commands per rank (pJ) 249system.mem_ctrl_0.writeEnergy 0 # Energy for write commands per rank (pJ) 250system.mem_ctrl_0.refreshEnergy 28888080.000000 # Energy for refresh commands per rank (pJ) 251system.mem_ctrl_0.actBackEnergy 64999380 # Energy for active background per rank (pJ) 252system.mem_ctrl_0.preBackEnergy 1619520 # Energy for precharge background per rank (pJ) 253system.mem_ctrl_0.actPowerDownEnergy 98643060 # Energy for active power-down per rank (pJ) 254system.mem_ctrl_0.prePowerDownEnergy 3533760 # Energy for precharge power-down per rank (pJ) 255system.mem_ctrl_0.selfRefreshEnergy 0 # Energy for self refresh per rank (pJ) 256system.mem_ctrl_0.totalEnergy 237214005 # Total energy per rank (pJ) 257system.mem_ctrl_0.averagePower 637.183891 # Core power per rank (mW) 258system.mem_ctrl_0.totalIdleTime 225396250 # Total Idle time Per DRAM Rank 259system.mem_ctrl_0.memoryStateTime::IDLE 954000 # Time in different power states 260system.mem_ctrl_0.memoryStateTime::REF 12220000 # Time in different power states 261system.mem_ctrl_0.memoryStateTime::SREF 0 # Time in different power states 262system.mem_ctrl_0.memoryStateTime::PRE_PDN 9196500 # Time in different power states 263system.mem_ctrl_0.memoryStateTime::ACT 133713750 # Time in different power states 264system.mem_ctrl_0.memoryStateTime::ACT_PDN 216199750 # Time in different power states 265system.mem_ctrl_1.actEnergy 971040 # Energy for activate commands per rank (pJ) 266system.mem_ctrl_1.preEnergy 512325 # Energy for precharge commands per rank (pJ) 267system.mem_ctrl_1.readEnergy 7389900 # Energy for read commands per rank (pJ) 268system.mem_ctrl_1.writeEnergy 334080 # Energy for write commands per rank (pJ) 269system.mem_ctrl_1.refreshEnergy 27658800.000000 # Energy for refresh commands per rank (pJ) 270system.mem_ctrl_1.actBackEnergy 18607080 # Energy for active background per rank (pJ) 271system.mem_ctrl_1.preBackEnergy 791520 # Energy for precharge background per rank (pJ) 272system.mem_ctrl_1.actPowerDownEnergy 128152530 # Energy for active power-down per rank (pJ) 273system.mem_ctrl_1.prePowerDownEnergy 7837920 # Energy for precharge power-down per rank (pJ) 274system.mem_ctrl_1.selfRefreshEnergy 7265340 # Energy for self refresh per rank (pJ) 275system.mem_ctrl_1.totalEnergy 199520535 # Total energy per rank (pJ) 276system.mem_ctrl_1.averagePower 535.934929 # Core power per rank (mW) 277system.mem_ctrl_1.totalIdleTime 328663750 # Total Idle time Per DRAM Rank 278system.mem_ctrl_1.memoryStateTime::IDLE 770000 # Time in different power states 279system.mem_ctrl_1.memoryStateTime::REF 11706000 # Time in different power states 280system.mem_ctrl_1.memoryStateTime::SREF 27971000 # Time in different power states 281system.mem_ctrl_1.memoryStateTime::PRE_PDN 20415250 # Time in different power states 282system.mem_ctrl_1.memoryStateTime::ACT 30385000 # Time in different power states 283system.mem_ctrl_1.memoryStateTime::ACT_PDN 281036750 # Time in different power states 284system.pwrStateResidencyTicks::UNDEFINED 372284000 # Cumulative time (in ticks) in various power states 285system.cpu.dstage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED 372284000 # Cumulative time (in ticks) in various power states 286system.cpu.dstage2_mmu.stage2_tlb.walker.walks 0 # Table walker walks requested 287system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst 288system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst 289system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total 0 # Table walker requests started/completed, data/inst 290system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data 0 # Table walker requests started/completed, data/inst 291system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst 0 # Table walker requests started/completed, data/inst 292system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total 0 # Table walker requests started/completed, data/inst 293system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin::total 0 # Table walker requests started/completed, data/inst 294system.cpu.dstage2_mmu.stage2_tlb.inst_hits 0 # ITB inst hits 295system.cpu.dstage2_mmu.stage2_tlb.inst_misses 0 # ITB inst misses 296system.cpu.dstage2_mmu.stage2_tlb.read_hits 0 # DTB read hits 297system.cpu.dstage2_mmu.stage2_tlb.read_misses 0 # DTB read misses 298system.cpu.dstage2_mmu.stage2_tlb.write_hits 0 # DTB write hits 299system.cpu.dstage2_mmu.stage2_tlb.write_misses 0 # DTB write misses 300system.cpu.dstage2_mmu.stage2_tlb.flush_tlb 0 # Number of times complete TLB was flushed 301system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA 302system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva_asid 0 # Number of times TLB was flushed by MVA & ASID 303system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_asid 0 # Number of times TLB was flushed by ASID 304system.cpu.dstage2_mmu.stage2_tlb.flush_entries 0 # Number of entries that have been flushed from TLB 305system.cpu.dstage2_mmu.stage2_tlb.align_faults 0 # Number of TLB faults due to alignment restrictions 306system.cpu.dstage2_mmu.stage2_tlb.prefetch_faults 0 # Number of TLB faults due to prefetch 307system.cpu.dstage2_mmu.stage2_tlb.domain_faults 0 # Number of TLB faults due to domain restrictions 308system.cpu.dstage2_mmu.stage2_tlb.perms_faults 0 # Number of TLB faults due to permissions restrictions 309system.cpu.dstage2_mmu.stage2_tlb.read_accesses 0 # DTB read accesses 310system.cpu.dstage2_mmu.stage2_tlb.write_accesses 0 # DTB write accesses 311system.cpu.dstage2_mmu.stage2_tlb.inst_accesses 0 # ITB inst accesses 312system.cpu.dstage2_mmu.stage2_tlb.hits 0 # DTB hits 313system.cpu.dstage2_mmu.stage2_tlb.misses 0 # DTB misses 314system.cpu.dstage2_mmu.stage2_tlb.accesses 0 # DTB accesses 315system.cpu.dtb.walker.pwrStateResidencyTicks::UNDEFINED 372284000 # Cumulative time (in ticks) in various power states 316system.cpu.dtb.walker.walks 0 # Table walker walks requested 317system.cpu.dtb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst 318system.cpu.dtb.walker.walkRequestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst 319system.cpu.dtb.walker.walkRequestOrigin_Requested::total 0 # Table walker requests started/completed, data/inst 320system.cpu.dtb.walker.walkRequestOrigin_Completed::Data 0 # Table walker requests started/completed, data/inst 321system.cpu.dtb.walker.walkRequestOrigin_Completed::Inst 0 # Table walker requests started/completed, data/inst 322system.cpu.dtb.walker.walkRequestOrigin_Completed::total 0 # Table walker requests started/completed, data/inst 323system.cpu.dtb.walker.walkRequestOrigin::total 0 # Table walker requests started/completed, data/inst 324system.cpu.dtb.inst_hits 0 # ITB inst hits 325system.cpu.dtb.inst_misses 0 # ITB inst misses 326system.cpu.dtb.read_hits 0 # DTB read hits 327system.cpu.dtb.read_misses 0 # DTB read misses 328system.cpu.dtb.write_hits 0 # DTB write hits 329system.cpu.dtb.write_misses 0 # DTB write misses 330system.cpu.dtb.flush_tlb 0 # Number of times complete TLB was flushed 331system.cpu.dtb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA 332system.cpu.dtb.flush_tlb_mva_asid 0 # Number of times TLB was flushed by MVA & ASID 333system.cpu.dtb.flush_tlb_asid 0 # Number of times TLB was flushed by ASID 334system.cpu.dtb.flush_entries 0 # Number of entries that have been flushed from TLB 335system.cpu.dtb.align_faults 0 # Number of TLB faults due to alignment restrictions 336system.cpu.dtb.prefetch_faults 0 # Number of TLB faults due to prefetch 337system.cpu.dtb.domain_faults 0 # Number of TLB faults due to domain restrictions 338system.cpu.dtb.perms_faults 0 # Number of TLB faults due to permissions restrictions 339system.cpu.dtb.read_accesses 0 # DTB read accesses 340system.cpu.dtb.write_accesses 0 # DTB write accesses 341system.cpu.dtb.inst_accesses 0 # ITB inst accesses 342system.cpu.dtb.hits 0 # DTB hits 343system.cpu.dtb.misses 0 # DTB misses 344system.cpu.dtb.accesses 0 # DTB accesses 345system.cpu.istage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED 372284000 # Cumulative time (in ticks) in various power states 346system.cpu.istage2_mmu.stage2_tlb.walker.walks 0 # Table walker walks requested 347system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst 348system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst 349system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total 0 # Table walker requests started/completed, data/inst 350system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data 0 # Table walker requests started/completed, data/inst 351system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst 0 # Table walker requests started/completed, data/inst 352system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total 0 # Table walker requests started/completed, data/inst 353system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin::total 0 # Table walker requests started/completed, data/inst 354system.cpu.istage2_mmu.stage2_tlb.inst_hits 0 # ITB inst hits 355system.cpu.istage2_mmu.stage2_tlb.inst_misses 0 # ITB inst misses 356system.cpu.istage2_mmu.stage2_tlb.read_hits 0 # DTB read hits 357system.cpu.istage2_mmu.stage2_tlb.read_misses 0 # DTB read misses 358system.cpu.istage2_mmu.stage2_tlb.write_hits 0 # DTB write hits 359system.cpu.istage2_mmu.stage2_tlb.write_misses 0 # DTB write misses 360system.cpu.istage2_mmu.stage2_tlb.flush_tlb 0 # Number of times complete TLB was flushed 361system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA 362system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva_asid 0 # Number of times TLB was flushed by MVA & ASID 363system.cpu.istage2_mmu.stage2_tlb.flush_tlb_asid 0 # Number of times TLB was flushed by ASID 364system.cpu.istage2_mmu.stage2_tlb.flush_entries 0 # Number of entries that have been flushed from TLB 365system.cpu.istage2_mmu.stage2_tlb.align_faults 0 # Number of TLB faults due to alignment restrictions 366system.cpu.istage2_mmu.stage2_tlb.prefetch_faults 0 # Number of TLB faults due to prefetch 367system.cpu.istage2_mmu.stage2_tlb.domain_faults 0 # Number of TLB faults due to domain restrictions 368system.cpu.istage2_mmu.stage2_tlb.perms_faults 0 # Number of TLB faults due to permissions restrictions 369system.cpu.istage2_mmu.stage2_tlb.read_accesses 0 # DTB read accesses 370system.cpu.istage2_mmu.stage2_tlb.write_accesses 0 # DTB write accesses 371system.cpu.istage2_mmu.stage2_tlb.inst_accesses 0 # ITB inst accesses 372system.cpu.istage2_mmu.stage2_tlb.hits 0 # DTB hits 373system.cpu.istage2_mmu.stage2_tlb.misses 0 # DTB misses 374system.cpu.istage2_mmu.stage2_tlb.accesses 0 # DTB accesses 375system.cpu.itb.walker.pwrStateResidencyTicks::UNDEFINED 372284000 # Cumulative time (in ticks) in various power states 376system.cpu.itb.walker.walks 0 # Table walker walks requested 377system.cpu.itb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst 378system.cpu.itb.walker.walkRequestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst 379system.cpu.itb.walker.walkRequestOrigin_Requested::total 0 # Table walker requests started/completed, data/inst 380system.cpu.itb.walker.walkRequestOrigin_Completed::Data 0 # Table walker requests started/completed, data/inst 381system.cpu.itb.walker.walkRequestOrigin_Completed::Inst 0 # Table walker requests started/completed, data/inst 382system.cpu.itb.walker.walkRequestOrigin_Completed::total 0 # Table walker requests started/completed, data/inst 383system.cpu.itb.walker.walkRequestOrigin::total 0 # Table walker requests started/completed, data/inst 384system.cpu.itb.inst_hits 0 # ITB inst hits 385system.cpu.itb.inst_misses 0 # ITB inst misses 386system.cpu.itb.read_hits 0 # DTB read hits 387system.cpu.itb.read_misses 0 # DTB read misses 388system.cpu.itb.write_hits 0 # DTB write hits 389system.cpu.itb.write_misses 0 # DTB write misses 390system.cpu.itb.flush_tlb 0 # Number of times complete TLB was flushed 391system.cpu.itb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA 392system.cpu.itb.flush_tlb_mva_asid 0 # Number of times TLB was flushed by MVA & ASID 393system.cpu.itb.flush_tlb_asid 0 # Number of times TLB was flushed by ASID 394system.cpu.itb.flush_entries 0 # Number of entries that have been flushed from TLB 395system.cpu.itb.align_faults 0 # Number of TLB faults due to alignment restrictions 396system.cpu.itb.prefetch_faults 0 # Number of TLB faults due to prefetch 397system.cpu.itb.domain_faults 0 # Number of TLB faults due to domain restrictions 398system.cpu.itb.perms_faults 0 # Number of TLB faults due to permissions restrictions 399system.cpu.itb.read_accesses 0 # DTB read accesses 400system.cpu.itb.write_accesses 0 # DTB write accesses 401system.cpu.itb.inst_accesses 0 # ITB inst accesses 402system.cpu.itb.hits 0 # DTB hits 403system.cpu.itb.misses 0 # DTB misses 404system.cpu.itb.accesses 0 # DTB accesses 405system.cpu.workload.numSyscalls 13 # Number of system calls 406system.cpu.pwrStateResidencyTicks::ON 372284000 # Cumulative time (in ticks) in various power states 407system.cpu.numCycles 372284 # number of cpu cycles simulated 408system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 409system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 410system.cpu.committedInsts 4988 # Number of instructions committed 411system.cpu.committedOps 5770 # Number of ops (including micro ops) committed 412system.cpu.num_int_alu_accesses 4977 # Number of integer alu accesses 413system.cpu.num_fp_alu_accesses 16 # Number of float alu accesses 414system.cpu.num_func_calls 215 # number of times a function call or return occured 415system.cpu.num_conditional_control_insts 800 # number of instructions that are conditional controls 416system.cpu.num_int_insts 4977 # number of integer instructions 417system.cpu.num_fp_insts 16 # number of float instructions 418system.cpu.num_int_register_reads 8049 # number of times the integer registers were read 419system.cpu.num_int_register_writes 2992 # number of times the integer registers were written 420system.cpu.num_fp_register_reads 16 # number of times the floating registers were read 421system.cpu.num_fp_register_writes 0 # number of times the floating registers were written 422system.cpu.num_cc_register_reads 20681 # number of times the CC registers were read 423system.cpu.num_cc_register_writes 2647 # number of times the CC registers were written 424system.cpu.num_mem_refs 2035 # number of memory refs 425system.cpu.num_load_insts 1085 # Number of load instructions 426system.cpu.num_store_insts 950 # Number of store instructions 427system.cpu.num_idle_cycles 0.001000 # Number of idle cycles 428system.cpu.num_busy_cycles 372283.999000 # Number of busy cycles 429system.cpu.not_idle_fraction 1.000000 # Percentage of non-idle cycles 430system.cpu.idle_fraction 0.000000 # Percentage of idle cycles 431system.cpu.Branches 1107 # Number of branches fetched 432system.cpu.op_class::No_OpClass 0 0.00% 0.00% # Class of executed instruction 433system.cpu.op_class::IntAlu 3789 64.98% 64.98% # Class of executed instruction 434system.cpu.op_class::IntMult 4 0.07% 65.05% # Class of executed instruction 435system.cpu.op_class::IntDiv 0 0.00% 65.05% # Class of executed instruction 436system.cpu.op_class::FloatAdd 0 0.00% 65.05% # Class of executed instruction 437system.cpu.op_class::FloatCmp 0 0.00% 65.05% # Class of executed instruction 438system.cpu.op_class::FloatCvt 0 0.00% 65.05% # Class of executed instruction 439system.cpu.op_class::FloatMult 0 0.00% 65.05% # Class of executed instruction 440system.cpu.op_class::FloatMultAcc 0 0.00% 65.05% # Class of executed instruction 441system.cpu.op_class::FloatDiv 0 0.00% 65.05% # Class of executed instruction 442system.cpu.op_class::FloatMisc 0 0.00% 65.05% # Class of executed instruction 443system.cpu.op_class::FloatSqrt 0 0.00% 65.05% # Class of executed instruction 444system.cpu.op_class::SimdAdd 0 0.00% 65.05% # Class of executed instruction 445system.cpu.op_class::SimdAddAcc 0 0.00% 65.05% # Class of executed instruction 446system.cpu.op_class::SimdAlu 0 0.00% 65.05% # Class of executed instruction 447system.cpu.op_class::SimdCmp 0 0.00% 65.05% # Class of executed instruction 448system.cpu.op_class::SimdCvt 0 0.00% 65.05% # Class of executed instruction 449system.cpu.op_class::SimdMisc 0 0.00% 65.05% # Class of executed instruction 450system.cpu.op_class::SimdMult 0 0.00% 65.05% # Class of executed instruction 451system.cpu.op_class::SimdMultAcc 0 0.00% 65.05% # Class of executed instruction 452system.cpu.op_class::SimdShift 0 0.00% 65.05% # Class of executed instruction 453system.cpu.op_class::SimdShiftAcc 0 0.00% 65.05% # Class of executed instruction 454system.cpu.op_class::SimdSqrt 0 0.00% 65.05% # Class of executed instruction 455system.cpu.op_class::SimdFloatAdd 0 0.00% 65.05% # Class of executed instruction 456system.cpu.op_class::SimdFloatAlu 0 0.00% 65.05% # Class of executed instruction 457system.cpu.op_class::SimdFloatCmp 0 0.00% 65.05% # Class of executed instruction 458system.cpu.op_class::SimdFloatCvt 0 0.00% 65.05% # Class of executed instruction 459system.cpu.op_class::SimdFloatDiv 0 0.00% 65.05% # Class of executed instruction 460system.cpu.op_class::SimdFloatMisc 3 0.05% 65.10% # Class of executed instruction 461system.cpu.op_class::SimdFloatMult 0 0.00% 65.10% # Class of executed instruction 462system.cpu.op_class::SimdFloatMultAcc 0 0.00% 65.10% # Class of executed instruction 463system.cpu.op_class::SimdFloatSqrt 0 0.00% 65.10% # Class of executed instruction 464system.cpu.op_class::MemRead 1085 18.61% 83.71% # Class of executed instruction 465system.cpu.op_class::MemWrite 934 16.02% 99.73% # Class of executed instruction 466system.cpu.op_class::FloatMemRead 0 0.00% 99.73% # Class of executed instruction 467system.cpu.op_class::FloatMemWrite 16 0.27% 100.00% # Class of executed instruction 468system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction 469system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction 470system.cpu.op_class::total 5831 # Class of executed instruction 471system.membus.snoop_filter.tot_requests 0 # Total number of requests made to the snoop filter. 472system.membus.snoop_filter.hit_single_requests 0 # Number of requests hitting in the snoop filter with a single holder of the requested data. 473system.membus.snoop_filter.hit_multi_requests 0 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. 474system.membus.snoop_filter.tot_snoops 0 # Total number of snoops made to the snoop filter. 475system.membus.snoop_filter.hit_single_snoops 0 # Number of snoops hitting in the snoop filter with a single holder of the requested data. 476system.membus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. 477system.membus.pwrStateResidencyTicks::UNDEFINED 372284000 # Cumulative time (in ticks) in various power states 478system.membus.trans_dist::ReadReq 6078 # Transaction distribution 479system.membus.trans_dist::ReadResp 6088 # Transaction distribution 480system.membus.trans_dist::WriteReq 925 # Transaction distribution 481system.membus.trans_dist::WriteResp 925 # Transaction distribution 482system.membus.trans_dist::LoadLockedReq 11 # Transaction distribution 483system.membus.trans_dist::StoreCondReq 11 # Transaction distribution 484system.membus.trans_dist::StoreCondResp 11 # Transaction distribution 485system.membus.pkt_count_system.cpu.icache_port::system.mem_ctrl.port 10055 # Packet count per connected master and slave (bytes) 486system.membus.pkt_count_system.cpu.dcache_port::system.mem_ctrl.port 3994 # Packet count per connected master and slave (bytes) 487system.membus.pkt_count::total 14049 # Packet count per connected master and slave (bytes) 488system.membus.pkt_size_system.cpu.icache_port::system.mem_ctrl.port 20108 # Cumulative packet size per connected master and slave (bytes) 489system.membus.pkt_size_system.cpu.dcache_port::system.mem_ctrl.port 8368 # Cumulative packet size per connected master and slave (bytes) 490system.membus.pkt_size::total 28476 # Cumulative packet size per connected master and slave (bytes) 491system.membus.snoops 0 # Total snoops (count) 492system.membus.snoopTraffic 0 # Total snoop traffic (bytes) 493system.membus.snoop_fanout::samples 7025 # Request fanout histogram 494system.membus.snoop_fanout::mean 0 # Request fanout histogram 495system.membus.snoop_fanout::stdev 0 # Request fanout histogram 496system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram 497system.membus.snoop_fanout::0 7025 100.00% 100.00% # Request fanout histogram 498system.membus.snoop_fanout::1 0 0.00% 100.00% # Request fanout histogram 499system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 500system.membus.snoop_fanout::min_value 0 # Request fanout histogram 501system.membus.snoop_fanout::max_value 0 # Request fanout histogram 502system.membus.snoop_fanout::total 7025 # Request fanout histogram 503system.membus.reqLayer0.occupancy 7961000 # Layer occupancy (ticks) 504system.membus.reqLayer0.utilization 2.1 # Layer utilization (%) 505system.membus.respLayer0.occupancy 11413250 # Layer occupancy (ticks) 506system.membus.respLayer0.utilization 3.1 # Layer utilization (%) 507system.membus.respLayer1.occupancy 3327250 # Layer occupancy (ticks) 508system.membus.respLayer1.utilization 0.9 # Layer utilization (%) 509 510---------- End Simulation Statistics ---------- 511