config.ini revision 11312:3d7a85d71bd1
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu dvfs_handler mem_ctrl membus 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain 17eventq_index=0 18exit_on_work_items=false 19init_param=0 20kernel= 21kernel_addr_check=true 22load_addr_mask=1099511627775 23load_offset=0 24mem_mode=timing 25mem_ranges=0:536870911 26memories=system.mem_ctrl 27mmap_using_noreserve=false 28multi_thread=false 29num_work_ids=16 30readfile= 31symbolfile= 32work_begin_ckpt_count=0 33work_begin_cpu_id_exit=-1 34work_begin_exit_count=0 35work_cpus_ckpt_count=0 36work_end_ckpt_count=0 37work_end_exit_count=0 38work_item_id=-1 39system_port=system.membus.slave[2] 40 41[system.clk_domain] 42type=SrcClockDomain 43children=voltage_domain 44clock=1000 45domain_id=-1 46eventq_index=0 47init_perf_level=0 48voltage_domain=system.clk_domain.voltage_domain 49 50[system.clk_domain.voltage_domain] 51type=VoltageDomain 52eventq_index=0 53voltage=1.000000 54 55[system.cpu] 56type=TimingSimpleCPU 57children=dstage2_mmu dtb interrupts isa istage2_mmu itb tracer workload 58branchPred=Null 59checker=Null 60clk_domain=system.clk_domain 61cpu_id=-1 62do_checkpoint_insts=true 63do_quiesce=true 64do_statistics_insts=true 65dstage2_mmu=system.cpu.dstage2_mmu 66dtb=system.cpu.dtb 67eventq_index=0 68function_trace=false 69function_trace_start=0 70interrupts=system.cpu.interrupts 71isa=system.cpu.isa 72istage2_mmu=system.cpu.istage2_mmu 73itb=system.cpu.itb 74max_insts_all_threads=0 75max_insts_any_thread=0 76max_loads_all_threads=0 77max_loads_any_thread=0 78numThreads=1 79profile=0 80progress_interval=0 81simpoint_start_insts= 82socket_id=0 83switched_out=false 84system=system 85tracer=system.cpu.tracer 86workload=system.cpu.workload 87dcache_port=system.membus.slave[1] 88icache_port=system.membus.slave[0] 89 90[system.cpu.dstage2_mmu] 91type=ArmStage2MMU 92children=stage2_tlb 93eventq_index=0 94stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb 95sys=system 96tlb=system.cpu.dtb 97 98[system.cpu.dstage2_mmu.stage2_tlb] 99type=ArmTLB 100children=walker 101eventq_index=0 102is_stage2=true 103size=32 104walker=system.cpu.dstage2_mmu.stage2_tlb.walker 105 106[system.cpu.dstage2_mmu.stage2_tlb.walker] 107type=ArmTableWalker 108clk_domain=system.clk_domain 109eventq_index=0 110is_stage2=true 111num_squash_per_cycle=2 112sys=system 113 114[system.cpu.dtb] 115type=ArmTLB 116children=walker 117eventq_index=0 118is_stage2=false 119size=64 120walker=system.cpu.dtb.walker 121 122[system.cpu.dtb.walker] 123type=ArmTableWalker 124clk_domain=system.clk_domain 125eventq_index=0 126is_stage2=false 127num_squash_per_cycle=2 128sys=system 129 130[system.cpu.interrupts] 131type=ArmInterrupts 132eventq_index=0 133 134[system.cpu.isa] 135type=ArmISA 136decoderFlavour=Generic 137eventq_index=0 138fpsid=1090793632 139id_aa64afr0_el1=0 140id_aa64afr1_el1=0 141id_aa64dfr0_el1=1052678 142id_aa64dfr1_el1=0 143id_aa64isar0_el1=0 144id_aa64isar1_el1=0 145id_aa64mmfr0_el1=15728642 146id_aa64mmfr1_el1=0 147id_aa64pfr0_el1=17 148id_aa64pfr1_el1=0 149id_isar0=34607377 150id_isar1=34677009 151id_isar2=555950401 152id_isar3=17899825 153id_isar4=268501314 154id_isar5=0 155id_mmfr0=270536963 156id_mmfr1=0 157id_mmfr2=19070976 158id_mmfr3=34611729 159id_pfr0=49 160id_pfr1=4113 161midr=1091551472 162pmu=Null 163system=system 164 165[system.cpu.istage2_mmu] 166type=ArmStage2MMU 167children=stage2_tlb 168eventq_index=0 169stage2_tlb=system.cpu.istage2_mmu.stage2_tlb 170sys=system 171tlb=system.cpu.itb 172 173[system.cpu.istage2_mmu.stage2_tlb] 174type=ArmTLB 175children=walker 176eventq_index=0 177is_stage2=true 178size=32 179walker=system.cpu.istage2_mmu.stage2_tlb.walker 180 181[system.cpu.istage2_mmu.stage2_tlb.walker] 182type=ArmTableWalker 183clk_domain=system.clk_domain 184eventq_index=0 185is_stage2=true 186num_squash_per_cycle=2 187sys=system 188 189[system.cpu.itb] 190type=ArmTLB 191children=walker 192eventq_index=0 193is_stage2=false 194size=64 195walker=system.cpu.itb.walker 196 197[system.cpu.itb.walker] 198type=ArmTableWalker 199clk_domain=system.clk_domain 200eventq_index=0 201is_stage2=false 202num_squash_per_cycle=2 203sys=system 204 205[system.cpu.tracer] 206type=ExeTracer 207eventq_index=0 208 209[system.cpu.workload] 210type=LiveProcess 211cmd=tests/test-progs/hello/bin/arm/linux/hello 212cwd= 213drivers= 214egid=100 215env= 216errout=cerr 217euid=100 218eventq_index=0 219executable= 220gid=100 221input=cin 222kvmInSE=false 223max_stack_size=67108864 224output=cout 225pid=100 226ppid=99 227simpoint=0 228system=system 229uid=100 230useArchPT=false 231 232[system.dvfs_handler] 233type=DVFSHandler 234domains= 235enable=false 236eventq_index=0 237sys_clk_domain=system.clk_domain 238transition_latency=100000000 239 240[system.mem_ctrl] 241type=DRAMCtrl 242IDD0=0.075000 243IDD02=0.000000 244IDD2N=0.050000 245IDD2N2=0.000000 246IDD2P0=0.000000 247IDD2P02=0.000000 248IDD2P1=0.000000 249IDD2P12=0.000000 250IDD3N=0.057000 251IDD3N2=0.000000 252IDD3P0=0.000000 253IDD3P02=0.000000 254IDD3P1=0.000000 255IDD3P12=0.000000 256IDD4R=0.187000 257IDD4R2=0.000000 258IDD4W=0.165000 259IDD4W2=0.000000 260IDD5=0.220000 261IDD52=0.000000 262IDD6=0.000000 263IDD62=0.000000 264VDD=1.500000 265VDD2=0.000000 266activation_limit=4 267addr_mapping=RoRaBaCoCh 268bank_groups_per_rank=0 269banks_per_rank=8 270burst_length=8 271channels=1 272clk_domain=system.clk_domain 273conf_table_reported=true 274device_bus_width=8 275device_rowbuffer_size=1024 276device_size=536870912 277devices_per_rank=8 278dll=true 279eventq_index=0 280in_addr_map=true 281max_accesses_per_row=16 282mem_sched_policy=frfcfs 283min_writes_per_switch=16 284null=false 285page_policy=open_adaptive 286range=0:536870911 287ranks_per_channel=2 288read_buffer_size=32 289static_backend_latency=10000 290static_frontend_latency=10000 291tBURST=5000 292tCCD_L=0 293tCK=1250 294tCL=13750 295tCS=2500 296tRAS=35000 297tRCD=13750 298tREFI=7800000 299tRFC=260000 300tRP=13750 301tRRD=6000 302tRRD_L=0 303tRTP=7500 304tRTW=2500 305tWR=15000 306tWTR=7500 307tXAW=30000 308tXP=0 309tXPDLL=0 310tXS=0 311tXSDLL=0 312write_buffer_size=64 313write_high_thresh_perc=85 314write_low_thresh_perc=50 315port=system.membus.master[0] 316 317[system.membus] 318type=CoherentXBar 319clk_domain=system.clk_domain 320eventq_index=0 321forward_latency=4 322frontend_latency=3 323response_latency=2 324snoop_filter=Null 325snoop_response_latency=4 326system=system 327use_default_range=false 328width=16 329master=system.mem_ctrl.port 330slave=system.cpu.icache_port system.cpu.dcache_port system.system_port 331 332