config.ini revision 11440
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu dvfs_handler l2bus l2cache mem_ctrl membus 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain 17eventq_index=0 18exit_on_work_items=false 19init_param=0 20kernel= 21kernel_addr_check=true 22load_addr_mask=1099511627775 23load_offset=0 24mem_mode=timing 25mem_ranges=0:536870911 26memories=system.mem_ctrl 27mmap_using_noreserve=false 28multi_thread=false 29num_work_ids=16 30readfile= 31symbolfile= 32thermal_components= 33thermal_model=Null 34work_begin_ckpt_count=0 35work_begin_cpu_id_exit=-1 36work_begin_exit_count=0 37work_cpus_ckpt_count=0 38work_end_ckpt_count=0 39work_end_exit_count=0 40work_item_id=-1 41system_port=system.membus.slave[1] 42 43[system.clk_domain] 44type=SrcClockDomain 45children=voltage_domain 46clock=1000 47domain_id=-1 48eventq_index=0 49init_perf_level=0 50voltage_domain=system.clk_domain.voltage_domain 51 52[system.clk_domain.voltage_domain] 53type=VoltageDomain 54eventq_index=0 55voltage=1.000000 56 57[system.cpu] 58type=TimingSimpleCPU 59children=dcache dtb icache interrupts isa itb tracer workload 60branchPred=Null 61checker=Null 62clk_domain=system.clk_domain 63cpu_id=-1 64do_checkpoint_insts=true 65do_quiesce=true 66do_statistics_insts=true 67dtb=system.cpu.dtb 68eventq_index=0 69function_trace=false 70function_trace_start=0 71interrupts=system.cpu.interrupts 72isa=system.cpu.isa 73itb=system.cpu.itb 74max_insts_all_threads=0 75max_insts_any_thread=0 76max_loads_all_threads=0 77max_loads_any_thread=0 78numThreads=1 79profile=0 80progress_interval=0 81simpoint_start_insts= 82socket_id=0 83switched_out=false 84system=system 85tracer=system.cpu.tracer 86workload=system.cpu.workload 87dcache_port=system.cpu.dcache.cpu_side 88icache_port=system.cpu.icache.cpu_side 89 90[system.cpu.dcache] 91type=Cache 92children=tags 93addr_ranges=0:18446744073709551615 94assoc=2 95clk_domain=system.clk_domain 96clusivity=mostly_incl 97demand_mshr_reserve=1 98eventq_index=0 99hit_latency=2 100is_read_only=false 101max_miss_count=0 102mshrs=4 103prefetch_on_access=false 104prefetcher=Null 105response_latency=2 106sequential_access=false 107size=65536 108system=system 109tags=system.cpu.dcache.tags 110tgts_per_mshr=20 111write_buffers=8 112writeback_clean=false 113cpu_side=system.cpu.dcache_port 114mem_side=system.l2bus.slave[1] 115 116[system.cpu.dcache.tags] 117type=LRU 118assoc=2 119block_size=64 120clk_domain=system.clk_domain 121eventq_index=0 122hit_latency=2 123sequential_access=false 124size=65536 125 126[system.cpu.dtb] 127type=AlphaTLB 128eventq_index=0 129size=64 130 131[system.cpu.icache] 132type=Cache 133children=tags 134addr_ranges=0:18446744073709551615 135assoc=2 136clk_domain=system.clk_domain 137clusivity=mostly_incl 138demand_mshr_reserve=1 139eventq_index=0 140hit_latency=2 141is_read_only=false 142max_miss_count=0 143mshrs=4 144prefetch_on_access=false 145prefetcher=Null 146response_latency=2 147sequential_access=false 148size=16384 149system=system 150tags=system.cpu.icache.tags 151tgts_per_mshr=20 152write_buffers=8 153writeback_clean=false 154cpu_side=system.cpu.icache_port 155mem_side=system.l2bus.slave[0] 156 157[system.cpu.icache.tags] 158type=LRU 159assoc=2 160block_size=64 161clk_domain=system.clk_domain 162eventq_index=0 163hit_latency=2 164sequential_access=false 165size=16384 166 167[system.cpu.interrupts] 168type=AlphaInterrupts 169eventq_index=0 170 171[system.cpu.isa] 172type=AlphaISA 173eventq_index=0 174system=system 175 176[system.cpu.itb] 177type=AlphaTLB 178eventq_index=0 179size=48 180 181[system.cpu.tracer] 182type=ExeTracer 183eventq_index=0 184 185[system.cpu.workload] 186type=LiveProcess 187cmd=tests/test-progs/hello/bin/alpha/linux/hello 188cwd= 189drivers= 190egid=100 191env= 192errout=cerr 193euid=100 194eventq_index=0 195executable= 196gid=100 197input=cin 198kvmInSE=false 199max_stack_size=67108864 200output=cout 201pid=100 202ppid=99 203simpoint=0 204system=system 205uid=100 206useArchPT=false 207 208[system.dvfs_handler] 209type=DVFSHandler 210domains= 211enable=false 212eventq_index=0 213sys_clk_domain=system.clk_domain 214transition_latency=100000000 215 216[system.l2bus] 217type=CoherentXBar 218children=snoop_filter 219clk_domain=system.clk_domain 220eventq_index=0 221forward_latency=0 222frontend_latency=1 223point_of_coherency=false 224response_latency=1 225snoop_filter=system.l2bus.snoop_filter 226snoop_response_latency=1 227system=system 228use_default_range=false 229width=32 230master=system.l2cache.cpu_side 231slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side 232 233[system.l2bus.snoop_filter] 234type=SnoopFilter 235eventq_index=0 236lookup_latency=0 237max_capacity=8388608 238system=system 239 240[system.l2cache] 241type=Cache 242children=tags 243addr_ranges=0:18446744073709551615 244assoc=8 245clk_domain=system.clk_domain 246clusivity=mostly_incl 247demand_mshr_reserve=1 248eventq_index=0 249hit_latency=20 250is_read_only=false 251max_miss_count=0 252mshrs=20 253prefetch_on_access=false 254prefetcher=Null 255response_latency=20 256sequential_access=false 257size=262144 258system=system 259tags=system.l2cache.tags 260tgts_per_mshr=12 261write_buffers=8 262writeback_clean=false 263cpu_side=system.l2bus.master[0] 264mem_side=system.membus.slave[0] 265 266[system.l2cache.tags] 267type=LRU 268assoc=8 269block_size=64 270clk_domain=system.clk_domain 271eventq_index=0 272hit_latency=20 273sequential_access=false 274size=262144 275 276[system.mem_ctrl] 277type=DRAMCtrl 278IDD0=0.075000 279IDD02=0.000000 280IDD2N=0.050000 281IDD2N2=0.000000 282IDD2P0=0.000000 283IDD2P02=0.000000 284IDD2P1=0.000000 285IDD2P12=0.000000 286IDD3N=0.057000 287IDD3N2=0.000000 288IDD3P0=0.000000 289IDD3P02=0.000000 290IDD3P1=0.000000 291IDD3P12=0.000000 292IDD4R=0.187000 293IDD4R2=0.000000 294IDD4W=0.165000 295IDD4W2=0.000000 296IDD5=0.220000 297IDD52=0.000000 298IDD6=0.000000 299IDD62=0.000000 300VDD=1.500000 301VDD2=0.000000 302activation_limit=4 303addr_mapping=RoRaBaCoCh 304bank_groups_per_rank=0 305banks_per_rank=8 306burst_length=8 307channels=1 308clk_domain=system.clk_domain 309conf_table_reported=true 310device_bus_width=8 311device_rowbuffer_size=1024 312device_size=536870912 313devices_per_rank=8 314dll=true 315eventq_index=0 316in_addr_map=true 317max_accesses_per_row=16 318mem_sched_policy=frfcfs 319min_writes_per_switch=16 320null=false 321page_policy=open_adaptive 322range=0:536870911 323ranks_per_channel=2 324read_buffer_size=32 325static_backend_latency=10000 326static_frontend_latency=10000 327tBURST=5000 328tCCD_L=0 329tCK=1250 330tCL=13750 331tCS=2500 332tRAS=35000 333tRCD=13750 334tREFI=7800000 335tRFC=260000 336tRP=13750 337tRRD=6000 338tRRD_L=0 339tRTP=7500 340tRTW=2500 341tWR=15000 342tWTR=7500 343tXAW=30000 344tXP=0 345tXPDLL=0 346tXS=0 347tXSDLL=0 348write_buffer_size=64 349write_high_thresh_perc=85 350write_low_thresh_perc=50 351port=system.membus.master[0] 352 353[system.membus] 354type=CoherentXBar 355clk_domain=system.clk_domain 356eventq_index=0 357forward_latency=4 358frontend_latency=3 359point_of_coherency=true 360response_latency=2 361snoop_filter=Null 362snoop_response_latency=4 363system=system 364use_default_range=false 365width=16 366master=system.mem_ctrl.port 367slave=system.l2cache.mem_side system.system_port 368 369