simout revision 11731:c473ca7cc650
1Redirecting stdout to build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64i/simple-timing-ruby/simout
2Redirecting stderr to build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64i/simple-timing-ruby/simerr
3gem5 Simulator System.  http://gem5.org
4gem5 is copyrighted software; use the --copyright option for details.
5
6gem5 compiled Nov 30 2016 14:33:35
7gem5 started Nov 30 2016 16:18:44
8gem5 executing on zizzer, pid 34093
9command line: /z/powerjg/gem5-upstream/build/RISCV/gem5.opt -d build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64i/simple-timing-ruby -re /z/powerjg/gem5-upstream/tests/testing/../run.py quick/se/02.insttest/riscv/linux-rv64i/simple-timing-ruby
10
11Global frequency set at 1000000000 ticks per second
12info: Entering event queue @ 0.  Starting simulation...
13info: Increasing stack size by one page.
14lui: PASS
15lui, negative: PASS
16auipc: 0x157E0
17auipc: PASS
18jal: PASS
19jalr: PASS
20beq, equal: PASS
21beq, not equal: PASS
22bne, equal: PASS
23bne, not equal: PASS
24blt, less: PASS
25blt, equal: PASS
26blt, greater: PASS
27bge, less: PASS
28bge, equal: PASS
29bge, greater: PASS
30bltu, greater: PASS
31bltu, equal: PASS
32bltu, less: PASS
33bgeu, greater: PASS
34bgeu, equal: PASS
35bgeu, less: PASS
36lb, positive: PASS
37lb, negative: PASS
38lh, positive: PASS
39lh, negative: PASS
40lw, positive: PASS
41lw, negative: PASS
42lbu: PASS
43lhu: PASS
44sb: PASS
45sh: PASS
46sw: PASS
47addi: PASS
48addi, overflow: PASS
49slti, true: PASS
50slti, false: PASS
51sltiu, false: PASS
52sltiu, true: PASS
53xori (1): PASS
54xori (0): PASS
55ori (1): PASS
56ori (A): PASS
57andi (0): PASS
58andi (1): PASS
59slli, general: PASS
60slli, erase: PASS
61srli, general: PASS
62srli, erase: PASS
63srli, negative: PASS
64srai, general: PASS
65srai, erase: PASS
66srai, negative: PASS
67add: PASS
68add, overflow: PASS
69sub: PASS
70sub, "overflow": PASS
71sll, general: PASS
72sll, erase: PASS
73slt, true: PASS
74slt, false: PASS
75sltu, false: PASS
76sltu, true: PASS
77xor (1): PASS
78xor (0): PASS
79srl, general: PASS
80srl, erase: PASS
81srl, negative: PASS
82sra, general: PASS
83sra, erase: PASS
84sra, negative: PASS
85or (1): PASS
86or (A): PASS
87and (0): PASS
88and (-1): PASS
89Bytes written: 15
90open, write: PASS
91access F_OK: PASS
92access R_OK: PASS
93access W_OK: PASS
94access X_OK: PASS
95stat:
96	st_dev =	2054
97	st_ino =	55451710
98	st_mode =	33188
99	st_nlink =	1
100	st_uid =	1004
101	st_gid =	1007
102	st_rdev =	0
103	st_size =	0
104	st_blksize =	0
105	st_blocks =	1480540733
106fstat:
107	st_dev =	2054
108	st_ino =	55451710
109	st_mode =	33188
110	st_nlink =	1
111	st_uid =	1004
112	st_gid =	1007
113	st_rdev =	0
114	st_size =	0
115	st_blksize =	0
116	st_blocks =	1480540733
117open, stat: PASS
118Bytes read: 15
119String read: this is a test
120open, read, unlink: PASS
121times:
122	tms_utime =	0
123	tms_stime =	0
124	tms_cutime =	0
125	tms_cstime =	0
126times: PASS
127timeval:
128	tv_sec =	1000000000
129	tv_usec =	3935
130gettimeofday: PASS
131Cycles: 4032706
132rdcycle: PASS
133Time: 1480540736
134rdtime: PASS
135Instructions Retired: 215243
136rdinstret: PASS
137lwu: PASS
138ld: PASS
139sd: PASS
140addiw: PASS
141addiw, overflow: PASS
142addiw, truncate: PASS
143slliw, general: PASS
144slliw, erase: PASS
145slliw, truncate: PASS
146srliw, general: PASS
147srliw, erase: PASS
148srliw, negative: PASS
149srliw, truncate: PASS
150sraiw, general: PASS
151sraiw, erase: PASS
152sraiw, negative: PASS
153sraiw, truncate: PASS
154addw: PASS
155addw, overflow: PASS
156addw, truncate: PASS
157subw: PASS
158subw, "overflow": PASS
159subw, truncate: PASS
160sllw, general: PASS
161sllw, erase: PASS
162sllw, truncate: PASS
163srlw, general: PASS
164srlw, erase: PASS
165srlw, negative: PASS
166srlw, truncate: PASS
167sraw, general: PASS
168sraw, erase: PASS
169sraw, negative: PASS
170sraw, truncate: PASS
171Exiting @ tick 5246466 because target called exit()
172