stats.txt revision 11731:c473ca7cc650
1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.004665 # Number of seconds simulated 4sim_ticks 4665394 # Number of ticks simulated 5final_tick 4665394 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000 # Frequency of simulated ticks 7host_inst_rate 17585 # Simulator instruction rate (inst/s) 8host_op_rate 17585 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 362753 # Simulator tick rate (ticks/s) 10host_mem_usage 412420 # Number of bytes of host memory used 11host_seconds 12.86 # Real time elapsed on the host 12sim_insts 226159 # Number of instructions simulated 13sim_ops 226159 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1 # Clock period in ticks 16system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED 4665394 # Cumulative time (in ticks) in various power states 17system.mem_ctrls.bytes_read::ruby.dir_cntrl0 4623808 # Number of bytes read from this memory 18system.mem_ctrls.bytes_read::total 4623808 # Number of bytes read from this memory 19system.mem_ctrls.bytes_written::ruby.dir_cntrl0 4623552 # Number of bytes written to this memory 20system.mem_ctrls.bytes_written::total 4623552 # Number of bytes written to this memory 21system.mem_ctrls.num_reads::ruby.dir_cntrl0 72247 # Number of read requests responded to by this memory 22system.mem_ctrls.num_reads::total 72247 # Number of read requests responded to by this memory 23system.mem_ctrls.num_writes::ruby.dir_cntrl0 72243 # Number of write requests responded to by this memory 24system.mem_ctrls.num_writes::total 72243 # Number of write requests responded to by this memory 25system.mem_ctrls.bw_read::ruby.dir_cntrl0 991086283 # Total read bandwidth from this memory (bytes/s) 26system.mem_ctrls.bw_read::total 991086283 # Total read bandwidth from this memory (bytes/s) 27system.mem_ctrls.bw_write::ruby.dir_cntrl0 991031411 # Write bandwidth from this memory (bytes/s) 28system.mem_ctrls.bw_write::total 991031411 # Write bandwidth from this memory (bytes/s) 29system.mem_ctrls.bw_total::ruby.dir_cntrl0 1982117695 # Total bandwidth to/from this memory (bytes/s) 30system.mem_ctrls.bw_total::total 1982117695 # Total bandwidth to/from this memory (bytes/s) 31system.mem_ctrls.readReqs 72247 # Number of read requests accepted 32system.mem_ctrls.writeReqs 72243 # Number of write requests accepted 33system.mem_ctrls.readBursts 72247 # Number of DRAM read bursts, including those serviced by the write queue 34system.mem_ctrls.writeBursts 72243 # Number of DRAM write bursts, including those merged in the write queue 35system.mem_ctrls.bytesReadDRAM 2375168 # Total number of bytes read from DRAM 36system.mem_ctrls.bytesReadWrQ 2248640 # Total number of bytes read from write queue 37system.mem_ctrls.bytesWritten 2474112 # Total number of bytes written to DRAM 38system.mem_ctrls.bytesReadSys 4623808 # Total read bytes from the system interface side 39system.mem_ctrls.bytesWrittenSys 4623552 # Total written bytes from the system interface side 40system.mem_ctrls.servicedByWrQ 35135 # Number of DRAM read bursts serviced by the write queue 41system.mem_ctrls.mergedWrBursts 33568 # Number of DRAM write bursts merged with an existing one 42system.mem_ctrls.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write 43system.mem_ctrls.perBankRdBursts::0 360 # Per bank write bursts 44system.mem_ctrls.perBankRdBursts::1 641 # Per bank write bursts 45system.mem_ctrls.perBankRdBursts::2 33 # Per bank write bursts 46system.mem_ctrls.perBankRdBursts::3 2702 # Per bank write bursts 47system.mem_ctrls.perBankRdBursts::4 5567 # Per bank write bursts 48system.mem_ctrls.perBankRdBursts::5 5413 # Per bank write bursts 49system.mem_ctrls.perBankRdBursts::6 5211 # Per bank write bursts 50system.mem_ctrls.perBankRdBursts::7 1018 # Per bank write bursts 51system.mem_ctrls.perBankRdBursts::8 201 # Per bank write bursts 52system.mem_ctrls.perBankRdBursts::9 679 # Per bank write bursts 53system.mem_ctrls.perBankRdBursts::10 1777 # Per bank write bursts 54system.mem_ctrls.perBankRdBursts::11 10251 # Per bank write bursts 55system.mem_ctrls.perBankRdBursts::12 1439 # Per bank write bursts 56system.mem_ctrls.perBankRdBursts::13 1161 # Per bank write bursts 57system.mem_ctrls.perBankRdBursts::14 39 # Per bank write bursts 58system.mem_ctrls.perBankRdBursts::15 620 # Per bank write bursts 59system.mem_ctrls.perBankWrBursts::0 374 # Per bank write bursts 60system.mem_ctrls.perBankWrBursts::1 689 # Per bank write bursts 61system.mem_ctrls.perBankWrBursts::2 35 # Per bank write bursts 62system.mem_ctrls.perBankWrBursts::3 2847 # Per bank write bursts 63system.mem_ctrls.perBankWrBursts::4 5733 # Per bank write bursts 64system.mem_ctrls.perBankWrBursts::5 5572 # Per bank write bursts 65system.mem_ctrls.perBankWrBursts::6 5809 # Per bank write bursts 66system.mem_ctrls.perBankWrBursts::7 1085 # Per bank write bursts 67system.mem_ctrls.perBankWrBursts::8 201 # Per bank write bursts 68system.mem_ctrls.perBankWrBursts::9 742 # Per bank write bursts 69system.mem_ctrls.perBankWrBursts::10 1831 # Per bank write bursts 70system.mem_ctrls.perBankWrBursts::11 10392 # Per bank write bursts 71system.mem_ctrls.perBankWrBursts::12 1454 # Per bank write bursts 72system.mem_ctrls.perBankWrBursts::13 1229 # Per bank write bursts 73system.mem_ctrls.perBankWrBursts::14 39 # Per bank write bursts 74system.mem_ctrls.perBankWrBursts::15 626 # Per bank write bursts 75system.mem_ctrls.numRdRetry 0 # Number of times read queue was full causing retry 76system.mem_ctrls.numWrRetry 0 # Number of times write queue was full causing retry 77system.mem_ctrls.totGap 4665243 # Total gap between requests 78system.mem_ctrls.readPktSize::0 0 # Read request sizes (log2) 79system.mem_ctrls.readPktSize::1 0 # Read request sizes (log2) 80system.mem_ctrls.readPktSize::2 0 # Read request sizes (log2) 81system.mem_ctrls.readPktSize::3 0 # Read request sizes (log2) 82system.mem_ctrls.readPktSize::4 0 # Read request sizes (log2) 83system.mem_ctrls.readPktSize::5 0 # Read request sizes (log2) 84system.mem_ctrls.readPktSize::6 72247 # Read request sizes (log2) 85system.mem_ctrls.writePktSize::0 0 # Write request sizes (log2) 86system.mem_ctrls.writePktSize::1 0 # Write request sizes (log2) 87system.mem_ctrls.writePktSize::2 0 # Write request sizes (log2) 88system.mem_ctrls.writePktSize::3 0 # Write request sizes (log2) 89system.mem_ctrls.writePktSize::4 0 # Write request sizes (log2) 90system.mem_ctrls.writePktSize::5 0 # Write request sizes (log2) 91system.mem_ctrls.writePktSize::6 72243 # Write request sizes (log2) 92system.mem_ctrls.rdQLenPdf::0 37112 # What read queue length does an incoming req see 93system.mem_ctrls.rdQLenPdf::1 0 # What read queue length does an incoming req see 94system.mem_ctrls.rdQLenPdf::2 0 # What read queue length does an incoming req see 95system.mem_ctrls.rdQLenPdf::3 0 # What read queue length does an incoming req see 96system.mem_ctrls.rdQLenPdf::4 0 # What read queue length does an incoming req see 97system.mem_ctrls.rdQLenPdf::5 0 # What read queue length does an incoming req see 98system.mem_ctrls.rdQLenPdf::6 0 # What read queue length does an incoming req see 99system.mem_ctrls.rdQLenPdf::7 0 # What read queue length does an incoming req see 100system.mem_ctrls.rdQLenPdf::8 0 # What read queue length does an incoming req see 101system.mem_ctrls.rdQLenPdf::9 0 # What read queue length does an incoming req see 102system.mem_ctrls.rdQLenPdf::10 0 # What read queue length does an incoming req see 103system.mem_ctrls.rdQLenPdf::11 0 # What read queue length does an incoming req see 104system.mem_ctrls.rdQLenPdf::12 0 # What read queue length does an incoming req see 105system.mem_ctrls.rdQLenPdf::13 0 # What read queue length does an incoming req see 106system.mem_ctrls.rdQLenPdf::14 0 # What read queue length does an incoming req see 107system.mem_ctrls.rdQLenPdf::15 0 # What read queue length does an incoming req see 108system.mem_ctrls.rdQLenPdf::16 0 # What read queue length does an incoming req see 109system.mem_ctrls.rdQLenPdf::17 0 # What read queue length does an incoming req see 110system.mem_ctrls.rdQLenPdf::18 0 # What read queue length does an incoming req see 111system.mem_ctrls.rdQLenPdf::19 0 # What read queue length does an incoming req see 112system.mem_ctrls.rdQLenPdf::20 0 # What read queue length does an incoming req see 113system.mem_ctrls.rdQLenPdf::21 0 # What read queue length does an incoming req see 114system.mem_ctrls.rdQLenPdf::22 0 # What read queue length does an incoming req see 115system.mem_ctrls.rdQLenPdf::23 0 # What read queue length does an incoming req see 116system.mem_ctrls.rdQLenPdf::24 0 # What read queue length does an incoming req see 117system.mem_ctrls.rdQLenPdf::25 0 # What read queue length does an incoming req see 118system.mem_ctrls.rdQLenPdf::26 0 # What read queue length does an incoming req see 119system.mem_ctrls.rdQLenPdf::27 0 # What read queue length does an incoming req see 120system.mem_ctrls.rdQLenPdf::28 0 # What read queue length does an incoming req see 121system.mem_ctrls.rdQLenPdf::29 0 # What read queue length does an incoming req see 122system.mem_ctrls.rdQLenPdf::30 0 # What read queue length does an incoming req see 123system.mem_ctrls.rdQLenPdf::31 0 # What read queue length does an incoming req see 124system.mem_ctrls.wrQLenPdf::0 1 # What write queue length does an incoming req see 125system.mem_ctrls.wrQLenPdf::1 1 # What write queue length does an incoming req see 126system.mem_ctrls.wrQLenPdf::2 1 # What write queue length does an incoming req see 127system.mem_ctrls.wrQLenPdf::3 1 # What write queue length does an incoming req see 128system.mem_ctrls.wrQLenPdf::4 1 # What write queue length does an incoming req see 129system.mem_ctrls.wrQLenPdf::5 1 # What write queue length does an incoming req see 130system.mem_ctrls.wrQLenPdf::6 1 # What write queue length does an incoming req see 131system.mem_ctrls.wrQLenPdf::7 1 # What write queue length does an incoming req see 132system.mem_ctrls.wrQLenPdf::8 1 # What write queue length does an incoming req see 133system.mem_ctrls.wrQLenPdf::9 1 # What write queue length does an incoming req see 134system.mem_ctrls.wrQLenPdf::10 1 # What write queue length does an incoming req see 135system.mem_ctrls.wrQLenPdf::11 1 # What write queue length does an incoming req see 136system.mem_ctrls.wrQLenPdf::12 1 # What write queue length does an incoming req see 137system.mem_ctrls.wrQLenPdf::13 1 # What write queue length does an incoming req see 138system.mem_ctrls.wrQLenPdf::14 1 # What write queue length does an incoming req see 139system.mem_ctrls.wrQLenPdf::15 208 # What write queue length does an incoming req see 140system.mem_ctrls.wrQLenPdf::16 255 # What write queue length does an incoming req see 141system.mem_ctrls.wrQLenPdf::17 2030 # What write queue length does an incoming req see 142system.mem_ctrls.wrQLenPdf::18 2392 # What write queue length does an incoming req see 143system.mem_ctrls.wrQLenPdf::19 2414 # What write queue length does an incoming req see 144system.mem_ctrls.wrQLenPdf::20 2512 # What write queue length does an incoming req see 145system.mem_ctrls.wrQLenPdf::21 2548 # What write queue length does an incoming req see 146system.mem_ctrls.wrQLenPdf::22 2499 # What write queue length does an incoming req see 147system.mem_ctrls.wrQLenPdf::23 2385 # What write queue length does an incoming req see 148system.mem_ctrls.wrQLenPdf::24 2380 # What write queue length does an incoming req see 149system.mem_ctrls.wrQLenPdf::25 2383 # What write queue length does an incoming req see 150system.mem_ctrls.wrQLenPdf::26 2379 # What write queue length does an incoming req see 151system.mem_ctrls.wrQLenPdf::27 2380 # What write queue length does an incoming req see 152system.mem_ctrls.wrQLenPdf::28 2379 # What write queue length does an incoming req see 153system.mem_ctrls.wrQLenPdf::29 2379 # What write queue length does an incoming req see 154system.mem_ctrls.wrQLenPdf::30 2379 # What write queue length does an incoming req see 155system.mem_ctrls.wrQLenPdf::31 2379 # What write queue length does an incoming req see 156system.mem_ctrls.wrQLenPdf::32 2379 # What write queue length does an incoming req see 157system.mem_ctrls.wrQLenPdf::33 0 # What write queue length does an incoming req see 158system.mem_ctrls.wrQLenPdf::34 0 # What write queue length does an incoming req see 159system.mem_ctrls.wrQLenPdf::35 0 # What write queue length does an incoming req see 160system.mem_ctrls.wrQLenPdf::36 0 # What write queue length does an incoming req see 161system.mem_ctrls.wrQLenPdf::37 0 # What write queue length does an incoming req see 162system.mem_ctrls.wrQLenPdf::38 0 # What write queue length does an incoming req see 163system.mem_ctrls.wrQLenPdf::39 0 # What write queue length does an incoming req see 164system.mem_ctrls.wrQLenPdf::40 0 # What write queue length does an incoming req see 165system.mem_ctrls.wrQLenPdf::41 0 # What write queue length does an incoming req see 166system.mem_ctrls.wrQLenPdf::42 0 # What write queue length does an incoming req see 167system.mem_ctrls.wrQLenPdf::43 0 # What write queue length does an incoming req see 168system.mem_ctrls.wrQLenPdf::44 0 # What write queue length does an incoming req see 169system.mem_ctrls.wrQLenPdf::45 0 # What write queue length does an incoming req see 170system.mem_ctrls.wrQLenPdf::46 0 # What write queue length does an incoming req see 171system.mem_ctrls.wrQLenPdf::47 0 # What write queue length does an incoming req see 172system.mem_ctrls.wrQLenPdf::48 0 # What write queue length does an incoming req see 173system.mem_ctrls.wrQLenPdf::49 0 # What write queue length does an incoming req see 174system.mem_ctrls.wrQLenPdf::50 0 # What write queue length does an incoming req see 175system.mem_ctrls.wrQLenPdf::51 0 # What write queue length does an incoming req see 176system.mem_ctrls.wrQLenPdf::52 0 # What write queue length does an incoming req see 177system.mem_ctrls.wrQLenPdf::53 0 # What write queue length does an incoming req see 178system.mem_ctrls.wrQLenPdf::54 0 # What write queue length does an incoming req see 179system.mem_ctrls.wrQLenPdf::55 0 # What write queue length does an incoming req see 180system.mem_ctrls.wrQLenPdf::56 0 # What write queue length does an incoming req see 181system.mem_ctrls.wrQLenPdf::57 0 # What write queue length does an incoming req see 182system.mem_ctrls.wrQLenPdf::58 0 # What write queue length does an incoming req see 183system.mem_ctrls.wrQLenPdf::59 0 # What write queue length does an incoming req see 184system.mem_ctrls.wrQLenPdf::60 0 # What write queue length does an incoming req see 185system.mem_ctrls.wrQLenPdf::61 0 # What write queue length does an incoming req see 186system.mem_ctrls.wrQLenPdf::62 0 # What write queue length does an incoming req see 187system.mem_ctrls.wrQLenPdf::63 0 # What write queue length does an incoming req see 188system.mem_ctrls.bytesPerActivate::samples 13232 # Bytes accessed per row activation 189system.mem_ctrls.bytesPerActivate::mean 366.340992 # Bytes accessed per row activation 190system.mem_ctrls.bytesPerActivate::gmean 230.810737 # Bytes accessed per row activation 191system.mem_ctrls.bytesPerActivate::stdev 342.245951 # Bytes accessed per row activation 192system.mem_ctrls.bytesPerActivate::0-127 3082 23.29% 23.29% # Bytes accessed per row activation 193system.mem_ctrls.bytesPerActivate::128-255 3681 27.82% 51.11% # Bytes accessed per row activation 194system.mem_ctrls.bytesPerActivate::256-383 1764 13.33% 64.44% # Bytes accessed per row activation 195system.mem_ctrls.bytesPerActivate::384-511 976 7.38% 71.82% # Bytes accessed per row activation 196system.mem_ctrls.bytesPerActivate::512-639 696 5.26% 77.08% # Bytes accessed per row activation 197system.mem_ctrls.bytesPerActivate::640-767 455 3.44% 80.52% # Bytes accessed per row activation 198system.mem_ctrls.bytesPerActivate::768-895 307 2.32% 82.84% # Bytes accessed per row activation 199system.mem_ctrls.bytesPerActivate::896-1023 275 2.08% 84.92% # Bytes accessed per row activation 200system.mem_ctrls.bytesPerActivate::1024-1151 1996 15.08% 100.00% # Bytes accessed per row activation 201system.mem_ctrls.bytesPerActivate::total 13232 # Bytes accessed per row activation 202system.mem_ctrls.rdPerTurnAround::samples 2379 # Reads before turning the bus around for writes 203system.mem_ctrls.rdPerTurnAround::mean 15.599412 # Reads before turning the bus around for writes 204system.mem_ctrls.rdPerTurnAround::gmean 15.547106 # Reads before turning the bus around for writes 205system.mem_ctrls.rdPerTurnAround::stdev 1.309736 # Reads before turning the bus around for writes 206system.mem_ctrls.rdPerTurnAround::12-13 94 3.95% 3.95% # Reads before turning the bus around for writes 207system.mem_ctrls.rdPerTurnAround::14-15 1021 42.92% 46.87% # Reads before turning the bus around for writes 208system.mem_ctrls.rdPerTurnAround::16-17 1131 47.54% 94.41% # Reads before turning the bus around for writes 209system.mem_ctrls.rdPerTurnAround::18-19 122 5.13% 99.54% # Reads before turning the bus around for writes 210system.mem_ctrls.rdPerTurnAround::20-21 10 0.42% 99.96% # Reads before turning the bus around for writes 211system.mem_ctrls.rdPerTurnAround::36-37 1 0.04% 100.00% # Reads before turning the bus around for writes 212system.mem_ctrls.rdPerTurnAround::total 2379 # Reads before turning the bus around for writes 213system.mem_ctrls.wrPerTurnAround::samples 2379 # Writes before turning the bus around for reads 214system.mem_ctrls.wrPerTurnAround::mean 16.249685 # Writes before turning the bus around for reads 215system.mem_ctrls.wrPerTurnAround::gmean 16.232515 # Writes before turning the bus around for reads 216system.mem_ctrls.wrPerTurnAround::stdev 0.782399 # Writes before turning the bus around for reads 217system.mem_ctrls.wrPerTurnAround::16 2139 89.91% 89.91% # Writes before turning the bus around for reads 218system.mem_ctrls.wrPerTurnAround::17 18 0.76% 90.67% # Writes before turning the bus around for reads 219system.mem_ctrls.wrPerTurnAround::18 109 4.58% 95.25% # Writes before turning the bus around for reads 220system.mem_ctrls.wrPerTurnAround::19 94 3.95% 99.20% # Writes before turning the bus around for reads 221system.mem_ctrls.wrPerTurnAround::20 19 0.80% 100.00% # Writes before turning the bus around for reads 222system.mem_ctrls.wrPerTurnAround::total 2379 # Writes before turning the bus around for reads 223system.mem_ctrls.totQLat 719075 # Total ticks spent queuing 224system.mem_ctrls.totMemAccLat 1424203 # Total ticks spent from burst creation until serviced by the DRAM 225system.mem_ctrls.totBusLat 185560 # Total ticks spent in databus transfers 226system.mem_ctrls.avgQLat 19.38 # Average queueing delay per DRAM burst 227system.mem_ctrls.avgBusLat 5.00 # Average bus latency per DRAM burst 228system.mem_ctrls.avgMemAccLat 38.38 # Average memory access latency per DRAM burst 229system.mem_ctrls.avgRdBW 509.10 # Average DRAM read bandwidth in MiByte/s 230system.mem_ctrls.avgWrBW 530.31 # Average achieved write bandwidth in MiByte/s 231system.mem_ctrls.avgRdBWSys 991.09 # Average system read bandwidth in MiByte/s 232system.mem_ctrls.avgWrBWSys 991.03 # Average system write bandwidth in MiByte/s 233system.mem_ctrls.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s 234system.mem_ctrls.busUtil 8.12 # Data bus utilization in percentage 235system.mem_ctrls.busUtilRead 3.98 # Data bus utilization in percentage for reads 236system.mem_ctrls.busUtilWrite 4.14 # Data bus utilization in percentage for writes 237system.mem_ctrls.avgRdQLen 1.00 # Average read queue length when enqueuing 238system.mem_ctrls.avgWrQLen 25.97 # Average write queue length when enqueuing 239system.mem_ctrls.readRowHits 27462 # Number of row buffer hits during reads 240system.mem_ctrls.writeRowHits 35070 # Number of row buffer hits during writes 241system.mem_ctrls.readRowHitRate 74.00 # Row buffer hit rate for reads 242system.mem_ctrls.writeRowHitRate 90.68 # Row buffer hit rate for writes 243system.mem_ctrls.avgGap 32.29 # Average gap between requests 244system.mem_ctrls.pageHitRate 82.51 # Row buffer hit rate, read and write combined 245system.mem_ctrls_0.actEnergy 60632880 # Energy for activate commands per rank (pJ) 246system.mem_ctrls_0.preEnergy 32801496 # Energy for precharge commands per rank (pJ) 247system.mem_ctrls_0.readEnergy 239275680 # Energy for read commands per rank (pJ) 248system.mem_ctrls_0.writeEnergy 184946688 # Energy for write commands per rank (pJ) 249system.mem_ctrls_0.refreshEnergy 366325440.000000 # Energy for refresh commands per rank (pJ) 250system.mem_ctrls_0.actBackEnergy 608748144 # Energy for active background per rank (pJ) 251system.mem_ctrls_0.preBackEnergy 8669568 # Energy for precharge background per rank (pJ) 252system.mem_ctrls_0.actPowerDownEnergy 1381360344 # Energy for active power-down per rank (pJ) 253system.mem_ctrls_0.prePowerDownEnergy 69824640 # Energy for precharge power-down per rank (pJ) 254system.mem_ctrls_0.selfRefreshEnergy 28732560 # Energy for self refresh per rank (pJ) 255system.mem_ctrls_0.totalEnergy 2981317440 # Total energy per rank (pJ) 256system.mem_ctrls_0.averagePower 639.028009 # Core power per rank (mW) 257system.mem_ctrls_0.totalIdleTime 3307806 # Total Idle time Per DRAM Rank 258system.mem_ctrls_0.memoryStateTime::IDLE 5774 # Time in different power states 259system.mem_ctrls_0.memoryStateTime::REF 155020 # Time in different power states 260system.mem_ctrls_0.memoryStateTime::SREF 96709 # Time in different power states 261system.mem_ctrls_0.memoryStateTime::PRE_PDN 181835 # Time in different power states 262system.mem_ctrls_0.memoryStateTime::ACT 1196757 # Time in different power states 263system.mem_ctrls_0.memoryStateTime::ACT_PDN 3029299 # Time in different power states 264system.mem_ctrls_1.actEnergy 33886440 # Energy for activate commands per rank (pJ) 265system.mem_ctrls_1.preEnergy 18326952 # Energy for precharge commands per rank (pJ) 266system.mem_ctrls_1.readEnergy 184691808 # Energy for read commands per rank (pJ) 267system.mem_ctrls_1.writeEnergy 137924928 # Energy for write commands per rank (pJ) 268system.mem_ctrls_1.refreshEnergy 348500880.000000 # Energy for refresh commands per rank (pJ) 269system.mem_ctrls_1.actBackEnergy 590211744 # Energy for active background per rank (pJ) 270system.mem_ctrls_1.preBackEnergy 11048832 # Energy for precharge background per rank (pJ) 271system.mem_ctrls_1.actPowerDownEnergy 1320078504 # Energy for active power-down per rank (pJ) 272system.mem_ctrls_1.prePowerDownEnergy 60484992 # Energy for precharge power-down per rank (pJ) 273system.mem_ctrls_1.selfRefreshEnergy 72883440 # Energy for self refresh per rank (pJ) 274system.mem_ctrls_1.totalEnergy 2778038520 # Total energy per rank (pJ) 275system.mem_ctrls_1.averagePower 595.456358 # Core power per rank (mW) 276system.mem_ctrls_1.totalIdleTime 3342297 # Total Idle time Per DRAM Rank 277system.mem_ctrls_1.memoryStateTime::IDLE 12341 # Time in different power states 278system.mem_ctrls_1.memoryStateTime::REF 147456 # Time in different power states 279system.mem_ctrls_1.memoryStateTime::SREF 289875 # Time in different power states 280system.mem_ctrls_1.memoryStateTime::PRE_PDN 157513 # Time in different power states 281system.mem_ctrls_1.memoryStateTime::ACT 1163300 # Time in different power states 282system.mem_ctrls_1.memoryStateTime::ACT_PDN 2894909 # Time in different power states 283system.pwrStateResidencyTicks::UNDEFINED 4665394 # Cumulative time (in ticks) in various power states 284system.cpu.clk_domain.clock 1 # Clock period in ticks 285system.cpu.dtb.read_hits 0 # DTB read hits 286system.cpu.dtb.read_misses 0 # DTB read misses 287system.cpu.dtb.read_accesses 0 # DTB read accesses 288system.cpu.dtb.write_hits 0 # DTB write hits 289system.cpu.dtb.write_misses 0 # DTB write misses 290system.cpu.dtb.write_accesses 0 # DTB write accesses 291system.cpu.dtb.hits 0 # DTB hits 292system.cpu.dtb.misses 0 # DTB misses 293system.cpu.dtb.accesses 0 # DTB accesses 294system.cpu.itb.read_hits 0 # DTB read hits 295system.cpu.itb.read_misses 0 # DTB read misses 296system.cpu.itb.read_accesses 0 # DTB read accesses 297system.cpu.itb.write_hits 0 # DTB write hits 298system.cpu.itb.write_misses 0 # DTB write misses 299system.cpu.itb.write_accesses 0 # DTB write accesses 300system.cpu.itb.hits 0 # DTB hits 301system.cpu.itb.misses 0 # DTB misses 302system.cpu.itb.accesses 0 # DTB accesses 303system.cpu.workload.num_syscalls 115 # Number of system calls 304system.cpu.pwrStateResidencyTicks::ON 4665394 # Cumulative time (in ticks) in various power states 305system.cpu.numCycles 4665394 # number of cpu cycles simulated 306system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 307system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 308system.cpu.committedInsts 226159 # Number of instructions committed 309system.cpu.committedOps 226159 # Number of ops (including micro ops) committed 310system.cpu.num_int_alu_accesses 225992 # Number of integer alu accesses 311system.cpu.num_fp_alu_accesses 862 # Number of float alu accesses 312system.cpu.num_func_calls 16616 # number of times a function call or return occured 313system.cpu.num_conditional_control_insts 33789 # number of instructions that are conditional controls 314system.cpu.num_int_insts 225992 # number of integer instructions 315system.cpu.num_fp_insts 862 # number of float instructions 316system.cpu.num_int_register_reads 298589 # number of times the integer registers were read 317system.cpu.num_int_register_writes 154866 # number of times the integer registers were written 318system.cpu.num_fp_register_reads 733 # number of times the floating registers were read 319system.cpu.num_fp_register_writes 588 # number of times the floating registers were written 320system.cpu.num_mem_refs 88941 # number of memory refs 321system.cpu.num_load_insts 51711 # Number of load instructions 322system.cpu.num_store_insts 37230 # Number of store instructions 323system.cpu.num_idle_cycles 0 # Number of idle cycles 324system.cpu.num_busy_cycles 4665394 # Number of busy cycles 325system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles 326system.cpu.idle_fraction 0 # Percentage of idle cycles 327system.cpu.Branches 50405 # Number of branches fetched 328system.cpu.op_class::No_OpClass 117 0.05% 0.05% # Class of executed instruction 329system.cpu.op_class::IntAlu 136540 60.34% 60.39% # Class of executed instruction 330system.cpu.op_class::IntMult 325 0.14% 60.54% # Class of executed instruction 331system.cpu.op_class::IntDiv 40 0.02% 60.56% # Class of executed instruction 332system.cpu.op_class::FloatAdd 104 0.05% 60.60% # Class of executed instruction 333system.cpu.op_class::FloatCmp 119 0.05% 60.65% # Class of executed instruction 334system.cpu.op_class::FloatCvt 43 0.02% 60.67% # Class of executed instruction 335system.cpu.op_class::FloatMult 30 0.01% 60.69% # Class of executed instruction 336system.cpu.op_class::FloatMultAcc 0 0.00% 60.69% # Class of executed instruction 337system.cpu.op_class::FloatDiv 11 0.00% 60.69% # Class of executed instruction 338system.cpu.op_class::FloatMisc 0 0.00% 60.69% # Class of executed instruction 339system.cpu.op_class::FloatSqrt 5 0.00% 60.69% # Class of executed instruction 340system.cpu.op_class::SimdAdd 0 0.00% 60.69% # Class of executed instruction 341system.cpu.op_class::SimdAddAcc 0 0.00% 60.69% # Class of executed instruction 342system.cpu.op_class::SimdAlu 0 0.00% 60.69% # Class of executed instruction 343system.cpu.op_class::SimdCmp 0 0.00% 60.69% # Class of executed instruction 344system.cpu.op_class::SimdCvt 0 0.00% 60.69% # Class of executed instruction 345system.cpu.op_class::SimdMisc 0 0.00% 60.69% # Class of executed instruction 346system.cpu.op_class::SimdMult 0 0.00% 60.69% # Class of executed instruction 347system.cpu.op_class::SimdMultAcc 0 0.00% 60.69% # Class of executed instruction 348system.cpu.op_class::SimdShift 0 0.00% 60.69% # Class of executed instruction 349system.cpu.op_class::SimdShiftAcc 0 0.00% 60.69% # Class of executed instruction 350system.cpu.op_class::SimdSqrt 0 0.00% 60.69% # Class of executed instruction 351system.cpu.op_class::SimdFloatAdd 0 0.00% 60.69% # Class of executed instruction 352system.cpu.op_class::SimdFloatAlu 0 0.00% 60.69% # Class of executed instruction 353system.cpu.op_class::SimdFloatCmp 0 0.00% 60.69% # Class of executed instruction 354system.cpu.op_class::SimdFloatCvt 0 0.00% 60.69% # Class of executed instruction 355system.cpu.op_class::SimdFloatDiv 0 0.00% 60.69% # Class of executed instruction 356system.cpu.op_class::SimdFloatMisc 0 0.00% 60.69% # Class of executed instruction 357system.cpu.op_class::SimdFloatMult 0 0.00% 60.69% # Class of executed instruction 358system.cpu.op_class::SimdFloatMultAcc 0 0.00% 60.69% # Class of executed instruction 359system.cpu.op_class::SimdFloatSqrt 0 0.00% 60.69% # Class of executed instruction 360system.cpu.op_class::MemRead 51297 22.67% 83.36% # Class of executed instruction 361system.cpu.op_class::MemWrite 37094 16.39% 99.76% # Class of executed instruction 362system.cpu.op_class::FloatMemRead 414 0.18% 99.94% # Class of executed instruction 363system.cpu.op_class::FloatMemWrite 136 0.06% 100.00% # Class of executed instruction 364system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction 365system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction 366system.cpu.op_class::total 226275 # Class of executed instruction 367system.ruby.clk_domain.clock 1 # Clock period in ticks 368system.ruby.pwrStateResidencyTicks::UNDEFINED 4665394 # Cumulative time (in ticks) in various power states 369system.ruby.delayHist::bucket_size 1 # delay histogram for all message 370system.ruby.delayHist::max_bucket 9 # delay histogram for all message 371system.ruby.delayHist::samples 144490 # delay histogram for all message 372system.ruby.delayHist | 144490 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for all message 373system.ruby.delayHist::total 144490 # delay histogram for all message 374system.ruby.outstanding_req_hist_seqr::bucket_size 1 375system.ruby.outstanding_req_hist_seqr::max_bucket 9 376system.ruby.outstanding_req_hist_seqr::samples 315216 377system.ruby.outstanding_req_hist_seqr::mean 1 378system.ruby.outstanding_req_hist_seqr::gmean 1 379system.ruby.outstanding_req_hist_seqr | 0 0.00% 0.00% | 315216 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 380system.ruby.outstanding_req_hist_seqr::total 315216 381system.ruby.latency_hist_seqr::bucket_size 64 382system.ruby.latency_hist_seqr::max_bucket 639 383system.ruby.latency_hist_seqr::samples 315215 384system.ruby.latency_hist_seqr::mean 13.800673 385system.ruby.latency_hist_seqr::gmean 2.449814 386system.ruby.latency_hist_seqr::stdev 29.448647 387system.ruby.latency_hist_seqr | 279385 88.63% 88.63% | 33252 10.55% 99.18% | 1716 0.54% 99.73% | 307 0.10% 99.82% | 278 0.09% 99.91% | 236 0.07% 99.99% | 20 0.01% 99.99% | 8 0.00% 100.00% | 0 0.00% 100.00% | 13 0.00% 100.00% 388system.ruby.latency_hist_seqr::total 315215 389system.ruby.hit_latency_hist_seqr::bucket_size 1 390system.ruby.hit_latency_hist_seqr::max_bucket 9 391system.ruby.hit_latency_hist_seqr::samples 242968 392system.ruby.hit_latency_hist_seqr::mean 1 393system.ruby.hit_latency_hist_seqr::gmean 1 394system.ruby.hit_latency_hist_seqr | 0 0.00% 0.00% | 242968 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 395system.ruby.hit_latency_hist_seqr::total 242968 396system.ruby.miss_latency_hist_seqr::bucket_size 64 397system.ruby.miss_latency_hist_seqr::max_bucket 639 398system.ruby.miss_latency_hist_seqr::samples 72247 399system.ruby.miss_latency_hist_seqr::mean 56.849572 400system.ruby.miss_latency_hist_seqr::gmean 49.864909 401system.ruby.miss_latency_hist_seqr::stdev 37.140999 402system.ruby.miss_latency_hist_seqr | 36417 50.41% 50.41% | 33252 46.03% 96.43% | 1716 2.38% 98.81% | 307 0.42% 99.23% | 278 0.38% 99.62% | 236 0.33% 99.94% | 20 0.03% 99.97% | 8 0.01% 99.98% | 0 0.00% 99.98% | 13 0.02% 100.00% 403system.ruby.miss_latency_hist_seqr::total 72247 404system.ruby.Directory.incomplete_times_seqr 72246 405system.ruby.dir_cntrl0.pwrStateResidencyTicks::UNDEFINED 4665394 # Cumulative time (in ticks) in various power states 406system.ruby.l1_cntrl0.cacheMemory.demand_hits 242968 # Number of cache demand hits 407system.ruby.l1_cntrl0.cacheMemory.demand_misses 72247 # Number of cache demand misses 408system.ruby.l1_cntrl0.cacheMemory.demand_accesses 315215 # Number of cache demand accesses 409system.ruby.l1_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED 4665394 # Cumulative time (in ticks) in various power states 410system.ruby.l1_cntrl0.pwrStateResidencyTicks::UNDEFINED 4665394 # Cumulative time (in ticks) in various power states 411system.ruby.memctrl_clk_domain.clock 3 # Clock period in ticks 412system.ruby.network.routers0.pwrStateResidencyTicks::UNDEFINED 4665394 # Cumulative time (in ticks) in various power states 413system.ruby.network.routers0.percent_links_utilized 7.742647 414system.ruby.network.routers0.msg_count.Control::2 72247 415system.ruby.network.routers0.msg_count.Data::2 72243 416system.ruby.network.routers0.msg_count.Response_Data::4 72247 417system.ruby.network.routers0.msg_count.Writeback_Control::3 72243 418system.ruby.network.routers0.msg_bytes.Control::2 577976 419system.ruby.network.routers0.msg_bytes.Data::2 5201496 420system.ruby.network.routers0.msg_bytes.Response_Data::4 5201784 421system.ruby.network.routers0.msg_bytes.Writeback_Control::3 577944 422system.ruby.network.routers1.pwrStateResidencyTicks::UNDEFINED 4665394 # Cumulative time (in ticks) in various power states 423system.ruby.network.routers1.percent_links_utilized 7.742647 424system.ruby.network.routers1.msg_count.Control::2 72247 425system.ruby.network.routers1.msg_count.Data::2 72243 426system.ruby.network.routers1.msg_count.Response_Data::4 72247 427system.ruby.network.routers1.msg_count.Writeback_Control::3 72243 428system.ruby.network.routers1.msg_bytes.Control::2 577976 429system.ruby.network.routers1.msg_bytes.Data::2 5201496 430system.ruby.network.routers1.msg_bytes.Response_Data::4 5201784 431system.ruby.network.routers1.msg_bytes.Writeback_Control::3 577944 432system.ruby.network.routers2.pwrStateResidencyTicks::UNDEFINED 4665394 # Cumulative time (in ticks) in various power states 433system.ruby.network.routers2.percent_links_utilized 7.742647 434system.ruby.network.routers2.msg_count.Control::2 72247 435system.ruby.network.routers2.msg_count.Data::2 72243 436system.ruby.network.routers2.msg_count.Response_Data::4 72247 437system.ruby.network.routers2.msg_count.Writeback_Control::3 72243 438system.ruby.network.routers2.msg_bytes.Control::2 577976 439system.ruby.network.routers2.msg_bytes.Data::2 5201496 440system.ruby.network.routers2.msg_bytes.Response_Data::4 5201784 441system.ruby.network.routers2.msg_bytes.Writeback_Control::3 577944 442system.ruby.network.pwrStateResidencyTicks::UNDEFINED 4665394 # Cumulative time (in ticks) in various power states 443system.ruby.network.msg_count.Control 216741 444system.ruby.network.msg_count.Data 216729 445system.ruby.network.msg_count.Response_Data 216741 446system.ruby.network.msg_count.Writeback_Control 216729 447system.ruby.network.msg_byte.Control 1733928 448system.ruby.network.msg_byte.Data 15604488 449system.ruby.network.msg_byte.Response_Data 15605352 450system.ruby.network.msg_byte.Writeback_Control 1733832 451system.sys_port_proxy.pwrStateResidencyTicks::UNDEFINED 4665394 # Cumulative time (in ticks) in various power states 452system.ruby.network.routers0.throttle0.link_utilization 7.742819 453system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 72247 454system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 72243 455system.ruby.network.routers0.throttle0.msg_bytes.Response_Data::4 5201784 456system.ruby.network.routers0.throttle0.msg_bytes.Writeback_Control::3 577944 457system.ruby.network.routers0.throttle1.link_utilization 7.742476 458system.ruby.network.routers0.throttle1.msg_count.Control::2 72247 459system.ruby.network.routers0.throttle1.msg_count.Data::2 72243 460system.ruby.network.routers0.throttle1.msg_bytes.Control::2 577976 461system.ruby.network.routers0.throttle1.msg_bytes.Data::2 5201496 462system.ruby.network.routers1.throttle0.link_utilization 7.742476 463system.ruby.network.routers1.throttle0.msg_count.Control::2 72247 464system.ruby.network.routers1.throttle0.msg_count.Data::2 72243 465system.ruby.network.routers1.throttle0.msg_bytes.Control::2 577976 466system.ruby.network.routers1.throttle0.msg_bytes.Data::2 5201496 467system.ruby.network.routers1.throttle1.link_utilization 7.742819 468system.ruby.network.routers1.throttle1.msg_count.Response_Data::4 72247 469system.ruby.network.routers1.throttle1.msg_count.Writeback_Control::3 72243 470system.ruby.network.routers1.throttle1.msg_bytes.Response_Data::4 5201784 471system.ruby.network.routers1.throttle1.msg_bytes.Writeback_Control::3 577944 472system.ruby.network.routers2.throttle0.link_utilization 7.742819 473system.ruby.network.routers2.throttle0.msg_count.Response_Data::4 72247 474system.ruby.network.routers2.throttle0.msg_count.Writeback_Control::3 72243 475system.ruby.network.routers2.throttle0.msg_bytes.Response_Data::4 5201784 476system.ruby.network.routers2.throttle0.msg_bytes.Writeback_Control::3 577944 477system.ruby.network.routers2.throttle1.link_utilization 7.742476 478system.ruby.network.routers2.throttle1.msg_count.Control::2 72247 479system.ruby.network.routers2.throttle1.msg_count.Data::2 72243 480system.ruby.network.routers2.throttle1.msg_bytes.Control::2 577976 481system.ruby.network.routers2.throttle1.msg_bytes.Data::2 5201496 482system.ruby.delayVCHist.vnet_1::bucket_size 1 # delay histogram for vnet_1 483system.ruby.delayVCHist.vnet_1::max_bucket 9 # delay histogram for vnet_1 484system.ruby.delayVCHist.vnet_1::samples 72247 # delay histogram for vnet_1 485system.ruby.delayVCHist.vnet_1 | 72247 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_1 486system.ruby.delayVCHist.vnet_1::total 72247 # delay histogram for vnet_1 487system.ruby.delayVCHist.vnet_2::bucket_size 1 # delay histogram for vnet_2 488system.ruby.delayVCHist.vnet_2::max_bucket 9 # delay histogram for vnet_2 489system.ruby.delayVCHist.vnet_2::samples 72243 # delay histogram for vnet_2 490system.ruby.delayVCHist.vnet_2 | 72243 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_2 491system.ruby.delayVCHist.vnet_2::total 72243 # delay histogram for vnet_2 492system.ruby.LD.latency_hist_seqr::bucket_size 64 493system.ruby.LD.latency_hist_seqr::max_bucket 639 494system.ruby.LD.latency_hist_seqr::samples 51711 495system.ruby.LD.latency_hist_seqr::mean 28.269208 496system.ruby.LD.latency_hist_seqr::gmean 7.619512 497system.ruby.LD.latency_hist_seqr::stdev 36.060908 498system.ruby.LD.latency_hist_seqr | 41177 79.63% 79.63% | 9735 18.83% 98.45% | 541 1.05% 99.50% | 99 0.19% 99.69% | 79 0.15% 99.85% | 70 0.14% 99.98% | 7 0.01% 99.99% | 2 0.00% 100.00% | 0 0.00% 100.00% | 1 0.00% 100.00% 499system.ruby.LD.latency_hist_seqr::total 51711 500system.ruby.LD.hit_latency_hist_seqr::bucket_size 1 501system.ruby.LD.hit_latency_hist_seqr::max_bucket 9 502system.ruby.LD.hit_latency_hist_seqr::samples 24257 503system.ruby.LD.hit_latency_hist_seqr::mean 1 504system.ruby.LD.hit_latency_hist_seqr::gmean 1 505system.ruby.LD.hit_latency_hist_seqr | 0 0.00% 0.00% | 24257 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 506system.ruby.LD.hit_latency_hist_seqr::total 24257 507system.ruby.LD.miss_latency_hist_seqr::bucket_size 64 508system.ruby.LD.miss_latency_hist_seqr::max_bucket 639 509system.ruby.LD.miss_latency_hist_seqr::samples 27454 510system.ruby.LD.miss_latency_hist_seqr::mean 52.362934 511system.ruby.LD.miss_latency_hist_seqr::gmean 45.830488 512system.ruby.LD.miss_latency_hist_seqr::stdev 34.811219 513system.ruby.LD.miss_latency_hist_seqr | 16920 61.63% 61.63% | 9735 35.46% 97.09% | 541 1.97% 99.06% | 99 0.36% 99.42% | 79 0.29% 99.71% | 70 0.25% 99.96% | 7 0.03% 99.99% | 2 0.01% 100.00% | 0 0.00% 100.00% | 1 0.00% 100.00% 514system.ruby.LD.miss_latency_hist_seqr::total 27454 515system.ruby.ST.latency_hist_seqr::bucket_size 64 516system.ruby.ST.latency_hist_seqr::max_bucket 639 517system.ruby.ST.latency_hist_seqr::samples 37229 518system.ruby.ST.latency_hist_seqr::mean 15.219587 519system.ruby.ST.latency_hist_seqr::gmean 3.175846 520system.ruby.ST.latency_hist_seqr::stdev 28.311515 521system.ruby.ST.latency_hist_seqr | 33814 90.83% 90.83% | 3147 8.45% 99.28% | 181 0.49% 99.77% | 30 0.08% 99.85% | 22 0.06% 99.91% | 24 0.06% 99.97% | 1 0.00% 99.97% | 1 0.00% 99.98% | 0 0.00% 99.98% | 9 0.02% 100.00% 522system.ruby.ST.latency_hist_seqr::total 37229 523system.ruby.ST.hit_latency_hist_seqr::bucket_size 1 524system.ruby.ST.hit_latency_hist_seqr::max_bucket 9 525system.ruby.ST.hit_latency_hist_seqr::samples 25699 526system.ruby.ST.hit_latency_hist_seqr::mean 1 527system.ruby.ST.hit_latency_hist_seqr::gmean 1 528system.ruby.ST.hit_latency_hist_seqr | 0 0.00% 0.00% | 25699 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 529system.ruby.ST.hit_latency_hist_seqr::total 25699 530system.ruby.ST.miss_latency_hist_seqr::bucket_size 64 531system.ruby.ST.miss_latency_hist_seqr::max_bucket 639 532system.ruby.ST.miss_latency_hist_seqr::samples 11530 533system.ruby.ST.miss_latency_hist_seqr::mean 46.913356 534system.ruby.ST.miss_latency_hist_seqr::gmean 41.729617 535system.ruby.ST.miss_latency_hist_seqr::stdev 33.659248 536system.ruby.ST.miss_latency_hist_seqr | 8115 70.38% 70.38% | 3147 27.29% 97.68% | 181 1.57% 99.25% | 30 0.26% 99.51% | 22 0.19% 99.70% | 24 0.21% 99.90% | 1 0.01% 99.91% | 1 0.01% 99.92% | 0 0.00% 99.92% | 9 0.08% 100.00% 537system.ruby.ST.miss_latency_hist_seqr::total 11530 538system.ruby.IFETCH.latency_hist_seqr::bucket_size 64 539system.ruby.IFETCH.latency_hist_seqr::max_bucket 639 540system.ruby.IFETCH.latency_hist_seqr::samples 226275 541system.ruby.IFETCH.latency_hist_seqr::mean 10.260700 542system.ruby.IFETCH.latency_hist_seqr::gmean 1.811203 543system.ruby.IFETCH.latency_hist_seqr::stdev 26.801914 544system.ruby.IFETCH.latency_hist_seqr | 204394 90.33% 90.33% | 20370 9.00% 99.33% | 994 0.44% 99.77% | 178 0.08% 99.85% | 177 0.08% 99.93% | 142 0.06% 99.99% | 12 0.01% 100.00% | 5 0.00% 100.00% | 0 0.00% 100.00% | 3 0.00% 100.00% 545system.ruby.IFETCH.latency_hist_seqr::total 226275 546system.ruby.IFETCH.hit_latency_hist_seqr::bucket_size 1 547system.ruby.IFETCH.hit_latency_hist_seqr::max_bucket 9 548system.ruby.IFETCH.hit_latency_hist_seqr::samples 193012 549system.ruby.IFETCH.hit_latency_hist_seqr::mean 1 550system.ruby.IFETCH.hit_latency_hist_seqr::gmean 1 551system.ruby.IFETCH.hit_latency_hist_seqr | 0 0.00% 0.00% | 193012 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 552system.ruby.IFETCH.hit_latency_hist_seqr::total 193012 553system.ruby.IFETCH.miss_latency_hist_seqr::bucket_size 64 554system.ruby.IFETCH.miss_latency_hist_seqr::max_bucket 639 555system.ruby.IFETCH.miss_latency_hist_seqr::samples 33263 556system.ruby.IFETCH.miss_latency_hist_seqr::mean 63.996873 557system.ruby.IFETCH.miss_latency_hist_seqr::gmean 56.865504 558system.ruby.IFETCH.miss_latency_hist_seqr::stdev 38.748066 559system.ruby.IFETCH.miss_latency_hist_seqr | 11382 34.22% 34.22% | 20370 61.24% 95.46% | 994 2.99% 98.45% | 178 0.54% 98.98% | 177 0.53% 99.51% | 142 0.43% 99.94% | 12 0.04% 99.98% | 5 0.02% 99.99% | 0 0.00% 99.99% | 3 0.01% 100.00% 560system.ruby.IFETCH.miss_latency_hist_seqr::total 33263 561system.ruby.Directory.miss_mach_latency_hist_seqr::bucket_size 64 562system.ruby.Directory.miss_mach_latency_hist_seqr::max_bucket 639 563system.ruby.Directory.miss_mach_latency_hist_seqr::samples 72247 564system.ruby.Directory.miss_mach_latency_hist_seqr::mean 56.849572 565system.ruby.Directory.miss_mach_latency_hist_seqr::gmean 49.864909 566system.ruby.Directory.miss_mach_latency_hist_seqr::stdev 37.140999 567system.ruby.Directory.miss_mach_latency_hist_seqr | 36417 50.41% 50.41% | 33252 46.03% 96.43% | 1716 2.38% 98.81% | 307 0.42% 99.23% | 278 0.38% 99.62% | 236 0.33% 99.94% | 20 0.03% 99.97% | 8 0.01% 99.98% | 0 0.00% 99.98% | 13 0.02% 100.00% 568system.ruby.Directory.miss_mach_latency_hist_seqr::total 72247 569system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::bucket_size 1 570system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::max_bucket 9 571system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::samples 1 572system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::stdev nan 573system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 574system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::total 1 575system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::bucket_size 1 576system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::max_bucket 9 577system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::samples 1 578system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::stdev nan 579system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 580system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::total 1 581system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::bucket_size 1 582system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::max_bucket 9 583system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::samples 1 584system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::stdev nan 585system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 586system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::total 1 587system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::bucket_size 8 588system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::max_bucket 79 589system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::samples 1 590system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::mean 75 591system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::gmean 75.000000 592system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::stdev nan 593system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% 594system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::total 1 595system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::bucket_size 64 596system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::max_bucket 639 597system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::samples 27454 598system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::mean 52.362934 599system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::gmean 45.830488 600system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::stdev 34.811219 601system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr | 16920 61.63% 61.63% | 9735 35.46% 97.09% | 541 1.97% 99.06% | 99 0.36% 99.42% | 79 0.29% 99.71% | 70 0.25% 99.96% | 7 0.03% 99.99% | 2 0.01% 100.00% | 0 0.00% 100.00% | 1 0.00% 100.00% 602system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::total 27454 603system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::bucket_size 64 604system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::max_bucket 639 605system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::samples 11530 606system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::mean 46.913356 607system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::gmean 41.729617 608system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::stdev 33.659248 609system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr | 8115 70.38% 70.38% | 3147 27.29% 97.68% | 181 1.57% 99.25% | 30 0.26% 99.51% | 22 0.19% 99.70% | 24 0.21% 99.90% | 1 0.01% 99.91% | 1 0.01% 99.92% | 0 0.00% 99.92% | 9 0.08% 100.00% 610system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::total 11530 611system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::bucket_size 64 612system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::max_bucket 639 613system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::samples 33263 614system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::mean 63.996873 615system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::gmean 56.865504 616system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::stdev 38.748066 617system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr | 11382 34.22% 34.22% | 20370 61.24% 95.46% | 994 2.99% 98.45% | 178 0.54% 98.98% | 177 0.53% 99.51% | 142 0.43% 99.94% | 12 0.04% 99.98% | 5 0.02% 99.99% | 0 0.00% 99.99% | 3 0.01% 100.00% 618system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::total 33263 619system.ruby.Directory_Controller.GETX 72247 0.00% 0.00% 620system.ruby.Directory_Controller.PUTX 72243 0.00% 0.00% 621system.ruby.Directory_Controller.Memory_Data 72247 0.00% 0.00% 622system.ruby.Directory_Controller.Memory_Ack 72243 0.00% 0.00% 623system.ruby.Directory_Controller.I.GETX 72247 0.00% 0.00% 624system.ruby.Directory_Controller.M.PUTX 72243 0.00% 0.00% 625system.ruby.Directory_Controller.IM.Memory_Data 72247 0.00% 0.00% 626system.ruby.Directory_Controller.MI.Memory_Ack 72243 0.00% 0.00% 627system.ruby.L1Cache_Controller.Load 51711 0.00% 0.00% 628system.ruby.L1Cache_Controller.Ifetch 226275 0.00% 0.00% 629system.ruby.L1Cache_Controller.Store 37229 0.00% 0.00% 630system.ruby.L1Cache_Controller.Data 72247 0.00% 0.00% 631system.ruby.L1Cache_Controller.Replacement 72243 0.00% 0.00% 632system.ruby.L1Cache_Controller.Writeback_Ack 72243 0.00% 0.00% 633system.ruby.L1Cache_Controller.I.Load 27454 0.00% 0.00% 634system.ruby.L1Cache_Controller.I.Ifetch 33263 0.00% 0.00% 635system.ruby.L1Cache_Controller.I.Store 11530 0.00% 0.00% 636system.ruby.L1Cache_Controller.M.Load 24257 0.00% 0.00% 637system.ruby.L1Cache_Controller.M.Ifetch 193012 0.00% 0.00% 638system.ruby.L1Cache_Controller.M.Store 25699 0.00% 0.00% 639system.ruby.L1Cache_Controller.M.Replacement 72243 0.00% 0.00% 640system.ruby.L1Cache_Controller.MI.Writeback_Ack 72243 0.00% 0.00% 641system.ruby.L1Cache_Controller.IS.Data 60717 0.00% 0.00% 642system.ruby.L1Cache_Controller.IM.Data 11530 0.00% 0.00% 643 644---------- End Simulation Statistics ---------- 645