simout revision 11731
1Redirecting stdout to build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64a/simple-timing/simout 2Redirecting stderr to build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64a/simple-timing/simerr 3gem5 Simulator System. http://gem5.org 4gem5 is copyrighted software; use the --copyright option for details. 5 6gem5 compiled Nov 30 2016 14:33:35 7gem5 started Nov 30 2016 16:18:30 8gem5 executing on zizzer, pid 34063 9command line: /z/powerjg/gem5-upstream/build/RISCV/gem5.opt -d build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64a/simple-timing -re /z/powerjg/gem5-upstream/tests/testing/../run.py quick/se/02.insttest/riscv/linux-rv64a/simple-timing 10 11Global frequency set at 1000000000000 ticks per second 12info: Entering event queue @ 0. Starting simulation... 13info: Increasing stack size by one page. 14lr.w/sc.w: [1;31mFAIL[0m (expected (-1, 0); found (-1, 1)) 15Exiting @ tick 138549500 because target called exit() 16