simout revision 11731:c473ca7cc650
1Redirecting stdout to build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64a/simple-atomic/simout 2Redirecting stderr to build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64a/simple-atomic/simerr 3gem5 Simulator System. http://gem5.org 4gem5 is copyrighted software; use the --copyright option for details. 5 6gem5 compiled Nov 30 2016 14:33:35 7gem5 started Nov 30 2016 16:18:29 8gem5 executing on zizzer, pid 34062 9command line: /z/powerjg/gem5-upstream/build/RISCV/gem5.opt -d build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64a/simple-atomic -re /z/powerjg/gem5-upstream/tests/testing/../run.py quick/se/02.insttest/riscv/linux-rv64a/simple-atomic 10 11Global frequency set at 1000000000000 ticks per second 12info: Entering event queue @ 0. Starting simulation... 13info: Increasing stack size by one page. 14lr.w/sc.w: PASS 15sc.w, no preceding lr.d: PASS 16amoswap.w: PASS 17amoswap.w, sign extend: PASS 18amoswap.w, truncate: PASS 19amoadd.w: PASS 20amoadd.w, truncate/overflow: PASS 21amoadd.w, sign extend: PASS 22amoxor.w, truncate: PASS 23amoxor.w, sign extend: PASS 24amoand.w, truncate: PASS 25amoand.w, sign extend: PASS 26amoor.w, truncate: PASS 27amoor.w, sign extend: PASS 28amomin.w, truncate: PASS 29amomin.w, sign extend: PASS 30amomax.w, truncate: PASS 31amomax.w, sign extend: PASS 32amominu.w, truncate: PASS 33amominu.w, sign extend: PASS 34amomaxu.w, truncate: PASS 35amomaxu.w, sign extend: PASS 36lr.d/sc.d: PASS 37sc.d, no preceding lr.d: PASS 38amoswap.d: PASS 39amoadd.d: PASS 40amoadd.d, overflow: PASS 41amoxor.d (1): PASS 42amoxor.d (0): PASS 43amoand.d: PASS 44amoor.d: PASS 45amomin.d: PASS 46amomax.d: PASS 47amominu.d: PASS 48amomaxu.d: PASS 49Exiting @ tick 57010500 because target called exit() 50