111731Sjason@lowepower.comRedirecting stdout to build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64a/minor-timing/simout
211731Sjason@lowepower.comRedirecting stderr to build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64a/minor-timing/simerr
311731Sjason@lowepower.comgem5 Simulator System.  http://gem5.org
411731Sjason@lowepower.comgem5 is copyrighted software; use the --copyright option for details.
511731Sjason@lowepower.com
612137Sar4jc@virginia.edugem5 compiled Jul 13 2017 17:09:45
712137Sar4jc@virginia.edugem5 started Jul 13 2017 17:12:00
812137Sar4jc@virginia.edugem5 executing on boldrock, pid 2001
912137Sar4jc@virginia.educommand line: /home/ar4jc/gem5/build/RISCV/gem5.opt -d build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64a/minor-timing --stats-file 'text://stats.txt?desc=False' -re /home/ar4jc/gem5/tests/testing/../run.py quick/se/02.insttest/riscv/linux-rv64a/minor-timing
1011731Sjason@lowepower.com
1111731Sjason@lowepower.comGlobal frequency set at 1000000000000 ticks per second
1211731Sjason@lowepower.comlr.w/sc.w: PASS
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1711731Sjason@lowepower.comamoadd.w: PASS
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2811731Sjason@lowepower.comamomax.w, truncate: PASS
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3211731Sjason@lowepower.comamomaxu.w, truncate: PASS
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3411731Sjason@lowepower.comlr.d/sc.d: PASS
3511731Sjason@lowepower.comsc.d, no preceding lr.d: PASS
3611731Sjason@lowepower.comamoswap.d: PASS
3711731Sjason@lowepower.comamoadd.d: PASS
3811731Sjason@lowepower.comamoadd.d, overflow: PASS
3911731Sjason@lowepower.comamoxor.d (1): PASS
4011731Sjason@lowepower.comamoxor.d (0): PASS
4111731Sjason@lowepower.comamoand.d: PASS
4211731Sjason@lowepower.comamoor.d: PASS
4311731Sjason@lowepower.comamomin.d: PASS
4411731Sjason@lowepower.comamomax.d: PASS
4511731Sjason@lowepower.comamominu.d: PASS
4611731Sjason@lowepower.comamomaxu.d: PASS
4712137Sar4jc@virginia.eduExiting @ tick 179565500 because exiting with last active thread context
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