stats.txt revision 9748
1
2---------- Begin Simulation Statistics ----------
3sim_seconds                                  0.000122                       # Number of seconds simulated
4sim_ticks                                      121759                       # Number of ticks simulated
5final_tick                                     121759                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
6sim_freq                                   1000000000                       # Frequency of simulated ticks
7host_inst_rate                                  37945                       # Simulator instruction rate (inst/s)
8host_op_rate                                    68729                       # Simulator op (including micro ops) rate (op/s)
9host_tick_rate                                 858310                       # Simulator tick rate (ticks/s)
10host_mem_usage                                 162016                       # Number of bytes of host memory used
11host_seconds                                     0.14                       # Real time elapsed on the host
12sim_insts                                        5381                       # Number of instructions simulated
13sim_ops                                          9748                       # Number of ops (including micro ops) simulated
14system.ruby.l1_cntrl0.cacheMemory.demand_hits         7475                       # Number of cache demand hits
15system.ruby.l1_cntrl0.cacheMemory.demand_misses         1377                       # Number of cache demand misses
16system.ruby.l1_cntrl0.cacheMemory.demand_accesses         8852                       # Number of cache demand accesses
17system.ruby.dir_cntrl0.memBuffer.memReq          2750                       # Total number of memory requests
18system.ruby.dir_cntrl0.memBuffer.memRead         1377                       # Number of memory reads
19system.ruby.dir_cntrl0.memBuffer.memWrite         1373                       # Number of memory writes
20system.ruby.dir_cntrl0.memBuffer.memRefresh          846                       # Number of memory refreshes
21system.ruby.dir_cntrl0.memBuffer.memWaitCycles         1965                       # Delay stalled at the head of the bank queue
22system.ruby.dir_cntrl0.memBuffer.memBankQ            3                       # Delay behind the head of the bank queue
23system.ruby.dir_cntrl0.memBuffer.totalStalls         1968                       # Total number of stall cycles
24system.ruby.dir_cntrl0.memBuffer.stallsPerReq     0.715636                       # Expected number of stall cycles per request
25system.ruby.dir_cntrl0.memBuffer.memBankBusy          823                       # memory stalls due to busy bank
26system.ruby.dir_cntrl0.memBuffer.memBusBusy         1044                       # memory stalls due to busy bus
27system.ruby.dir_cntrl0.memBuffer.memReadWriteBusy           33                       # memory stalls due to read write turnaround
28system.ruby.dir_cntrl0.memBuffer.memArbWait           65                       # memory stalls due to arbitration
29system.ruby.dir_cntrl0.memBuffer.memBankCount |         160      5.82%      5.82% |         144      5.24%     11.05% |         210      7.64%     18.69% |         146      5.31%     24.00% |         196      7.13%     31.13% |          96      3.49%     34.62% |          66      2.40%     37.02% |          38      1.38%     38.40% |          22      0.80%     39.20% |          20      0.73%     39.93% |         184      6.69%     46.62% |         297     10.80%     57.42% |          71      2.58%     60.00% |         124      4.51%     64.51% |          60      2.18%     66.69% |          18      0.65%     67.35% |          84      3.05%     70.40% |           6      0.22%     70.62% |           8      0.29%     70.91% |          14      0.51%     71.42% |          92      3.35%     74.76% |          56      2.04%     76.80% |          14      0.51%     77.31% |          60      2.18%     79.49% |          34      1.24%     80.73% |          58      2.11%     82.84% |          84      3.05%     85.89% |          66      2.40%     88.29% |          42      1.53%     89.82% |         122      4.44%     94.25% |         104      3.78%     98.04% |          54      1.96%    100.00% # Number of accesses per bank
30system.ruby.dir_cntrl0.memBuffer.memBankCount::total         2750                       # Number of accesses per bank
31
32system.cpu.workload.num_syscalls                   11                       # Number of system calls
33system.cpu.numCycles                           121759                       # number of cpu cycles simulated
34system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
35system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
36system.cpu.committedInsts                        5381                       # Number of instructions committed
37system.cpu.committedOps                          9748                       # Number of ops (including micro ops) committed
38system.cpu.num_int_alu_accesses                  9655                       # Number of integer alu accesses
39system.cpu.num_fp_alu_accesses                      0                       # Number of float alu accesses
40system.cpu.num_func_calls                         209                       # number of times a function call or return occured
41system.cpu.num_conditional_control_insts          899                       # number of instructions that are conditional controls
42system.cpu.num_int_insts                         9655                       # number of integer instructions
43system.cpu.num_fp_insts                             0                       # number of float instructions
44system.cpu.num_int_register_reads               24822                       # number of times the integer registers were read
45system.cpu.num_int_register_writes              11063                       # number of times the integer registers were written
46system.cpu.num_fp_register_reads                    0                       # number of times the floating registers were read
47system.cpu.num_fp_register_writes                   0                       # number of times the floating registers were written
48system.cpu.num_mem_refs                          1988                       # number of memory refs
49system.cpu.num_load_insts                        1053                       # Number of load instructions
50system.cpu.num_store_insts                        935                       # Number of store instructions
51system.cpu.num_idle_cycles                          0                       # Number of idle cycles
52system.cpu.num_busy_cycles                     121759                       # Number of busy cycles
53system.cpu.not_idle_fraction                        1                       # Percentage of non-idle cycles
54system.cpu.idle_fraction                            0                       # Percentage of idle cycles
55system.ruby.l1_cntrl0.Load                       1045      0.00%      0.00%
56system.ruby.l1_cntrl0.Ifetch                     6864      0.00%      0.00%
57system.ruby.l1_cntrl0.Store                       943      0.00%      0.00%
58system.ruby.l1_cntrl0.Data                       1377      0.00%      0.00%
59system.ruby.l1_cntrl0.Replacement                1373      0.00%      0.00%
60system.ruby.l1_cntrl0.Writeback_Ack              1373      0.00%      0.00%
61system.ruby.l1_cntrl0.I.Load                      499      0.00%      0.00%
62system.ruby.l1_cntrl0.I.Ifetch                    623      0.00%      0.00%
63system.ruby.l1_cntrl0.I.Store                     255      0.00%      0.00%
64system.ruby.l1_cntrl0.M.Load                      546      0.00%      0.00%
65system.ruby.l1_cntrl0.M.Ifetch                   6241      0.00%      0.00%
66system.ruby.l1_cntrl0.M.Store                     688      0.00%      0.00%
67system.ruby.l1_cntrl0.M.Replacement              1373      0.00%      0.00%
68system.ruby.l1_cntrl0.MI.Writeback_Ack           1373      0.00%      0.00%
69system.ruby.l1_cntrl0.IS.Data                    1122      0.00%      0.00%
70system.ruby.l1_cntrl0.IM.Data                     255      0.00%      0.00%
71system.ruby.dir_cntrl0.GETX                      1377      0.00%      0.00%
72system.ruby.dir_cntrl0.PUTX                      1373      0.00%      0.00%
73system.ruby.dir_cntrl0.Memory_Data               1377      0.00%      0.00%
74system.ruby.dir_cntrl0.Memory_Ack                1373      0.00%      0.00%
75system.ruby.dir_cntrl0.I.GETX                    1377      0.00%      0.00%
76system.ruby.dir_cntrl0.M.PUTX                    1373      0.00%      0.00%
77system.ruby.dir_cntrl0.IM.Memory_Data            1377      0.00%      0.00%
78system.ruby.dir_cntrl0.MI.Memory_Ack             1373      0.00%      0.00%
79
80---------- End Simulation Statistics   ----------
81