stats.txt revision 9583
16167SN/A
26167SN/A---------- Begin Simulation Statistics ----------
39204Sandreas.hansson@arm.comsim_seconds                                  0.000122                       # Number of seconds simulated
49204Sandreas.hansson@arm.comsim_ticks                                      121759                       # Number of ticks simulated
59204Sandreas.hansson@arm.comfinal_tick                                     121759                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
68673SN/Asim_freq                                   1000000000                       # Frequency of simulated ticks
79583Snilay@cs.wisc.eduhost_inst_rate                                  25458                       # Simulator instruction rate (inst/s)
89583Snilay@cs.wisc.eduhost_op_rate                                    46114                       # Simulator op (including micro ops) rate (op/s)
99583Snilay@cs.wisc.eduhost_tick_rate                                 575943                       # Simulator tick rate (ticks/s)
109583Snilay@cs.wisc.eduhost_mem_usage                                 167352                       # Number of bytes of host memory used
119583Snilay@cs.wisc.eduhost_seconds                                     0.21                       # Real time elapsed on the host
129150SAli.Saidi@ARM.comsim_insts                                        5381                       # Number of instructions simulated
139583Snilay@cs.wisc.edusim_ops                                          9748                       # Number of ops (including micro ops) simulated
149469Snilay@cs.wisc.edusystem.ruby.l1_cntrl0.cacheMemory.num_data_array_reads            0                       # number of data array reads
159469Snilay@cs.wisc.edusystem.ruby.l1_cntrl0.cacheMemory.num_data_array_writes            0                       # number of data array writes
169469Snilay@cs.wisc.edusystem.ruby.l1_cntrl0.cacheMemory.num_tag_array_reads            0                       # number of tag array reads
179469Snilay@cs.wisc.edusystem.ruby.l1_cntrl0.cacheMemory.num_tag_array_writes            0                       # number of tag array writes
189469Snilay@cs.wisc.edusystem.ruby.l1_cntrl0.cacheMemory.num_tag_array_stalls            0                       # number of stalls caused by tag array
199469Snilay@cs.wisc.edusystem.ruby.l1_cntrl0.cacheMemory.num_data_array_stalls            0                       # number of stalls caused by data array
208673SN/Asystem.cpu.workload.num_syscalls                   11                       # Number of system calls
219204Sandreas.hansson@arm.comsystem.cpu.numCycles                           121759                       # number of cpu cycles simulated
228673SN/Asystem.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
237935SN/Asystem.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
249150SAli.Saidi@ARM.comsystem.cpu.committedInsts                        5381                       # Number of instructions committed
259583Snilay@cs.wisc.edusystem.cpu.committedOps                          9748                       # Number of ops (including micro ops) committed
269583Snilay@cs.wisc.edusystem.cpu.num_int_alu_accesses                  9655                       # Number of integer alu accesses
278673SN/Asystem.cpu.num_fp_alu_accesses                      0                       # Number of float alu accesses
288673SN/Asystem.cpu.num_func_calls                           0                       # number of times a function call or return occured
299150SAli.Saidi@ARM.comsystem.cpu.num_conditional_control_insts          899                       # number of instructions that are conditional controls
309583Snilay@cs.wisc.edusystem.cpu.num_int_insts                         9655                       # number of integer instructions
317935SN/Asystem.cpu.num_fp_insts                             0                       # number of float instructions
329583Snilay@cs.wisc.edusystem.cpu.num_int_register_reads               24822                       # number of times the integer registers were read
339583Snilay@cs.wisc.edusystem.cpu.num_int_register_writes              11063                       # number of times the integer registers were written
347935SN/Asystem.cpu.num_fp_register_reads                    0                       # number of times the floating registers were read
357935SN/Asystem.cpu.num_fp_register_writes                   0                       # number of times the floating registers were written
369583Snilay@cs.wisc.edusystem.cpu.num_mem_refs                          1988                       # number of memory refs
379583Snilay@cs.wisc.edusystem.cpu.num_load_insts                        1053                       # Number of load instructions
389373Snilay@cs.wisc.edusystem.cpu.num_store_insts                        935                       # Number of store instructions
397935SN/Asystem.cpu.num_idle_cycles                          0                       # Number of idle cycles
409204Sandreas.hansson@arm.comsystem.cpu.num_busy_cycles                     121759                       # Number of busy cycles
418673SN/Asystem.cpu.not_idle_fraction                        1                       # Percentage of non-idle cycles
428673SN/Asystem.cpu.idle_fraction                            0                       # Percentage of idle cycles
436167SN/A
446167SN/A---------- End Simulation Statistics   ----------
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