stats.txt revision 9698
16167SN/A 26167SN/A---------- Begin Simulation Statistics ---------- 39204Sandreas.hansson@arm.comsim_seconds 0.000108 # Number of seconds simulated 49204Sandreas.hansson@arm.comsim_ticks 107952 # Number of ticks simulated 59204Sandreas.hansson@arm.comfinal_tick 107952 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 68343SN/Asim_freq 1000000000 # Frequency of simulated ticks 79698Snilay@cs.wisc.eduhost_inst_rate 36056 # Simulator instruction rate (inst/s) 89698Snilay@cs.wisc.eduhost_op_rate 36051 # Simulator op (including micro ops) rate (op/s) 99698Snilay@cs.wisc.eduhost_tick_rate 730482 # Simulator tick rate (ticks/s) 109698Snilay@cs.wisc.eduhost_mem_usage 160860 # Number of bytes of host memory used 119698Snilay@cs.wisc.eduhost_seconds 0.15 # Real time elapsed on the host 129150SAli.Saidi@ARM.comsim_insts 5327 # Number of instructions simulated 139150SAli.Saidi@ARM.comsim_ops 5327 # Number of ops (including micro ops) simulated 149698Snilay@cs.wisc.edusystem.ruby.l1_cntrl0.cacheMemory.demand_hits 5469 # Number of cache demand hits 159698Snilay@cs.wisc.edusystem.ruby.l1_cntrl0.cacheMemory.demand_misses 1289 # Number of cache demand misses 169698Snilay@cs.wisc.edusystem.ruby.l1_cntrl0.cacheMemory.demand_accesses 6758 # Number of cache demand accesses 178343SN/Asystem.cpu.workload.num_syscalls 11 # Number of system calls 189204Sandreas.hansson@arm.comsystem.cpu.numCycles 107952 # number of cpu cycles simulated 198343SN/Asystem.cpu.numWorkItemsStarted 0 # number of work items this cpu started 207935SN/Asystem.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 219150SAli.Saidi@ARM.comsystem.cpu.committedInsts 5327 # Number of instructions committed 229150SAli.Saidi@ARM.comsystem.cpu.committedOps 5327 # Number of ops (including micro ops) committed 239150SAli.Saidi@ARM.comsystem.cpu.num_int_alu_accesses 4505 # Number of integer alu accesses 247935SN/Asystem.cpu.num_fp_alu_accesses 0 # Number of float alu accesses 258343SN/Asystem.cpu.num_func_calls 146 # number of times a function call or return occured 269150SAli.Saidi@ARM.comsystem.cpu.num_conditional_control_insts 773 # number of instructions that are conditional controls 279150SAli.Saidi@ARM.comsystem.cpu.num_int_insts 4505 # number of integer instructions 287935SN/Asystem.cpu.num_fp_insts 0 # number of float instructions 299150SAli.Saidi@ARM.comsystem.cpu.num_int_register_reads 10598 # number of times the integer registers were read 309150SAli.Saidi@ARM.comsystem.cpu.num_int_register_writes 4845 # number of times the integer registers were written 317935SN/Asystem.cpu.num_fp_register_reads 0 # number of times the floating registers were read 327935SN/Asystem.cpu.num_fp_register_writes 0 # number of times the floating registers were written 339150SAli.Saidi@ARM.comsystem.cpu.num_mem_refs 1401 # number of memory refs 349150SAli.Saidi@ARM.comsystem.cpu.num_load_insts 723 # Number of load instructions 358343SN/Asystem.cpu.num_store_insts 678 # Number of store instructions 367935SN/Asystem.cpu.num_idle_cycles 0 # Number of idle cycles 379204Sandreas.hansson@arm.comsystem.cpu.num_busy_cycles 107952 # Number of busy cycles 388343SN/Asystem.cpu.not_idle_fraction 1 # Percentage of non-idle cycles 398343SN/Asystem.cpu.idle_fraction 0 # Percentage of idle cycles 406167SN/A 416167SN/A---------- End Simulation Statistics ---------- 42