stats.txt revision 11023
16167SN/A 26167SN/A---------- Begin Simulation Statistics ---------- 311023Sjthestness@gmail.comsim_seconds 0.000082 # Number of seconds simulated 411023Sjthestness@gmail.comsim_ticks 81703 # Number of ticks simulated 511023Sjthestness@gmail.comfinal_tick 81703 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 68343SN/Asim_freq 1000000000 # Frequency of simulated ticks 711023Sjthestness@gmail.comhost_inst_rate 27632 # Simulator instruction rate (inst/s) 811023Sjthestness@gmail.comhost_op_rate 27631 # Simulator op (including micro ops) rate (op/s) 911023Sjthestness@gmail.comhost_tick_rate 423765 # Simulator tick rate (ticks/s) 1011023Sjthestness@gmail.comhost_mem_usage 400152 # Number of bytes of host memory used 1111023Sjthestness@gmail.comhost_seconds 0.19 # Real time elapsed on the host 129150SAli.Saidi@ARM.comsim_insts 5327 # Number of instructions simulated 139150SAli.Saidi@ARM.comsim_ops 5327 # Number of ops (including micro ops) simulated 1410036SAli.Saidi@ARM.comsystem.voltage_domain.voltage 1 # Voltage in Volts 1510036SAli.Saidi@ARM.comsystem.clk_domain.clock 1 # Clock period in ticks 1610526Snilay@cs.wisc.edusystem.mem_ctrls.bytes_read::ruby.dir_cntrl0 82496 # Number of bytes read from this memory 1710526Snilay@cs.wisc.edusystem.mem_ctrls.bytes_read::total 82496 # Number of bytes read from this memory 1810526Snilay@cs.wisc.edusystem.mem_ctrls.bytes_written::ruby.dir_cntrl0 82240 # Number of bytes written to this memory 1910526Snilay@cs.wisc.edusystem.mem_ctrls.bytes_written::total 82240 # Number of bytes written to this memory 2010526Snilay@cs.wisc.edusystem.mem_ctrls.num_reads::ruby.dir_cntrl0 1289 # Number of read requests responded to by this memory 2110526Snilay@cs.wisc.edusystem.mem_ctrls.num_reads::total 1289 # Number of read requests responded to by this memory 2210526Snilay@cs.wisc.edusystem.mem_ctrls.num_writes::ruby.dir_cntrl0 1285 # Number of write requests responded to by this memory 2310526Snilay@cs.wisc.edusystem.mem_ctrls.num_writes::total 1285 # Number of write requests responded to by this memory 2411023Sjthestness@gmail.comsystem.mem_ctrls.bw_read::ruby.dir_cntrl0 1009705886 # Total read bandwidth from this memory (bytes/s) 2511023Sjthestness@gmail.comsystem.mem_ctrls.bw_read::total 1009705886 # Total read bandwidth from this memory (bytes/s) 2611023Sjthestness@gmail.comsystem.mem_ctrls.bw_write::ruby.dir_cntrl0 1006572586 # Write bandwidth from this memory (bytes/s) 2711023Sjthestness@gmail.comsystem.mem_ctrls.bw_write::total 1006572586 # Write bandwidth from this memory (bytes/s) 2811023Sjthestness@gmail.comsystem.mem_ctrls.bw_total::ruby.dir_cntrl0 2016278472 # Total bandwidth to/from this memory (bytes/s) 2911023Sjthestness@gmail.comsystem.mem_ctrls.bw_total::total 2016278472 # Total bandwidth to/from this memory (bytes/s) 3010526Snilay@cs.wisc.edusystem.mem_ctrls.readReqs 1289 # Number of read requests accepted 3110526Snilay@cs.wisc.edusystem.mem_ctrls.writeReqs 1285 # Number of write requests accepted 3210526Snilay@cs.wisc.edusystem.mem_ctrls.readBursts 1289 # Number of DRAM read bursts, including those serviced by the write queue 3310526Snilay@cs.wisc.edusystem.mem_ctrls.writeBursts 1285 # Number of DRAM write bursts, including those merged in the write queue 3411023Sjthestness@gmail.comsystem.mem_ctrls.bytesReadDRAM 43904 # Total number of bytes read from DRAM 3511023Sjthestness@gmail.comsystem.mem_ctrls.bytesReadWrQ 38592 # Total number of bytes read from write queue 3611023Sjthestness@gmail.comsystem.mem_ctrls.bytesWritten 43776 # Total number of bytes written to DRAM 3710526Snilay@cs.wisc.edusystem.mem_ctrls.bytesReadSys 82496 # Total read bytes from the system interface side 3810526Snilay@cs.wisc.edusystem.mem_ctrls.bytesWrittenSys 82240 # Total written bytes from the system interface side 3911023Sjthestness@gmail.comsystem.mem_ctrls.servicedByWrQ 603 # Number of DRAM read bursts serviced by the write queue 4011023Sjthestness@gmail.comsystem.mem_ctrls.mergedWrBursts 579 # Number of DRAM write bursts merged with an existing one 4110526Snilay@cs.wisc.edusystem.mem_ctrls.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write 4211023Sjthestness@gmail.comsystem.mem_ctrls.perBankRdBursts::0 28 # Per bank write bursts 4311023Sjthestness@gmail.comsystem.mem_ctrls.perBankRdBursts::1 18 # Per bank write bursts 4410526Snilay@cs.wisc.edusystem.mem_ctrls.perBankRdBursts::2 1 # Per bank write bursts 4510526Snilay@cs.wisc.edusystem.mem_ctrls.perBankRdBursts::3 8 # Per bank write bursts 4610526Snilay@cs.wisc.edusystem.mem_ctrls.perBankRdBursts::4 0 # Per bank write bursts 4711023Sjthestness@gmail.comsystem.mem_ctrls.perBankRdBursts::5 119 # Per bank write bursts 4811023Sjthestness@gmail.comsystem.mem_ctrls.perBankRdBursts::6 115 # Per bank write bursts 4911023Sjthestness@gmail.comsystem.mem_ctrls.perBankRdBursts::7 134 # Per bank write bursts 5011023Sjthestness@gmail.comsystem.mem_ctrls.perBankRdBursts::8 61 # Per bank write bursts 5110526Snilay@cs.wisc.edusystem.mem_ctrls.perBankRdBursts::9 34 # Per bank write bursts 5211023Sjthestness@gmail.comsystem.mem_ctrls.perBankRdBursts::10 12 # Per bank write bursts 5311023Sjthestness@gmail.comsystem.mem_ctrls.perBankRdBursts::11 59 # Per bank write bursts 5410892Sandreas.hansson@arm.comsystem.mem_ctrls.perBankRdBursts::12 21 # Per bank write bursts 5511023Sjthestness@gmail.comsystem.mem_ctrls.perBankRdBursts::13 59 # Per bank write bursts 5611023Sjthestness@gmail.comsystem.mem_ctrls.perBankRdBursts::14 9 # Per bank write bursts 5710526Snilay@cs.wisc.edusystem.mem_ctrls.perBankRdBursts::15 8 # Per bank write bursts 5811023Sjthestness@gmail.comsystem.mem_ctrls.perBankWrBursts::0 29 # Per bank write bursts 5911023Sjthestness@gmail.comsystem.mem_ctrls.perBankWrBursts::1 18 # Per bank write bursts 6011023Sjthestness@gmail.comsystem.mem_ctrls.perBankWrBursts::2 2 # Per bank write bursts 6110526Snilay@cs.wisc.edusystem.mem_ctrls.perBankWrBursts::3 8 # Per bank write bursts 6210526Snilay@cs.wisc.edusystem.mem_ctrls.perBankWrBursts::4 0 # Per bank write bursts 6311023Sjthestness@gmail.comsystem.mem_ctrls.perBankWrBursts::5 117 # Per bank write bursts 6411023Sjthestness@gmail.comsystem.mem_ctrls.perBankWrBursts::6 112 # Per bank write bursts 6511023Sjthestness@gmail.comsystem.mem_ctrls.perBankWrBursts::7 138 # Per bank write bursts 6611023Sjthestness@gmail.comsystem.mem_ctrls.perBankWrBursts::8 63 # Per bank write bursts 6710892Sandreas.hansson@arm.comsystem.mem_ctrls.perBankWrBursts::9 35 # Per bank write bursts 6811023Sjthestness@gmail.comsystem.mem_ctrls.perBankWrBursts::10 13 # Per bank write bursts 6911023Sjthestness@gmail.comsystem.mem_ctrls.perBankWrBursts::11 59 # Per bank write bursts 7011023Sjthestness@gmail.comsystem.mem_ctrls.perBankWrBursts::12 21 # Per bank write bursts 7111023Sjthestness@gmail.comsystem.mem_ctrls.perBankWrBursts::13 51 # Per bank write bursts 7211023Sjthestness@gmail.comsystem.mem_ctrls.perBankWrBursts::14 10 # Per bank write bursts 7311023Sjthestness@gmail.comsystem.mem_ctrls.perBankWrBursts::15 8 # Per bank write bursts 7410526Snilay@cs.wisc.edusystem.mem_ctrls.numRdRetry 0 # Number of times read queue was full causing retry 7510526Snilay@cs.wisc.edusystem.mem_ctrls.numWrRetry 0 # Number of times write queue was full causing retry 7611023Sjthestness@gmail.comsystem.mem_ctrls.totGap 81643 # Total gap between requests 7710526Snilay@cs.wisc.edusystem.mem_ctrls.readPktSize::0 0 # Read request sizes (log2) 7810526Snilay@cs.wisc.edusystem.mem_ctrls.readPktSize::1 0 # Read request sizes (log2) 7910526Snilay@cs.wisc.edusystem.mem_ctrls.readPktSize::2 0 # Read request sizes (log2) 8010526Snilay@cs.wisc.edusystem.mem_ctrls.readPktSize::3 0 # Read request sizes (log2) 8110526Snilay@cs.wisc.edusystem.mem_ctrls.readPktSize::4 0 # Read request sizes (log2) 8210526Snilay@cs.wisc.edusystem.mem_ctrls.readPktSize::5 0 # Read request sizes (log2) 8310526Snilay@cs.wisc.edusystem.mem_ctrls.readPktSize::6 1289 # Read request sizes (log2) 8410526Snilay@cs.wisc.edusystem.mem_ctrls.writePktSize::0 0 # Write request sizes (log2) 8510526Snilay@cs.wisc.edusystem.mem_ctrls.writePktSize::1 0 # Write request sizes (log2) 8610526Snilay@cs.wisc.edusystem.mem_ctrls.writePktSize::2 0 # Write request sizes (log2) 8710526Snilay@cs.wisc.edusystem.mem_ctrls.writePktSize::3 0 # Write request sizes (log2) 8810526Snilay@cs.wisc.edusystem.mem_ctrls.writePktSize::4 0 # Write request sizes (log2) 8910526Snilay@cs.wisc.edusystem.mem_ctrls.writePktSize::5 0 # Write request sizes (log2) 9010526Snilay@cs.wisc.edusystem.mem_ctrls.writePktSize::6 1285 # Write request sizes (log2) 9111023Sjthestness@gmail.comsystem.mem_ctrls.rdQLenPdf::0 686 # What read queue length does an incoming req see 9210526Snilay@cs.wisc.edusystem.mem_ctrls.rdQLenPdf::1 0 # What read queue length does an incoming req see 9310526Snilay@cs.wisc.edusystem.mem_ctrls.rdQLenPdf::2 0 # What read queue length does an incoming req see 9410526Snilay@cs.wisc.edusystem.mem_ctrls.rdQLenPdf::3 0 # What read queue length does an incoming req see 9510526Snilay@cs.wisc.edusystem.mem_ctrls.rdQLenPdf::4 0 # What read queue length does an incoming req see 9610526Snilay@cs.wisc.edusystem.mem_ctrls.rdQLenPdf::5 0 # What read queue length does an incoming req see 9710526Snilay@cs.wisc.edusystem.mem_ctrls.rdQLenPdf::6 0 # What read queue length does an incoming req see 9810526Snilay@cs.wisc.edusystem.mem_ctrls.rdQLenPdf::7 0 # What read queue length does an incoming req see 9910526Snilay@cs.wisc.edusystem.mem_ctrls.rdQLenPdf::8 0 # What read queue length does an incoming req see 10010526Snilay@cs.wisc.edusystem.mem_ctrls.rdQLenPdf::9 0 # What read queue length does an incoming req see 10110526Snilay@cs.wisc.edusystem.mem_ctrls.rdQLenPdf::10 0 # What read queue length does an incoming req see 10210526Snilay@cs.wisc.edusystem.mem_ctrls.rdQLenPdf::11 0 # What read queue length does an incoming req see 10310526Snilay@cs.wisc.edusystem.mem_ctrls.rdQLenPdf::12 0 # What read queue length does an incoming req see 10410526Snilay@cs.wisc.edusystem.mem_ctrls.rdQLenPdf::13 0 # What read queue length does an incoming req see 10510526Snilay@cs.wisc.edusystem.mem_ctrls.rdQLenPdf::14 0 # What read queue length does an incoming req see 10610526Snilay@cs.wisc.edusystem.mem_ctrls.rdQLenPdf::15 0 # What read queue length does an incoming req see 10710526Snilay@cs.wisc.edusystem.mem_ctrls.rdQLenPdf::16 0 # What read queue length does an incoming req see 10810526Snilay@cs.wisc.edusystem.mem_ctrls.rdQLenPdf::17 0 # What read queue length does an incoming req see 10910526Snilay@cs.wisc.edusystem.mem_ctrls.rdQLenPdf::18 0 # What read queue length does an incoming req see 11010526Snilay@cs.wisc.edusystem.mem_ctrls.rdQLenPdf::19 0 # What read queue length does an incoming req see 11110526Snilay@cs.wisc.edusystem.mem_ctrls.rdQLenPdf::20 0 # What read queue length does an incoming req see 11210526Snilay@cs.wisc.edusystem.mem_ctrls.rdQLenPdf::21 0 # What read queue length does an incoming req see 11310526Snilay@cs.wisc.edusystem.mem_ctrls.rdQLenPdf::22 0 # What read queue length does an incoming req see 11410526Snilay@cs.wisc.edusystem.mem_ctrls.rdQLenPdf::23 0 # What read queue length does an incoming req see 11510526Snilay@cs.wisc.edusystem.mem_ctrls.rdQLenPdf::24 0 # What read queue length does an incoming req see 11610526Snilay@cs.wisc.edusystem.mem_ctrls.rdQLenPdf::25 0 # What read queue length does an incoming req see 11710526Snilay@cs.wisc.edusystem.mem_ctrls.rdQLenPdf::26 0 # What read queue length does an incoming req see 11810526Snilay@cs.wisc.edusystem.mem_ctrls.rdQLenPdf::27 0 # What read queue length does an incoming req see 11910526Snilay@cs.wisc.edusystem.mem_ctrls.rdQLenPdf::28 0 # What read queue length does an incoming req see 12010526Snilay@cs.wisc.edusystem.mem_ctrls.rdQLenPdf::29 0 # What read queue length does an incoming req see 12110526Snilay@cs.wisc.edusystem.mem_ctrls.rdQLenPdf::30 0 # What read queue length does an incoming req see 12210526Snilay@cs.wisc.edusystem.mem_ctrls.rdQLenPdf::31 0 # What read queue length does an incoming req see 12310526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::0 1 # What write queue length does an incoming req see 12410526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::1 1 # What write queue length does an incoming req see 12510526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::2 1 # What write queue length does an incoming req see 12610526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::3 1 # What write queue length does an incoming req see 12710526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::4 1 # What write queue length does an incoming req see 12810526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::5 1 # What write queue length does an incoming req see 12910526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::6 1 # What write queue length does an incoming req see 13010526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::7 1 # What write queue length does an incoming req see 13110526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::8 1 # What write queue length does an incoming req see 13210526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::9 1 # What write queue length does an incoming req see 13310526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::10 1 # What write queue length does an incoming req see 13410526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::11 1 # What write queue length does an incoming req see 13510526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::12 1 # What write queue length does an incoming req see 13610526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::13 1 # What write queue length does an incoming req see 13710526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::14 1 # What write queue length does an incoming req see 13810892Sandreas.hansson@arm.comsystem.mem_ctrls.wrQLenPdf::15 5 # What write queue length does an incoming req see 13910892Sandreas.hansson@arm.comsystem.mem_ctrls.wrQLenPdf::16 5 # What write queue length does an incoming req see 14011023Sjthestness@gmail.comsystem.mem_ctrls.wrQLenPdf::17 34 # What write queue length does an incoming req see 14111023Sjthestness@gmail.comsystem.mem_ctrls.wrQLenPdf::18 45 # What write queue length does an incoming req see 14210892Sandreas.hansson@arm.comsystem.mem_ctrls.wrQLenPdf::19 45 # What write queue length does an incoming req see 14311023Sjthestness@gmail.comsystem.mem_ctrls.wrQLenPdf::20 48 # What write queue length does an incoming req see 14411023Sjthestness@gmail.comsystem.mem_ctrls.wrQLenPdf::21 46 # What write queue length does an incoming req see 14510892Sandreas.hansson@arm.comsystem.mem_ctrls.wrQLenPdf::22 42 # What write queue length does an incoming req see 14610892Sandreas.hansson@arm.comsystem.mem_ctrls.wrQLenPdf::23 42 # What write queue length does an incoming req see 14710892Sandreas.hansson@arm.comsystem.mem_ctrls.wrQLenPdf::24 42 # What write queue length does an incoming req see 14810892Sandreas.hansson@arm.comsystem.mem_ctrls.wrQLenPdf::25 42 # What write queue length does an incoming req see 14910892Sandreas.hansson@arm.comsystem.mem_ctrls.wrQLenPdf::26 42 # What write queue length does an incoming req see 15010892Sandreas.hansson@arm.comsystem.mem_ctrls.wrQLenPdf::27 42 # What write queue length does an incoming req see 15110892Sandreas.hansson@arm.comsystem.mem_ctrls.wrQLenPdf::28 42 # What write queue length does an incoming req see 15210892Sandreas.hansson@arm.comsystem.mem_ctrls.wrQLenPdf::29 42 # What write queue length does an incoming req see 15310892Sandreas.hansson@arm.comsystem.mem_ctrls.wrQLenPdf::30 42 # What write queue length does an incoming req see 15410892Sandreas.hansson@arm.comsystem.mem_ctrls.wrQLenPdf::31 42 # What write queue length does an incoming req see 15510892Sandreas.hansson@arm.comsystem.mem_ctrls.wrQLenPdf::32 42 # What write queue length does an incoming req see 15610526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::33 1 # What write queue length does an incoming req see 15710526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::34 0 # What write queue length does an incoming req see 15810526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::35 0 # What write queue length does an incoming req see 15910526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::36 0 # What write queue length does an incoming req see 16010526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::37 0 # What write queue length does an incoming req see 16110526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::38 0 # What write queue length does an incoming req see 16210526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::39 0 # What write queue length does an incoming req see 16310526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::40 0 # What write queue length does an incoming req see 16410526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::41 0 # What write queue length does an incoming req see 16510526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::42 0 # What write queue length does an incoming req see 16610526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::43 0 # What write queue length does an incoming req see 16710526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::44 0 # What write queue length does an incoming req see 16810526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::45 0 # What write queue length does an incoming req see 16910526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::46 0 # What write queue length does an incoming req see 17010526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::47 0 # What write queue length does an incoming req see 17110526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::48 0 # What write queue length does an incoming req see 17210526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::49 0 # What write queue length does an incoming req see 17310526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::50 0 # What write queue length does an incoming req see 17410526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::51 0 # What write queue length does an incoming req see 17510526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::52 0 # What write queue length does an incoming req see 17610526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::53 0 # What write queue length does an incoming req see 17710526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::54 0 # What write queue length does an incoming req see 17810526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::55 0 # What write queue length does an incoming req see 17910526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::56 0 # What write queue length does an incoming req see 18010526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::57 0 # What write queue length does an incoming req see 18110526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::58 0 # What write queue length does an incoming req see 18210526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::59 0 # What write queue length does an incoming req see 18310526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::60 0 # What write queue length does an incoming req see 18410526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::61 0 # What write queue length does an incoming req see 18510526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::62 0 # What write queue length does an incoming req see 18610526Snilay@cs.wisc.edusystem.mem_ctrls.wrQLenPdf::63 0 # What write queue length does an incoming req see 18711023Sjthestness@gmail.comsystem.mem_ctrls.bytesPerActivate::samples 227 # Bytes accessed per row activation 18811023Sjthestness@gmail.comsystem.mem_ctrls.bytesPerActivate::mean 379.207048 # Bytes accessed per row activation 18911023Sjthestness@gmail.comsystem.mem_ctrls.bytesPerActivate::gmean 252.014148 # Bytes accessed per row activation 19011023Sjthestness@gmail.comsystem.mem_ctrls.bytesPerActivate::stdev 323.708826 # Bytes accessed per row activation 19111023Sjthestness@gmail.comsystem.mem_ctrls.bytesPerActivate::0-127 44 19.38% 19.38% # Bytes accessed per row activation 19211023Sjthestness@gmail.comsystem.mem_ctrls.bytesPerActivate::128-255 63 27.75% 47.14% # Bytes accessed per row activation 19311023Sjthestness@gmail.comsystem.mem_ctrls.bytesPerActivate::256-383 29 12.78% 59.91% # Bytes accessed per row activation 19411023Sjthestness@gmail.comsystem.mem_ctrls.bytesPerActivate::384-511 17 7.49% 67.40% # Bytes accessed per row activation 19511023Sjthestness@gmail.comsystem.mem_ctrls.bytesPerActivate::512-639 17 7.49% 74.89% # Bytes accessed per row activation 19611023Sjthestness@gmail.comsystem.mem_ctrls.bytesPerActivate::640-767 17 7.49% 82.38% # Bytes accessed per row activation 19711023Sjthestness@gmail.comsystem.mem_ctrls.bytesPerActivate::768-895 9 3.96% 86.34% # Bytes accessed per row activation 19811023Sjthestness@gmail.comsystem.mem_ctrls.bytesPerActivate::896-1023 6 2.64% 88.99% # Bytes accessed per row activation 19911023Sjthestness@gmail.comsystem.mem_ctrls.bytesPerActivate::1024-1151 25 11.01% 100.00% # Bytes accessed per row activation 20011023Sjthestness@gmail.comsystem.mem_ctrls.bytesPerActivate::total 227 # Bytes accessed per row activation 20110892Sandreas.hansson@arm.comsystem.mem_ctrls.rdPerTurnAround::samples 42 # Reads before turning the bus around for writes 20211023Sjthestness@gmail.comsystem.mem_ctrls.rdPerTurnAround::mean 16.190476 # Reads before turning the bus around for writes 20311023Sjthestness@gmail.comsystem.mem_ctrls.rdPerTurnAround::gmean 15.978361 # Reads before turning the bus around for writes 20411023Sjthestness@gmail.comsystem.mem_ctrls.rdPerTurnAround::stdev 3.255300 # Reads before turning the bus around for writes 20511023Sjthestness@gmail.comsystem.mem_ctrls.rdPerTurnAround::12-13 3 7.14% 7.14% # Reads before turning the bus around for writes 20611023Sjthestness@gmail.comsystem.mem_ctrls.rdPerTurnAround::14-15 10 23.81% 30.95% # Reads before turning the bus around for writes 20711023Sjthestness@gmail.comsystem.mem_ctrls.rdPerTurnAround::16-17 26 61.90% 92.86% # Reads before turning the bus around for writes 20811023Sjthestness@gmail.comsystem.mem_ctrls.rdPerTurnAround::18-19 1 2.38% 95.24% # Reads before turning the bus around for writes 20911023Sjthestness@gmail.comsystem.mem_ctrls.rdPerTurnAround::20-21 1 2.38% 97.62% # Reads before turning the bus around for writes 21010892Sandreas.hansson@arm.comsystem.mem_ctrls.rdPerTurnAround::34-35 1 2.38% 100.00% # Reads before turning the bus around for writes 21110892Sandreas.hansson@arm.comsystem.mem_ctrls.rdPerTurnAround::total 42 # Reads before turning the bus around for writes 21210892Sandreas.hansson@arm.comsystem.mem_ctrls.wrPerTurnAround::samples 42 # Writes before turning the bus around for reads 21311023Sjthestness@gmail.comsystem.mem_ctrls.wrPerTurnAround::mean 16.285714 # Writes before turning the bus around for reads 21411023Sjthestness@gmail.comsystem.mem_ctrls.wrPerTurnAround::gmean 16.270299 # Writes before turning the bus around for reads 21511023Sjthestness@gmail.comsystem.mem_ctrls.wrPerTurnAround::stdev 0.741972 # Writes before turning the bus around for reads 21611023Sjthestness@gmail.comsystem.mem_ctrls.wrPerTurnAround::16 36 85.71% 85.71% # Writes before turning the bus around for reads 21711023Sjthestness@gmail.comsystem.mem_ctrls.wrPerTurnAround::17 1 2.38% 88.10% # Writes before turning the bus around for reads 21811023Sjthestness@gmail.comsystem.mem_ctrls.wrPerTurnAround::18 4 9.52% 97.62% # Writes before turning the bus around for reads 21911023Sjthestness@gmail.comsystem.mem_ctrls.wrPerTurnAround::19 1 2.38% 100.00% # Writes before turning the bus around for reads 22010892Sandreas.hansson@arm.comsystem.mem_ctrls.wrPerTurnAround::total 42 # Writes before turning the bus around for reads 22111023Sjthestness@gmail.comsystem.mem_ctrls.totQLat 8350 # Total ticks spent queuing 22211023Sjthestness@gmail.comsystem.mem_ctrls.totMemAccLat 21384 # Total ticks spent from burst creation until serviced by the DRAM 22311023Sjthestness@gmail.comsystem.mem_ctrls.totBusLat 3430 # Total ticks spent in databus transfers 22411023Sjthestness@gmail.comsystem.mem_ctrls.avgQLat 12.17 # Average queueing delay per DRAM burst 22510526Snilay@cs.wisc.edusystem.mem_ctrls.avgBusLat 5.00 # Average bus latency per DRAM burst 22611023Sjthestness@gmail.comsystem.mem_ctrls.avgMemAccLat 31.17 # Average memory access latency per DRAM burst 22711023Sjthestness@gmail.comsystem.mem_ctrls.avgRdBW 537.36 # Average DRAM read bandwidth in MiByte/s 22811023Sjthestness@gmail.comsystem.mem_ctrls.avgWrBW 535.79 # Average achieved write bandwidth in MiByte/s 22911023Sjthestness@gmail.comsystem.mem_ctrls.avgRdBWSys 1009.71 # Average system read bandwidth in MiByte/s 23011023Sjthestness@gmail.comsystem.mem_ctrls.avgWrBWSys 1006.57 # Average system write bandwidth in MiByte/s 23110526Snilay@cs.wisc.edusystem.mem_ctrls.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s 23211023Sjthestness@gmail.comsystem.mem_ctrls.busUtil 8.38 # Data bus utilization in percentage 23311023Sjthestness@gmail.comsystem.mem_ctrls.busUtilRead 4.20 # Data bus utilization in percentage for reads 23411023Sjthestness@gmail.comsystem.mem_ctrls.busUtilWrite 4.19 # Data bus utilization in percentage for writes 23510526Snilay@cs.wisc.edusystem.mem_ctrls.avgRdQLen 1.00 # Average read queue length when enqueuing 23611023Sjthestness@gmail.comsystem.mem_ctrls.avgWrQLen 25.98 # Average write queue length when enqueuing 23711023Sjthestness@gmail.comsystem.mem_ctrls.readRowHits 503 # Number of row buffer hits during reads 23811023Sjthestness@gmail.comsystem.mem_ctrls.writeRowHits 635 # Number of row buffer hits during writes 23911023Sjthestness@gmail.comsystem.mem_ctrls.readRowHitRate 73.32 # Row buffer hit rate for reads 24011023Sjthestness@gmail.comsystem.mem_ctrls.writeRowHitRate 89.94 # Row buffer hit rate for writes 24111023Sjthestness@gmail.comsystem.mem_ctrls.avgGap 31.72 # Average gap between requests 24211023Sjthestness@gmail.comsystem.mem_ctrls.pageHitRate 81.75 # Row buffer hit rate, read and write combined 24311023Sjthestness@gmail.comsystem.mem_ctrls_0.actEnergy 960120 # Energy for activate commands per rank (pJ) 24411023Sjthestness@gmail.comsystem.mem_ctrls_0.preEnergy 533400 # Energy for precharge commands per rank (pJ) 24511023Sjthestness@gmail.comsystem.mem_ctrls_0.readEnergy 4992000 # Energy for read commands per rank (pJ) 24611023Sjthestness@gmail.comsystem.mem_ctrls_0.writeEnergy 3981312 # Energy for write commands per rank (pJ) 24711023Sjthestness@gmail.comsystem.mem_ctrls_0.refreshEnergy 5085600 # Energy for refresh commands per rank (pJ) 24811023Sjthestness@gmail.comsystem.mem_ctrls_0.actBackEnergy 48305448 # Energy for active background per rank (pJ) 24911023Sjthestness@gmail.comsystem.mem_ctrls_0.preBackEnergy 4498800 # Energy for precharge background per rank (pJ) 25011023Sjthestness@gmail.comsystem.mem_ctrls_0.totalEnergy 68356680 # Total energy per rank (pJ) 25111023Sjthestness@gmail.comsystem.mem_ctrls_0.averagePower 875.021505 # Core power per rank (mW) 25211023Sjthestness@gmail.comsystem.mem_ctrls_0.memoryStateTime::IDLE 7218 # Time in different power states 25311023Sjthestness@gmail.comsystem.mem_ctrls_0.memoryStateTime::REF 2600 # Time in different power states 25410628Sandreas.hansson@arm.comsystem.mem_ctrls_0.memoryStateTime::PRE_PDN 0 # Time in different power states 25511023Sjthestness@gmail.comsystem.mem_ctrls_0.memoryStateTime::ACT 68316 # Time in different power states 25610628Sandreas.hansson@arm.comsystem.mem_ctrls_0.memoryStateTime::ACT_PDN 0 # Time in different power states 25711023Sjthestness@gmail.comsystem.mem_ctrls_1.actEnergy 703080 # Energy for activate commands per rank (pJ) 25811023Sjthestness@gmail.comsystem.mem_ctrls_1.preEnergy 390600 # Energy for precharge commands per rank (pJ) 25911023Sjthestness@gmail.comsystem.mem_ctrls_1.readEnergy 3107520 # Energy for read commands per rank (pJ) 26011023Sjthestness@gmail.comsystem.mem_ctrls_1.writeEnergy 2602368 # Energy for write commands per rank (pJ) 26111023Sjthestness@gmail.comsystem.mem_ctrls_1.refreshEnergy 5085600 # Energy for refresh commands per rank (pJ) 26211023Sjthestness@gmail.comsystem.mem_ctrls_1.actBackEnergy 45961380 # Energy for active background per rank (pJ) 26311023Sjthestness@gmail.comsystem.mem_ctrls_1.preBackEnergy 6555000 # Energy for precharge background per rank (pJ) 26411023Sjthestness@gmail.comsystem.mem_ctrls_1.totalEnergy 64405548 # Total energy per rank (pJ) 26511023Sjthestness@gmail.comsystem.mem_ctrls_1.averagePower 824.443779 # Core power per rank (mW) 26611023Sjthestness@gmail.comsystem.mem_ctrls_1.memoryStateTime::IDLE 10688 # Time in different power states 26711023Sjthestness@gmail.comsystem.mem_ctrls_1.memoryStateTime::REF 2600 # Time in different power states 26810628Sandreas.hansson@arm.comsystem.mem_ctrls_1.memoryStateTime::PRE_PDN 0 # Time in different power states 26911023Sjthestness@gmail.comsystem.mem_ctrls_1.memoryStateTime::ACT 64875 # Time in different power states 27010628Sandreas.hansson@arm.comsystem.mem_ctrls_1.memoryStateTime::ACT_PDN 0 # Time in different power states 27110526Snilay@cs.wisc.edusystem.cpu.clk_domain.clock 1 # Clock period in ticks 2728343SN/Asystem.cpu.workload.num_syscalls 11 # Number of system calls 27311023Sjthestness@gmail.comsystem.cpu.numCycles 81703 # number of cpu cycles simulated 2748343SN/Asystem.cpu.numWorkItemsStarted 0 # number of work items this cpu started 2757935SN/Asystem.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 2769150SAli.Saidi@ARM.comsystem.cpu.committedInsts 5327 # Number of instructions committed 2779150SAli.Saidi@ARM.comsystem.cpu.committedOps 5327 # Number of ops (including micro ops) committed 2789150SAli.Saidi@ARM.comsystem.cpu.num_int_alu_accesses 4505 # Number of integer alu accesses 2797935SN/Asystem.cpu.num_fp_alu_accesses 0 # Number of float alu accesses 2808343SN/Asystem.cpu.num_func_calls 146 # number of times a function call or return occured 2819150SAli.Saidi@ARM.comsystem.cpu.num_conditional_control_insts 773 # number of instructions that are conditional controls 2829150SAli.Saidi@ARM.comsystem.cpu.num_int_insts 4505 # number of integer instructions 2837935SN/Asystem.cpu.num_fp_insts 0 # number of float instructions 2849150SAli.Saidi@ARM.comsystem.cpu.num_int_register_reads 10598 # number of times the integer registers were read 2859150SAli.Saidi@ARM.comsystem.cpu.num_int_register_writes 4845 # number of times the integer registers were written 2867935SN/Asystem.cpu.num_fp_register_reads 0 # number of times the floating registers were read 2877935SN/Asystem.cpu.num_fp_register_writes 0 # number of times the floating registers were written 2889150SAli.Saidi@ARM.comsystem.cpu.num_mem_refs 1401 # number of memory refs 2899150SAli.Saidi@ARM.comsystem.cpu.num_load_insts 723 # Number of load instructions 2908343SN/Asystem.cpu.num_store_insts 678 # Number of store instructions 29111023Sjthestness@gmail.comsystem.cpu.num_idle_cycles 0.999988 # Number of idle cycles 29211023Sjthestness@gmail.comsystem.cpu.num_busy_cycles 81702.000012 # Number of busy cycles 29311023Sjthestness@gmail.comsystem.cpu.not_idle_fraction 0.999988 # Percentage of non-idle cycles 29411023Sjthestness@gmail.comsystem.cpu.idle_fraction 0.000012 # Percentage of idle cycles 29510063Snilay@cs.wisc.edusystem.cpu.Branches 1121 # Number of branches fetched 29610220Sandreas.hansson@arm.comsystem.cpu.op_class::No_OpClass 173 3.22% 3.22% # Class of executed instruction 29710220Sandreas.hansson@arm.comsystem.cpu.op_class::IntAlu 3796 70.69% 73.91% # Class of executed instruction 29810220Sandreas.hansson@arm.comsystem.cpu.op_class::IntMult 0 0.00% 73.91% # Class of executed instruction 29910220Sandreas.hansson@arm.comsystem.cpu.op_class::IntDiv 0 0.00% 73.91% # Class of executed instruction 30010220Sandreas.hansson@arm.comsystem.cpu.op_class::FloatAdd 0 0.00% 73.91% # Class of executed instruction 30110220Sandreas.hansson@arm.comsystem.cpu.op_class::FloatCmp 0 0.00% 73.91% # Class of executed instruction 30210220Sandreas.hansson@arm.comsystem.cpu.op_class::FloatCvt 0 0.00% 73.91% # Class of executed instruction 30310220Sandreas.hansson@arm.comsystem.cpu.op_class::FloatMult 0 0.00% 73.91% # Class of executed instruction 30410220Sandreas.hansson@arm.comsystem.cpu.op_class::FloatDiv 0 0.00% 73.91% # Class of executed instruction 30510220Sandreas.hansson@arm.comsystem.cpu.op_class::FloatSqrt 0 0.00% 73.91% # Class of executed instruction 30610220Sandreas.hansson@arm.comsystem.cpu.op_class::SimdAdd 0 0.00% 73.91% # Class of executed instruction 30710220Sandreas.hansson@arm.comsystem.cpu.op_class::SimdAddAcc 0 0.00% 73.91% # Class of executed instruction 30810220Sandreas.hansson@arm.comsystem.cpu.op_class::SimdAlu 0 0.00% 73.91% # Class of executed instruction 30910220Sandreas.hansson@arm.comsystem.cpu.op_class::SimdCmp 0 0.00% 73.91% # Class of executed instruction 31010220Sandreas.hansson@arm.comsystem.cpu.op_class::SimdCvt 0 0.00% 73.91% # Class of executed instruction 31110220Sandreas.hansson@arm.comsystem.cpu.op_class::SimdMisc 0 0.00% 73.91% # Class of executed instruction 31210220Sandreas.hansson@arm.comsystem.cpu.op_class::SimdMult 0 0.00% 73.91% # Class of executed instruction 31310220Sandreas.hansson@arm.comsystem.cpu.op_class::SimdMultAcc 0 0.00% 73.91% # Class of executed instruction 31410220Sandreas.hansson@arm.comsystem.cpu.op_class::SimdShift 0 0.00% 73.91% # Class of executed instruction 31510220Sandreas.hansson@arm.comsystem.cpu.op_class::SimdShiftAcc 0 0.00% 73.91% # Class of executed instruction 31610220Sandreas.hansson@arm.comsystem.cpu.op_class::SimdSqrt 0 0.00% 73.91% # Class of executed instruction 31710220Sandreas.hansson@arm.comsystem.cpu.op_class::SimdFloatAdd 0 0.00% 73.91% # Class of executed instruction 31810220Sandreas.hansson@arm.comsystem.cpu.op_class::SimdFloatAlu 0 0.00% 73.91% # Class of executed instruction 31910220Sandreas.hansson@arm.comsystem.cpu.op_class::SimdFloatCmp 0 0.00% 73.91% # Class of executed instruction 32010220Sandreas.hansson@arm.comsystem.cpu.op_class::SimdFloatCvt 0 0.00% 73.91% # Class of executed instruction 32110220Sandreas.hansson@arm.comsystem.cpu.op_class::SimdFloatDiv 0 0.00% 73.91% # Class of executed instruction 32210220Sandreas.hansson@arm.comsystem.cpu.op_class::SimdFloatMisc 0 0.00% 73.91% # Class of executed instruction 32310220Sandreas.hansson@arm.comsystem.cpu.op_class::SimdFloatMult 0 0.00% 73.91% # Class of executed instruction 32410220Sandreas.hansson@arm.comsystem.cpu.op_class::SimdFloatMultAcc 0 0.00% 73.91% # Class of executed instruction 32510220Sandreas.hansson@arm.comsystem.cpu.op_class::SimdFloatSqrt 0 0.00% 73.91% # Class of executed instruction 32610220Sandreas.hansson@arm.comsystem.cpu.op_class::MemRead 723 13.46% 87.37% # Class of executed instruction 32710220Sandreas.hansson@arm.comsystem.cpu.op_class::MemWrite 678 12.63% 100.00% # Class of executed instruction 32810220Sandreas.hansson@arm.comsystem.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction 32910220Sandreas.hansson@arm.comsystem.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction 33010220Sandreas.hansson@arm.comsystem.cpu.op_class::total 5370 # Class of executed instruction 33110628Sandreas.hansson@arm.comsystem.ruby.clk_domain.clock 1 # Clock period in ticks 33210628Sandreas.hansson@arm.comsystem.ruby.delayHist::bucket_size 1 # delay histogram for all message 33310628Sandreas.hansson@arm.comsystem.ruby.delayHist::max_bucket 9 # delay histogram for all message 33410628Sandreas.hansson@arm.comsystem.ruby.delayHist::samples 2574 # delay histogram for all message 33510628Sandreas.hansson@arm.comsystem.ruby.delayHist | 2574 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for all message 33610628Sandreas.hansson@arm.comsystem.ruby.delayHist::total 2574 # delay histogram for all message 33710628Sandreas.hansson@arm.comsystem.ruby.outstanding_req_hist::bucket_size 1 33810628Sandreas.hansson@arm.comsystem.ruby.outstanding_req_hist::max_bucket 9 33910628Sandreas.hansson@arm.comsystem.ruby.outstanding_req_hist::samples 6759 34010628Sandreas.hansson@arm.comsystem.ruby.outstanding_req_hist::mean 1 34110628Sandreas.hansson@arm.comsystem.ruby.outstanding_req_hist::gmean 1 34210628Sandreas.hansson@arm.comsystem.ruby.outstanding_req_hist | 0 0.00% 0.00% | 6759 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 34310628Sandreas.hansson@arm.comsystem.ruby.outstanding_req_hist::total 6759 34410628Sandreas.hansson@arm.comsystem.ruby.latency_hist::bucket_size 64 34510628Sandreas.hansson@arm.comsystem.ruby.latency_hist::max_bucket 639 34610628Sandreas.hansson@arm.comsystem.ruby.latency_hist::samples 6758 34711023Sjthestness@gmail.comsystem.ruby.latency_hist::mean 11.089819 34811023Sjthestness@gmail.comsystem.ruby.latency_hist::gmean 2.095228 34911023Sjthestness@gmail.comsystem.ruby.latency_hist::stdev 25.111209 35011023Sjthestness@gmail.comsystem.ruby.latency_hist | 6551 96.94% 96.94% | 169 2.50% 99.44% | 28 0.41% 99.85% | 2 0.03% 99.88% | 5 0.07% 99.96% | 2 0.03% 99.99% | 1 0.01% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 35110628Sandreas.hansson@arm.comsystem.ruby.latency_hist::total 6758 35210628Sandreas.hansson@arm.comsystem.ruby.hit_latency_hist::bucket_size 1 35310628Sandreas.hansson@arm.comsystem.ruby.hit_latency_hist::max_bucket 9 35410628Sandreas.hansson@arm.comsystem.ruby.hit_latency_hist::samples 5469 35511023Sjthestness@gmail.comsystem.ruby.hit_latency_hist::mean 1 35611023Sjthestness@gmail.comsystem.ruby.hit_latency_hist::gmean 1 35711023Sjthestness@gmail.comsystem.ruby.hit_latency_hist | 0 0.00% 0.00% | 5469 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 35810628Sandreas.hansson@arm.comsystem.ruby.hit_latency_hist::total 5469 35910628Sandreas.hansson@arm.comsystem.ruby.miss_latency_hist::bucket_size 64 36010628Sandreas.hansson@arm.comsystem.ruby.miss_latency_hist::max_bucket 639 36110628Sandreas.hansson@arm.comsystem.ruby.miss_latency_hist::samples 1289 36211023Sjthestness@gmail.comsystem.ruby.miss_latency_hist::mean 53.899147 36311023Sjthestness@gmail.comsystem.ruby.miss_latency_hist::gmean 48.323546 36411023Sjthestness@gmail.comsystem.ruby.miss_latency_hist::stdev 32.275754 36511023Sjthestness@gmail.comsystem.ruby.miss_latency_hist | 1082 83.94% 83.94% | 169 13.11% 97.05% | 28 2.17% 99.22% | 2 0.16% 99.38% | 5 0.39% 99.77% | 2 0.16% 99.92% | 1 0.08% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 36610628Sandreas.hansson@arm.comsystem.ruby.miss_latency_hist::total 1289 36710628Sandreas.hansson@arm.comsystem.ruby.Directory.incomplete_times 1288 36810628Sandreas.hansson@arm.comsystem.ruby.l1_cntrl0.cacheMemory.demand_hits 5469 # Number of cache demand hits 36910628Sandreas.hansson@arm.comsystem.ruby.l1_cntrl0.cacheMemory.demand_misses 1289 # Number of cache demand misses 37010628Sandreas.hansson@arm.comsystem.ruby.l1_cntrl0.cacheMemory.demand_accesses 6758 # Number of cache demand accesses 37110628Sandreas.hansson@arm.comsystem.ruby.memctrl_clk_domain.clock 3 # Clock period in ticks 37211023Sjthestness@gmail.comsystem.ruby.network.routers0.percent_links_utilized 7.876088 37310628Sandreas.hansson@arm.comsystem.ruby.network.routers0.msg_count.Control::2 1289 37410628Sandreas.hansson@arm.comsystem.ruby.network.routers0.msg_count.Data::2 1285 37510628Sandreas.hansson@arm.comsystem.ruby.network.routers0.msg_count.Response_Data::4 1289 37610628Sandreas.hansson@arm.comsystem.ruby.network.routers0.msg_count.Writeback_Control::3 1285 37710628Sandreas.hansson@arm.comsystem.ruby.network.routers0.msg_bytes.Control::2 10312 37810628Sandreas.hansson@arm.comsystem.ruby.network.routers0.msg_bytes.Data::2 92520 37910628Sandreas.hansson@arm.comsystem.ruby.network.routers0.msg_bytes.Response_Data::4 92808 38010628Sandreas.hansson@arm.comsystem.ruby.network.routers0.msg_bytes.Writeback_Control::3 10280 38111023Sjthestness@gmail.comsystem.ruby.network.routers1.percent_links_utilized 7.876088 38210628Sandreas.hansson@arm.comsystem.ruby.network.routers1.msg_count.Control::2 1289 38310628Sandreas.hansson@arm.comsystem.ruby.network.routers1.msg_count.Data::2 1285 38410628Sandreas.hansson@arm.comsystem.ruby.network.routers1.msg_count.Response_Data::4 1289 38510628Sandreas.hansson@arm.comsystem.ruby.network.routers1.msg_count.Writeback_Control::3 1285 38610628Sandreas.hansson@arm.comsystem.ruby.network.routers1.msg_bytes.Control::2 10312 38710628Sandreas.hansson@arm.comsystem.ruby.network.routers1.msg_bytes.Data::2 92520 38810628Sandreas.hansson@arm.comsystem.ruby.network.routers1.msg_bytes.Response_Data::4 92808 38910628Sandreas.hansson@arm.comsystem.ruby.network.routers1.msg_bytes.Writeback_Control::3 10280 39011023Sjthestness@gmail.comsystem.ruby.network.routers2.percent_links_utilized 7.876088 39110628Sandreas.hansson@arm.comsystem.ruby.network.routers2.msg_count.Control::2 1289 39210628Sandreas.hansson@arm.comsystem.ruby.network.routers2.msg_count.Data::2 1285 39310628Sandreas.hansson@arm.comsystem.ruby.network.routers2.msg_count.Response_Data::4 1289 39410628Sandreas.hansson@arm.comsystem.ruby.network.routers2.msg_count.Writeback_Control::3 1285 39510628Sandreas.hansson@arm.comsystem.ruby.network.routers2.msg_bytes.Control::2 10312 39610628Sandreas.hansson@arm.comsystem.ruby.network.routers2.msg_bytes.Data::2 92520 39710628Sandreas.hansson@arm.comsystem.ruby.network.routers2.msg_bytes.Response_Data::4 92808 39810628Sandreas.hansson@arm.comsystem.ruby.network.routers2.msg_bytes.Writeback_Control::3 10280 39910628Sandreas.hansson@arm.comsystem.ruby.network.msg_count.Control 3867 40010628Sandreas.hansson@arm.comsystem.ruby.network.msg_count.Data 3855 40110628Sandreas.hansson@arm.comsystem.ruby.network.msg_count.Response_Data 3867 40210628Sandreas.hansson@arm.comsystem.ruby.network.msg_count.Writeback_Control 3855 40310628Sandreas.hansson@arm.comsystem.ruby.network.msg_byte.Control 30936 40410628Sandreas.hansson@arm.comsystem.ruby.network.msg_byte.Data 277560 40510628Sandreas.hansson@arm.comsystem.ruby.network.msg_byte.Response_Data 278424 40610628Sandreas.hansson@arm.comsystem.ruby.network.msg_byte.Writeback_Control 30840 40711023Sjthestness@gmail.comsystem.ruby.network.routers0.throttle0.link_utilization 7.885879 4089864Snilay@cs.wisc.edusystem.ruby.network.routers0.throttle0.msg_count.Response_Data::4 1289 4099864Snilay@cs.wisc.edusystem.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 1285 4109864Snilay@cs.wisc.edusystem.ruby.network.routers0.throttle0.msg_bytes.Response_Data::4 92808 4119864Snilay@cs.wisc.edusystem.ruby.network.routers0.throttle0.msg_bytes.Writeback_Control::3 10280 41211023Sjthestness@gmail.comsystem.ruby.network.routers0.throttle1.link_utilization 7.866296 4139864Snilay@cs.wisc.edusystem.ruby.network.routers0.throttle1.msg_count.Control::2 1289 4149864Snilay@cs.wisc.edusystem.ruby.network.routers0.throttle1.msg_count.Data::2 1285 4159864Snilay@cs.wisc.edusystem.ruby.network.routers0.throttle1.msg_bytes.Control::2 10312 4169864Snilay@cs.wisc.edusystem.ruby.network.routers0.throttle1.msg_bytes.Data::2 92520 41711023Sjthestness@gmail.comsystem.ruby.network.routers1.throttle0.link_utilization 7.866296 4189864Snilay@cs.wisc.edusystem.ruby.network.routers1.throttle0.msg_count.Control::2 1289 4199864Snilay@cs.wisc.edusystem.ruby.network.routers1.throttle0.msg_count.Data::2 1285 4209864Snilay@cs.wisc.edusystem.ruby.network.routers1.throttle0.msg_bytes.Control::2 10312 4219864Snilay@cs.wisc.edusystem.ruby.network.routers1.throttle0.msg_bytes.Data::2 92520 42211023Sjthestness@gmail.comsystem.ruby.network.routers1.throttle1.link_utilization 7.885879 4239864Snilay@cs.wisc.edusystem.ruby.network.routers1.throttle1.msg_count.Response_Data::4 1289 4249864Snilay@cs.wisc.edusystem.ruby.network.routers1.throttle1.msg_count.Writeback_Control::3 1285 4259864Snilay@cs.wisc.edusystem.ruby.network.routers1.throttle1.msg_bytes.Response_Data::4 92808 4269864Snilay@cs.wisc.edusystem.ruby.network.routers1.throttle1.msg_bytes.Writeback_Control::3 10280 42711023Sjthestness@gmail.comsystem.ruby.network.routers2.throttle0.link_utilization 7.885879 4289864Snilay@cs.wisc.edusystem.ruby.network.routers2.throttle0.msg_count.Response_Data::4 1289 4299864Snilay@cs.wisc.edusystem.ruby.network.routers2.throttle0.msg_count.Writeback_Control::3 1285 4309864Snilay@cs.wisc.edusystem.ruby.network.routers2.throttle0.msg_bytes.Response_Data::4 92808 4319864Snilay@cs.wisc.edusystem.ruby.network.routers2.throttle0.msg_bytes.Writeback_Control::3 10280 43211023Sjthestness@gmail.comsystem.ruby.network.routers2.throttle1.link_utilization 7.866296 4339864Snilay@cs.wisc.edusystem.ruby.network.routers2.throttle1.msg_count.Control::2 1289 4349864Snilay@cs.wisc.edusystem.ruby.network.routers2.throttle1.msg_count.Data::2 1285 4359864Snilay@cs.wisc.edusystem.ruby.network.routers2.throttle1.msg_bytes.Control::2 10312 4369864Snilay@cs.wisc.edusystem.ruby.network.routers2.throttle1.msg_bytes.Data::2 92520 43710013Snilay@cs.wisc.edusystem.ruby.delayVCHist.vnet_1::bucket_size 1 # delay histogram for vnet_1 43810013Snilay@cs.wisc.edusystem.ruby.delayVCHist.vnet_1::max_bucket 9 # delay histogram for vnet_1 43910013Snilay@cs.wisc.edusystem.ruby.delayVCHist.vnet_1::samples 1289 # delay histogram for vnet_1 44010013Snilay@cs.wisc.edusystem.ruby.delayVCHist.vnet_1 | 1289 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_1 44110013Snilay@cs.wisc.edusystem.ruby.delayVCHist.vnet_1::total 1289 # delay histogram for vnet_1 44210013Snilay@cs.wisc.edusystem.ruby.delayVCHist.vnet_2::bucket_size 1 # delay histogram for vnet_2 44310013Snilay@cs.wisc.edusystem.ruby.delayVCHist.vnet_2::max_bucket 9 # delay histogram for vnet_2 44410013Snilay@cs.wisc.edusystem.ruby.delayVCHist.vnet_2::samples 1285 # delay histogram for vnet_2 44510013Snilay@cs.wisc.edusystem.ruby.delayVCHist.vnet_2 | 1285 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_2 44610013Snilay@cs.wisc.edusystem.ruby.delayVCHist.vnet_2::total 1285 # delay histogram for vnet_2 44711023Sjthestness@gmail.comsystem.ruby.LD.latency_hist::bucket_size 64 44811023Sjthestness@gmail.comsystem.ruby.LD.latency_hist::max_bucket 639 44910013Snilay@cs.wisc.edusystem.ruby.LD.latency_hist::samples 715 45011023Sjthestness@gmail.comsystem.ruby.LD.latency_hist::mean 28.394406 45111023Sjthestness@gmail.comsystem.ruby.LD.latency_hist::gmean 8.251059 45211023Sjthestness@gmail.comsystem.ruby.LD.latency_hist::stdev 33.266069 45311023Sjthestness@gmail.comsystem.ruby.LD.latency_hist | 656 91.75% 91.75% | 50 6.99% 98.74% | 8 1.12% 99.86% | 0 0.00% 99.86% | 0 0.00% 99.86% | 0 0.00% 99.86% | 1 0.14% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 45410013Snilay@cs.wisc.edusystem.ruby.LD.latency_hist::total 715 45510013Snilay@cs.wisc.edusystem.ruby.LD.hit_latency_hist::bucket_size 1 45610013Snilay@cs.wisc.edusystem.ruby.LD.hit_latency_hist::max_bucket 9 45710013Snilay@cs.wisc.edusystem.ruby.LD.hit_latency_hist::samples 320 45811023Sjthestness@gmail.comsystem.ruby.LD.hit_latency_hist::mean 1 45911023Sjthestness@gmail.comsystem.ruby.LD.hit_latency_hist::gmean 1 46011023Sjthestness@gmail.comsystem.ruby.LD.hit_latency_hist | 0 0.00% 0.00% | 320 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 46110013Snilay@cs.wisc.edusystem.ruby.LD.hit_latency_hist::total 320 46211023Sjthestness@gmail.comsystem.ruby.LD.miss_latency_hist::bucket_size 64 46311023Sjthestness@gmail.comsystem.ruby.LD.miss_latency_hist::max_bucket 639 46410013Snilay@cs.wisc.edusystem.ruby.LD.miss_latency_hist::samples 395 46511023Sjthestness@gmail.comsystem.ruby.LD.miss_latency_hist::mean 50.587342 46611023Sjthestness@gmail.comsystem.ruby.LD.miss_latency_hist::gmean 45.603541 46711023Sjthestness@gmail.comsystem.ruby.LD.miss_latency_hist::stdev 30.035585 46811023Sjthestness@gmail.comsystem.ruby.LD.miss_latency_hist | 336 85.06% 85.06% | 50 12.66% 97.72% | 8 2.03% 99.75% | 0 0.00% 99.75% | 0 0.00% 99.75% | 0 0.00% 99.75% | 1 0.25% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 46910013Snilay@cs.wisc.edusystem.ruby.LD.miss_latency_hist::total 395 47011023Sjthestness@gmail.comsystem.ruby.ST.latency_hist::bucket_size 32 47111023Sjthestness@gmail.comsystem.ruby.ST.latency_hist::max_bucket 319 47210013Snilay@cs.wisc.edusystem.ruby.ST.latency_hist::samples 673 47311023Sjthestness@gmail.comsystem.ruby.ST.latency_hist::mean 16.656761 47411023Sjthestness@gmail.comsystem.ruby.ST.latency_hist::gmean 2.888882 47511023Sjthestness@gmail.comsystem.ruby.ST.latency_hist::stdev 31.530024 47611023Sjthestness@gmail.comsystem.ruby.ST.latency_hist | 494 73.40% 73.40% | 146 21.69% 95.10% | 26 3.86% 98.96% | 0 0.00% 98.96% | 4 0.59% 99.55% | 0 0.00% 99.55% | 1 0.15% 99.70% | 0 0.00% 99.70% | 1 0.15% 99.85% | 1 0.15% 100.00% 47710013Snilay@cs.wisc.edusystem.ruby.ST.latency_hist::total 673 47810013Snilay@cs.wisc.edusystem.ruby.ST.hit_latency_hist::bucket_size 1 47910013Snilay@cs.wisc.edusystem.ruby.ST.hit_latency_hist::max_bucket 9 48010013Snilay@cs.wisc.edusystem.ruby.ST.hit_latency_hist::samples 494 48111023Sjthestness@gmail.comsystem.ruby.ST.hit_latency_hist::mean 1 48211023Sjthestness@gmail.comsystem.ruby.ST.hit_latency_hist::gmean 1 48311023Sjthestness@gmail.comsystem.ruby.ST.hit_latency_hist | 0 0.00% 0.00% | 494 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 48410013Snilay@cs.wisc.edusystem.ruby.ST.hit_latency_hist::total 494 48511023Sjthestness@gmail.comsystem.ruby.ST.miss_latency_hist::bucket_size 32 48611023Sjthestness@gmail.comsystem.ruby.ST.miss_latency_hist::max_bucket 319 48710013Snilay@cs.wisc.edusystem.ruby.ST.miss_latency_hist::samples 179 48811023Sjthestness@gmail.comsystem.ruby.ST.miss_latency_hist::mean 59.865922 48911023Sjthestness@gmail.comsystem.ruby.ST.miss_latency_hist::gmean 53.981018 49011023Sjthestness@gmail.comsystem.ruby.ST.miss_latency_hist::stdev 34.573548 49111023Sjthestness@gmail.comsystem.ruby.ST.miss_latency_hist | 0 0.00% 0.00% | 146 81.56% 81.56% | 26 14.53% 96.09% | 0 0.00% 96.09% | 4 2.23% 98.32% | 0 0.00% 98.32% | 1 0.56% 98.88% | 0 0.00% 98.88% | 1 0.56% 99.44% | 1 0.56% 100.00% 49210013Snilay@cs.wisc.edusystem.ruby.ST.miss_latency_hist::total 179 49310526Snilay@cs.wisc.edusystem.ruby.IFETCH.latency_hist::bucket_size 64 49410526Snilay@cs.wisc.edusystem.ruby.IFETCH.latency_hist::max_bucket 639 49510013Snilay@cs.wisc.edusystem.ruby.IFETCH.latency_hist::samples 5370 49611023Sjthestness@gmail.comsystem.ruby.IFETCH.latency_hist::mean 8.088082 49711023Sjthestness@gmail.comsystem.ruby.IFETCH.latency_hist::gmean 1.676829 49811023Sjthestness@gmail.comsystem.ruby.IFETCH.latency_hist::stdev 21.661449 49911023Sjthestness@gmail.comsystem.ruby.IFETCH.latency_hist | 5255 97.86% 97.86% | 93 1.73% 99.59% | 16 0.30% 99.89% | 1 0.02% 99.91% | 3 0.06% 99.96% | 2 0.04% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 50010013Snilay@cs.wisc.edusystem.ruby.IFETCH.latency_hist::total 5370 50110013Snilay@cs.wisc.edusystem.ruby.IFETCH.hit_latency_hist::bucket_size 1 50210013Snilay@cs.wisc.edusystem.ruby.IFETCH.hit_latency_hist::max_bucket 9 50310013Snilay@cs.wisc.edusystem.ruby.IFETCH.hit_latency_hist::samples 4655 50411023Sjthestness@gmail.comsystem.ruby.IFETCH.hit_latency_hist::mean 1 50511023Sjthestness@gmail.comsystem.ruby.IFETCH.hit_latency_hist::gmean 1 50611023Sjthestness@gmail.comsystem.ruby.IFETCH.hit_latency_hist | 0 0.00% 0.00% | 4655 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 50710013Snilay@cs.wisc.edusystem.ruby.IFETCH.hit_latency_hist::total 4655 50810526Snilay@cs.wisc.edusystem.ruby.IFETCH.miss_latency_hist::bucket_size 64 50910526Snilay@cs.wisc.edusystem.ruby.IFETCH.miss_latency_hist::max_bucket 639 51010013Snilay@cs.wisc.edusystem.ruby.IFETCH.miss_latency_hist::samples 715 51111023Sjthestness@gmail.comsystem.ruby.IFETCH.miss_latency_hist::mean 54.234965 51211023Sjthestness@gmail.comsystem.ruby.IFETCH.miss_latency_hist::gmean 48.531211 51311023Sjthestness@gmail.comsystem.ruby.IFETCH.miss_latency_hist::stdev 32.684395 51411023Sjthestness@gmail.comsystem.ruby.IFETCH.miss_latency_hist | 600 83.92% 83.92% | 93 13.01% 96.92% | 16 2.24% 99.16% | 1 0.14% 99.30% | 3 0.42% 99.72% | 2 0.28% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 51510013Snilay@cs.wisc.edusystem.ruby.IFETCH.miss_latency_hist::total 715 51610526Snilay@cs.wisc.edusystem.ruby.Directory.miss_mach_latency_hist::bucket_size 64 51710526Snilay@cs.wisc.edusystem.ruby.Directory.miss_mach_latency_hist::max_bucket 639 51810013Snilay@cs.wisc.edusystem.ruby.Directory.miss_mach_latency_hist::samples 1289 51911023Sjthestness@gmail.comsystem.ruby.Directory.miss_mach_latency_hist::mean 53.899147 52011023Sjthestness@gmail.comsystem.ruby.Directory.miss_mach_latency_hist::gmean 48.323546 52111023Sjthestness@gmail.comsystem.ruby.Directory.miss_mach_latency_hist::stdev 32.275754 52211023Sjthestness@gmail.comsystem.ruby.Directory.miss_mach_latency_hist | 1082 83.94% 83.94% | 169 13.11% 97.05% | 28 2.17% 99.22% | 2 0.16% 99.38% | 5 0.39% 99.77% | 2 0.16% 99.92% | 1 0.08% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 52310013Snilay@cs.wisc.edusystem.ruby.Directory.miss_mach_latency_hist::total 1289 52410013Snilay@cs.wisc.edusystem.ruby.Directory.miss_latency_hist.issue_to_initial_request::bucket_size 1 52510013Snilay@cs.wisc.edusystem.ruby.Directory.miss_latency_hist.issue_to_initial_request::max_bucket 9 52610013Snilay@cs.wisc.edusystem.ruby.Directory.miss_latency_hist.issue_to_initial_request::samples 1 52710013Snilay@cs.wisc.edusystem.ruby.Directory.miss_latency_hist.issue_to_initial_request::stdev nan 52810013Snilay@cs.wisc.edusystem.ruby.Directory.miss_latency_hist.issue_to_initial_request | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 52910013Snilay@cs.wisc.edusystem.ruby.Directory.miss_latency_hist.issue_to_initial_request::total 1 53010013Snilay@cs.wisc.edusystem.ruby.Directory.miss_latency_hist.initial_to_forward::bucket_size 1 53110013Snilay@cs.wisc.edusystem.ruby.Directory.miss_latency_hist.initial_to_forward::max_bucket 9 53210013Snilay@cs.wisc.edusystem.ruby.Directory.miss_latency_hist.initial_to_forward::samples 1 53310013Snilay@cs.wisc.edusystem.ruby.Directory.miss_latency_hist.initial_to_forward::stdev nan 53410013Snilay@cs.wisc.edusystem.ruby.Directory.miss_latency_hist.initial_to_forward | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 53510013Snilay@cs.wisc.edusystem.ruby.Directory.miss_latency_hist.initial_to_forward::total 1 53610013Snilay@cs.wisc.edusystem.ruby.Directory.miss_latency_hist.forward_to_first_response::bucket_size 1 53710013Snilay@cs.wisc.edusystem.ruby.Directory.miss_latency_hist.forward_to_first_response::max_bucket 9 53810013Snilay@cs.wisc.edusystem.ruby.Directory.miss_latency_hist.forward_to_first_response::samples 1 53910013Snilay@cs.wisc.edusystem.ruby.Directory.miss_latency_hist.forward_to_first_response::stdev nan 54010013Snilay@cs.wisc.edusystem.ruby.Directory.miss_latency_hist.forward_to_first_response | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 54110013Snilay@cs.wisc.edusystem.ruby.Directory.miss_latency_hist.forward_to_first_response::total 1 54210013Snilay@cs.wisc.edusystem.ruby.Directory.miss_latency_hist.first_response_to_completion::bucket_size 8 54310013Snilay@cs.wisc.edusystem.ruby.Directory.miss_latency_hist.first_response_to_completion::max_bucket 79 54410013Snilay@cs.wisc.edusystem.ruby.Directory.miss_latency_hist.first_response_to_completion::samples 1 54510526Snilay@cs.wisc.edusystem.ruby.Directory.miss_latency_hist.first_response_to_completion::mean 75 54610526Snilay@cs.wisc.edusystem.ruby.Directory.miss_latency_hist.first_response_to_completion::gmean 75.000000 54710013Snilay@cs.wisc.edusystem.ruby.Directory.miss_latency_hist.first_response_to_completion::stdev nan 54810526Snilay@cs.wisc.edusystem.ruby.Directory.miss_latency_hist.first_response_to_completion | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% 54910013Snilay@cs.wisc.edusystem.ruby.Directory.miss_latency_hist.first_response_to_completion::total 1 55011023Sjthestness@gmail.comsystem.ruby.LD.Directory.miss_type_mach_latency_hist::bucket_size 64 55111023Sjthestness@gmail.comsystem.ruby.LD.Directory.miss_type_mach_latency_hist::max_bucket 639 55210013Snilay@cs.wisc.edusystem.ruby.LD.Directory.miss_type_mach_latency_hist::samples 395 55311023Sjthestness@gmail.comsystem.ruby.LD.Directory.miss_type_mach_latency_hist::mean 50.587342 55411023Sjthestness@gmail.comsystem.ruby.LD.Directory.miss_type_mach_latency_hist::gmean 45.603541 55511023Sjthestness@gmail.comsystem.ruby.LD.Directory.miss_type_mach_latency_hist::stdev 30.035585 55611023Sjthestness@gmail.comsystem.ruby.LD.Directory.miss_type_mach_latency_hist | 336 85.06% 85.06% | 50 12.66% 97.72% | 8 2.03% 99.75% | 0 0.00% 99.75% | 0 0.00% 99.75% | 0 0.00% 99.75% | 1 0.25% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 55710013Snilay@cs.wisc.edusystem.ruby.LD.Directory.miss_type_mach_latency_hist::total 395 55811023Sjthestness@gmail.comsystem.ruby.ST.Directory.miss_type_mach_latency_hist::bucket_size 32 55911023Sjthestness@gmail.comsystem.ruby.ST.Directory.miss_type_mach_latency_hist::max_bucket 319 56010013Snilay@cs.wisc.edusystem.ruby.ST.Directory.miss_type_mach_latency_hist::samples 179 56111023Sjthestness@gmail.comsystem.ruby.ST.Directory.miss_type_mach_latency_hist::mean 59.865922 56211023Sjthestness@gmail.comsystem.ruby.ST.Directory.miss_type_mach_latency_hist::gmean 53.981018 56311023Sjthestness@gmail.comsystem.ruby.ST.Directory.miss_type_mach_latency_hist::stdev 34.573548 56411023Sjthestness@gmail.comsystem.ruby.ST.Directory.miss_type_mach_latency_hist | 0 0.00% 0.00% | 146 81.56% 81.56% | 26 14.53% 96.09% | 0 0.00% 96.09% | 4 2.23% 98.32% | 0 0.00% 98.32% | 1 0.56% 98.88% | 0 0.00% 98.88% | 1 0.56% 99.44% | 1 0.56% 100.00% 56510013Snilay@cs.wisc.edusystem.ruby.ST.Directory.miss_type_mach_latency_hist::total 179 56610526Snilay@cs.wisc.edusystem.ruby.IFETCH.Directory.miss_type_mach_latency_hist::bucket_size 64 56710526Snilay@cs.wisc.edusystem.ruby.IFETCH.Directory.miss_type_mach_latency_hist::max_bucket 639 56810013Snilay@cs.wisc.edusystem.ruby.IFETCH.Directory.miss_type_mach_latency_hist::samples 715 56911023Sjthestness@gmail.comsystem.ruby.IFETCH.Directory.miss_type_mach_latency_hist::mean 54.234965 57011023Sjthestness@gmail.comsystem.ruby.IFETCH.Directory.miss_type_mach_latency_hist::gmean 48.531211 57111023Sjthestness@gmail.comsystem.ruby.IFETCH.Directory.miss_type_mach_latency_hist::stdev 32.684395 57211023Sjthestness@gmail.comsystem.ruby.IFETCH.Directory.miss_type_mach_latency_hist | 600 83.92% 83.92% | 93 13.01% 96.92% | 16 2.24% 99.16% | 1 0.14% 99.30% | 3 0.42% 99.72% | 2 0.28% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 57310013Snilay@cs.wisc.edusystem.ruby.IFETCH.Directory.miss_type_mach_latency_hist::total 715 57410628Sandreas.hansson@arm.comsystem.ruby.Directory_Controller.GETX 1289 0.00% 0.00% 57510628Sandreas.hansson@arm.comsystem.ruby.Directory_Controller.PUTX 1285 0.00% 0.00% 57610628Sandreas.hansson@arm.comsystem.ruby.Directory_Controller.Memory_Data 1289 0.00% 0.00% 57710628Sandreas.hansson@arm.comsystem.ruby.Directory_Controller.Memory_Ack 1285 0.00% 0.00% 57810628Sandreas.hansson@arm.comsystem.ruby.Directory_Controller.I.GETX 1289 0.00% 0.00% 57910628Sandreas.hansson@arm.comsystem.ruby.Directory_Controller.M.PUTX 1285 0.00% 0.00% 58010628Sandreas.hansson@arm.comsystem.ruby.Directory_Controller.IM.Memory_Data 1289 0.00% 0.00% 58110628Sandreas.hansson@arm.comsystem.ruby.Directory_Controller.MI.Memory_Ack 1285 0.00% 0.00% 58210013Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.Load 715 0.00% 0.00% 58310013Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.Ifetch 5370 0.00% 0.00% 58410013Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.Store 673 0.00% 0.00% 58510013Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.Data 1289 0.00% 0.00% 58610013Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.Replacement 1285 0.00% 0.00% 58710013Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.Writeback_Ack 1285 0.00% 0.00% 58810013Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.I.Load 395 0.00% 0.00% 58910013Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.I.Ifetch 715 0.00% 0.00% 59010013Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.I.Store 179 0.00% 0.00% 59110013Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.M.Load 320 0.00% 0.00% 59210013Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.M.Ifetch 4655 0.00% 0.00% 59310013Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.M.Store 494 0.00% 0.00% 59410013Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.M.Replacement 1285 0.00% 0.00% 59510013Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.MI.Writeback_Ack 1285 0.00% 0.00% 59610013Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.IS.Data 1110 0.00% 0.00% 59710013Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.IM.Data 179 0.00% 0.00% 5986167SN/A 5996167SN/A---------- End Simulation Statistics ---------- 600