stats.txt revision 8802:ef66a9083bc4
1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.000003 # Number of seconds simulated 4sim_ticks 2900000 # Number of ticks simulated 5final_tick 2900000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks 7host_inst_rate 305071 # Simulator instruction rate (inst/s) 8host_tick_rate 152367478 # Simulator tick rate (ticks/s) 9host_mem_usage 196296 # Number of bytes of host memory used 10host_seconds 0.02 # Real time elapsed on the host 11sim_insts 5801 # Number of instructions simulated 12system.physmem.bytes_read 26925 # Number of bytes read from this memory 13system.physmem.bytes_inst_read 23204 # Number of instructions bytes read from this memory 14system.physmem.bytes_written 4209 # Number of bytes written to this memory 15system.physmem.num_reads 6763 # Number of read requests responded to by this memory 16system.physmem.num_writes 1046 # Number of write requests responded to by this memory 17system.physmem.num_other 0 # Number of other requests responded to by this memory 18system.physmem.bw_read 9284482759 # Total read bandwidth from this memory (bytes/s) 19system.physmem.bw_inst_read 8001379310 # Instruction read bandwidth from this memory (bytes/s) 20system.physmem.bw_write 1451379310 # Write bandwidth from this memory (bytes/s) 21system.physmem.bw_total 10735862069 # Total bandwidth to/from this memory (bytes/s) 22system.cpu.dtb.read_hits 0 # DTB read hits 23system.cpu.dtb.read_misses 0 # DTB read misses 24system.cpu.dtb.read_accesses 0 # DTB read accesses 25system.cpu.dtb.write_hits 0 # DTB write hits 26system.cpu.dtb.write_misses 0 # DTB write misses 27system.cpu.dtb.write_accesses 0 # DTB write accesses 28system.cpu.dtb.hits 0 # DTB hits 29system.cpu.dtb.misses 0 # DTB misses 30system.cpu.dtb.accesses 0 # DTB accesses 31system.cpu.itb.read_hits 0 # DTB read hits 32system.cpu.itb.read_misses 0 # DTB read misses 33system.cpu.itb.read_accesses 0 # DTB read accesses 34system.cpu.itb.write_hits 0 # DTB write hits 35system.cpu.itb.write_misses 0 # DTB write misses 36system.cpu.itb.write_accesses 0 # DTB write accesses 37system.cpu.itb.hits 0 # DTB hits 38system.cpu.itb.misses 0 # DTB misses 39system.cpu.itb.accesses 0 # DTB accesses 40system.cpu.workload.num_syscalls 9 # Number of system calls 41system.cpu.numCycles 5801 # number of cpu cycles simulated 42system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 43system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 44system.cpu.num_insts 5801 # Number of instructions executed 45system.cpu.num_int_alu_accesses 5706 # Number of integer alu accesses 46system.cpu.num_fp_alu_accesses 22 # Number of float alu accesses 47system.cpu.num_func_calls 200 # number of times a function call or return occured 48system.cpu.num_conditional_control_insts 896 # number of instructions that are conditional controls 49system.cpu.num_int_insts 5706 # number of integer instructions 50system.cpu.num_fp_insts 22 # number of float instructions 51system.cpu.num_int_register_reads 9541 # number of times the integer registers were read 52system.cpu.num_int_register_writes 5005 # number of times the integer registers were written 53system.cpu.num_fp_register_reads 20 # number of times the floating registers were read 54system.cpu.num_fp_register_writes 2 # number of times the floating registers were written 55system.cpu.num_mem_refs 2008 # number of memory refs 56system.cpu.num_load_insts 962 # Number of load instructions 57system.cpu.num_store_insts 1046 # Number of store instructions 58system.cpu.num_idle_cycles 0 # Number of idle cycles 59system.cpu.num_busy_cycles 5801 # Number of busy cycles 60system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles 61system.cpu.idle_fraction 0 # Percentage of idle cycles 62 63---------- End Simulation Statistics ---------- 64