config.ini revision 7935
1[root] 2type=Root 3children=system 4time_sync_enable=false 5time_sync_period=100000000000 6time_sync_spin_threshold=100000000 7 8[system] 9type=System 10children=cpu membus physmem 11mem_mode=atomic 12physmem=system.physmem 13work_begin_ckpt_count=0 14work_begin_cpu_id_exit=-1 15work_begin_exit_count=0 16work_cpus_ckpt_count=0 17work_end_ckpt_count=0 18work_end_exit_count=0 19work_item_id=-1 20 21[system.cpu] 22type=DerivO3CPU 23children=dcache dtb fuPool icache itb l2cache toL2Bus tracer workload 24BTBEntries=4096 25BTBTagSize=16 26LFSTSize=1024 27LQEntries=32 28RASSize=16 29SQEntries=32 30SSITSize=1024 31UnifiedTLB=true 32activity=0 33backComSize=5 34cachePorts=200 35checker=Null 36choiceCtrBits=2 37choicePredictorSize=8192 38clock=500 39commitToDecodeDelay=1 40commitToFetchDelay=1 41commitToIEWDelay=1 42commitToRenameDelay=1 43commitWidth=8 44cpu_id=0 45decodeToFetchDelay=1 46decodeToRenameDelay=1 47decodeWidth=8 48defer_registration=false 49dispatchWidth=8 50do_checkpoint_insts=true 51do_statistics_insts=true 52dtb=system.cpu.dtb 53fetchToDecodeDelay=1 54fetchTrapLatency=1 55fetchWidth=8 56forwardComSize=5 57fuPool=system.cpu.fuPool 58function_trace=false 59function_trace_start=0 60globalCtrBits=2 61globalHistoryBits=13 62globalPredictorSize=8192 63iewToCommitDelay=1 64iewToDecodeDelay=1 65iewToFetchDelay=1 66iewToRenameDelay=1 67instShiftAmt=2 68issueToExecuteDelay=1 69issueWidth=8 70itb=system.cpu.itb 71localCtrBits=2 72localHistoryBits=11 73localHistoryTableSize=2048 74localPredictorSize=2048 75max_insts_all_threads=0 76max_insts_any_thread=0 77max_loads_all_threads=0 78max_loads_any_thread=0 79numIQEntries=64 80numPhysFloatRegs=256 81numPhysIntRegs=256 82numROBEntries=192 83numRobs=1 84numThreads=1 85phase=0 86predType=tournament 87progress_interval=0 88renameToDecodeDelay=1 89renameToFetchDelay=1 90renameToIEWDelay=2 91renameToROBDelay=1 92renameWidth=8 93smtCommitPolicy=RoundRobin 94smtFetchPolicy=SingleThread 95smtIQPolicy=Partitioned 96smtIQThreshold=100 97smtLSQPolicy=Partitioned 98smtLSQThreshold=100 99smtNumFetchingThreads=1 100smtROBPolicy=Partitioned 101smtROBThreshold=100 102squashWidth=8 103system=system 104tracer=system.cpu.tracer 105trapLatency=13 106wbDepth=1 107wbWidth=8 108workload=system.cpu.workload 109dcache_port=system.cpu.dcache.cpu_side 110icache_port=system.cpu.icache.cpu_side 111 112[system.cpu.dcache] 113type=BaseCache 114addr_range=0:18446744073709551615 115assoc=2 116block_size=64 117forward_snoops=true 118hash_delay=1 119latency=1000 120max_miss_count=0 121mshrs=10 122num_cpus=1 123prefetch_data_accesses_only=false 124prefetch_degree=1 125prefetch_latency=10000 126prefetch_on_access=false 127prefetch_past_page=false 128prefetch_policy=none 129prefetch_serial_squash=false 130prefetch_use_cpu_id=true 131prefetcher_size=100 132prioritizeRequests=false 133repl=Null 134size=262144 135subblock_size=0 136tgts_per_mshr=20 137trace_addr=0 138two_queue=false 139write_buffers=8 140cpu_side=system.cpu.dcache_port 141mem_side=system.cpu.toL2Bus.port[1] 142 143[system.cpu.dtb] 144type=PowerTLB 145size=64 146 147[system.cpu.fuPool] 148type=FUPool 149children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 150FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8 151 152[system.cpu.fuPool.FUList0] 153type=FUDesc 154children=opList 155count=6 156opList=system.cpu.fuPool.FUList0.opList 157 158[system.cpu.fuPool.FUList0.opList] 159type=OpDesc 160issueLat=1 161opClass=IntAlu 162opLat=1 163 164[system.cpu.fuPool.FUList1] 165type=FUDesc 166children=opList0 opList1 167count=2 168opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 169 170[system.cpu.fuPool.FUList1.opList0] 171type=OpDesc 172issueLat=1 173opClass=IntMult 174opLat=3 175 176[system.cpu.fuPool.FUList1.opList1] 177type=OpDesc 178issueLat=19 179opClass=IntDiv 180opLat=20 181 182[system.cpu.fuPool.FUList2] 183type=FUDesc 184children=opList0 opList1 opList2 185count=4 186opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2 187 188[system.cpu.fuPool.FUList2.opList0] 189type=OpDesc 190issueLat=1 191opClass=FloatAdd 192opLat=2 193 194[system.cpu.fuPool.FUList2.opList1] 195type=OpDesc 196issueLat=1 197opClass=FloatCmp 198opLat=2 199 200[system.cpu.fuPool.FUList2.opList2] 201type=OpDesc 202issueLat=1 203opClass=FloatCvt 204opLat=2 205 206[system.cpu.fuPool.FUList3] 207type=FUDesc 208children=opList0 opList1 opList2 209count=2 210opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 211 212[system.cpu.fuPool.FUList3.opList0] 213type=OpDesc 214issueLat=1 215opClass=FloatMult 216opLat=4 217 218[system.cpu.fuPool.FUList3.opList1] 219type=OpDesc 220issueLat=12 221opClass=FloatDiv 222opLat=12 223 224[system.cpu.fuPool.FUList3.opList2] 225type=OpDesc 226issueLat=24 227opClass=FloatSqrt 228opLat=24 229 230[system.cpu.fuPool.FUList4] 231type=FUDesc 232children=opList 233count=0 234opList=system.cpu.fuPool.FUList4.opList 235 236[system.cpu.fuPool.FUList4.opList] 237type=OpDesc 238issueLat=1 239opClass=MemRead 240opLat=1 241 242[system.cpu.fuPool.FUList5] 243type=FUDesc 244children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 245count=4 246opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19 247 248[system.cpu.fuPool.FUList5.opList00] 249type=OpDesc 250issueLat=1 251opClass=SimdAdd 252opLat=1 253 254[system.cpu.fuPool.FUList5.opList01] 255type=OpDesc 256issueLat=1 257opClass=SimdAddAcc 258opLat=1 259 260[system.cpu.fuPool.FUList5.opList02] 261type=OpDesc 262issueLat=1 263opClass=SimdAlu 264opLat=1 265 266[system.cpu.fuPool.FUList5.opList03] 267type=OpDesc 268issueLat=1 269opClass=SimdCmp 270opLat=1 271 272[system.cpu.fuPool.FUList5.opList04] 273type=OpDesc 274issueLat=1 275opClass=SimdCvt 276opLat=1 277 278[system.cpu.fuPool.FUList5.opList05] 279type=OpDesc 280issueLat=1 281opClass=SimdMisc 282opLat=1 283 284[system.cpu.fuPool.FUList5.opList06] 285type=OpDesc 286issueLat=1 287opClass=SimdMult 288opLat=1 289 290[system.cpu.fuPool.FUList5.opList07] 291type=OpDesc 292issueLat=1 293opClass=SimdMultAcc 294opLat=1 295 296[system.cpu.fuPool.FUList5.opList08] 297type=OpDesc 298issueLat=1 299opClass=SimdShift 300opLat=1 301 302[system.cpu.fuPool.FUList5.opList09] 303type=OpDesc 304issueLat=1 305opClass=SimdShiftAcc 306opLat=1 307 308[system.cpu.fuPool.FUList5.opList10] 309type=OpDesc 310issueLat=1 311opClass=SimdSqrt 312opLat=1 313 314[system.cpu.fuPool.FUList5.opList11] 315type=OpDesc 316issueLat=1 317opClass=SimdFloatAdd 318opLat=1 319 320[system.cpu.fuPool.FUList5.opList12] 321type=OpDesc 322issueLat=1 323opClass=SimdFloatAlu 324opLat=1 325 326[system.cpu.fuPool.FUList5.opList13] 327type=OpDesc 328issueLat=1 329opClass=SimdFloatCmp 330opLat=1 331 332[system.cpu.fuPool.FUList5.opList14] 333type=OpDesc 334issueLat=1 335opClass=SimdFloatCvt 336opLat=1 337 338[system.cpu.fuPool.FUList5.opList15] 339type=OpDesc 340issueLat=1 341opClass=SimdFloatDiv 342opLat=1 343 344[system.cpu.fuPool.FUList5.opList16] 345type=OpDesc 346issueLat=1 347opClass=SimdFloatMisc 348opLat=1 349 350[system.cpu.fuPool.FUList5.opList17] 351type=OpDesc 352issueLat=1 353opClass=SimdFloatMult 354opLat=1 355 356[system.cpu.fuPool.FUList5.opList18] 357type=OpDesc 358issueLat=1 359opClass=SimdFloatMultAcc 360opLat=1 361 362[system.cpu.fuPool.FUList5.opList19] 363type=OpDesc 364issueLat=1 365opClass=SimdFloatSqrt 366opLat=1 367 368[system.cpu.fuPool.FUList6] 369type=FUDesc 370children=opList 371count=0 372opList=system.cpu.fuPool.FUList6.opList 373 374[system.cpu.fuPool.FUList6.opList] 375type=OpDesc 376issueLat=1 377opClass=MemWrite 378opLat=1 379 380[system.cpu.fuPool.FUList7] 381type=FUDesc 382children=opList0 opList1 383count=4 384opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1 385 386[system.cpu.fuPool.FUList7.opList0] 387type=OpDesc 388issueLat=1 389opClass=MemRead 390opLat=1 391 392[system.cpu.fuPool.FUList7.opList1] 393type=OpDesc 394issueLat=1 395opClass=MemWrite 396opLat=1 397 398[system.cpu.fuPool.FUList8] 399type=FUDesc 400children=opList 401count=1 402opList=system.cpu.fuPool.FUList8.opList 403 404[system.cpu.fuPool.FUList8.opList] 405type=OpDesc 406issueLat=3 407opClass=IprAccess 408opLat=3 409 410[system.cpu.icache] 411type=BaseCache 412addr_range=0:18446744073709551615 413assoc=2 414block_size=64 415forward_snoops=true 416hash_delay=1 417latency=1000 418max_miss_count=0 419mshrs=10 420num_cpus=1 421prefetch_data_accesses_only=false 422prefetch_degree=1 423prefetch_latency=10000 424prefetch_on_access=false 425prefetch_past_page=false 426prefetch_policy=none 427prefetch_serial_squash=false 428prefetch_use_cpu_id=true 429prefetcher_size=100 430prioritizeRequests=false 431repl=Null 432size=131072 433subblock_size=0 434tgts_per_mshr=20 435trace_addr=0 436two_queue=false 437write_buffers=8 438cpu_side=system.cpu.icache_port 439mem_side=system.cpu.toL2Bus.port[0] 440 441[system.cpu.itb] 442type=PowerTLB 443size=64 444 445[system.cpu.l2cache] 446type=BaseCache 447addr_range=0:18446744073709551615 448assoc=2 449block_size=64 450forward_snoops=true 451hash_delay=1 452latency=1000 453max_miss_count=0 454mshrs=10 455num_cpus=1 456prefetch_data_accesses_only=false 457prefetch_degree=1 458prefetch_latency=10000 459prefetch_on_access=false 460prefetch_past_page=false 461prefetch_policy=none 462prefetch_serial_squash=false 463prefetch_use_cpu_id=true 464prefetcher_size=100 465prioritizeRequests=false 466repl=Null 467size=2097152 468subblock_size=0 469tgts_per_mshr=5 470trace_addr=0 471two_queue=false 472write_buffers=8 473cpu_side=system.cpu.toL2Bus.port[2] 474mem_side=system.membus.port[1] 475 476[system.cpu.toL2Bus] 477type=Bus 478block_size=64 479bus_id=0 480clock=1000 481header_cycles=1 482use_default_range=false 483width=64 484port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side 485 486[system.cpu.tracer] 487type=ExeTracer 488 489[system.cpu.workload] 490type=LiveProcess 491cmd=hello 492cwd= 493egid=100 494env= 495errout=cerr 496euid=100 497executable=/dist/m5/regression/test-progs/hello/bin/power/linux/hello 498gid=100 499input=cin 500max_stack_size=67108864 501output=cout 502pid=100 503ppid=99 504simpoint=0 505system=system 506uid=100 507 508[system.membus] 509type=Bus 510block_size=64 511bus_id=0 512clock=1000 513header_cycles=1 514use_default_range=false 515width=64 516port=system.physmem.port[0] system.cpu.l2cache.mem_side 517 518[system.physmem] 519type=PhysicalMemory 520file= 521latency=30000 522latency_var=0 523null=false 524range=0:134217727 525zero=false 526port=system.membus.port[0] 527 528