config.ini revision 11440
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain 17eventq_index=0 18exit_on_work_items=false 19init_param=0 20kernel= 21kernel_addr_check=true 22load_addr_mask=1099511627775 23load_offset=0 24mem_mode=timing 25mem_ranges= 26memories=system.physmem 27mmap_using_noreserve=false 28multi_thread=false 29num_work_ids=16 30readfile= 31symbolfile= 32thermal_components= 33thermal_model=Null 34work_begin_ckpt_count=0 35work_begin_cpu_id_exit=-1 36work_begin_exit_count=0 37work_cpus_ckpt_count=0 38work_end_ckpt_count=0 39work_end_exit_count=0 40work_item_id=-1 41system_port=system.membus.slave[0] 42 43[system.clk_domain] 44type=SrcClockDomain 45clock=1000 46domain_id=-1 47eventq_index=0 48init_perf_level=0 49voltage_domain=system.voltage_domain 50 51[system.cpu] 52type=TimingSimpleCPU 53children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload 54branchPred=Null 55checker=Null 56clk_domain=system.cpu_clk_domain 57cpu_id=0 58do_checkpoint_insts=true 59do_quiesce=true 60do_statistics_insts=true 61dtb=system.cpu.dtb 62eventq_index=0 63function_trace=false 64function_trace_start=0 65interrupts=system.cpu.interrupts 66isa=system.cpu.isa 67itb=system.cpu.itb 68max_insts_all_threads=0 69max_insts_any_thread=0 70max_loads_all_threads=0 71max_loads_any_thread=0 72numThreads=1 73profile=0 74progress_interval=0 75simpoint_start_insts= 76socket_id=0 77switched_out=false 78system=system 79tracer=system.cpu.tracer 80workload=system.cpu.workload 81dcache_port=system.cpu.dcache.cpu_side 82icache_port=system.cpu.icache.cpu_side 83 84[system.cpu.dcache] 85type=Cache 86children=tags 87addr_ranges=0:18446744073709551615 88assoc=2 89clk_domain=system.cpu_clk_domain 90clusivity=mostly_incl 91demand_mshr_reserve=1 92eventq_index=0 93hit_latency=2 94is_read_only=false 95max_miss_count=0 96mshrs=4 97prefetch_on_access=false 98prefetcher=Null 99response_latency=2 100sequential_access=false 101size=262144 102system=system 103tags=system.cpu.dcache.tags 104tgts_per_mshr=20 105write_buffers=8 106writeback_clean=false 107cpu_side=system.cpu.dcache_port 108mem_side=system.cpu.toL2Bus.slave[1] 109 110[system.cpu.dcache.tags] 111type=LRU 112assoc=2 113block_size=64 114clk_domain=system.cpu_clk_domain 115eventq_index=0 116hit_latency=2 117sequential_access=false 118size=262144 119 120[system.cpu.dtb] 121type=MipsTLB 122eventq_index=0 123size=64 124 125[system.cpu.icache] 126type=Cache 127children=tags 128addr_ranges=0:18446744073709551615 129assoc=2 130clk_domain=system.cpu_clk_domain 131clusivity=mostly_incl 132demand_mshr_reserve=1 133eventq_index=0 134hit_latency=2 135is_read_only=true 136max_miss_count=0 137mshrs=4 138prefetch_on_access=false 139prefetcher=Null 140response_latency=2 141sequential_access=false 142size=131072 143system=system 144tags=system.cpu.icache.tags 145tgts_per_mshr=20 146write_buffers=8 147writeback_clean=true 148cpu_side=system.cpu.icache_port 149mem_side=system.cpu.toL2Bus.slave[0] 150 151[system.cpu.icache.tags] 152type=LRU 153assoc=2 154block_size=64 155clk_domain=system.cpu_clk_domain 156eventq_index=0 157hit_latency=2 158sequential_access=false 159size=131072 160 161[system.cpu.interrupts] 162type=MipsInterrupts 163eventq_index=0 164 165[system.cpu.isa] 166type=MipsISA 167eventq_index=0 168num_threads=1 169num_vpes=1 170system=system 171 172[system.cpu.itb] 173type=MipsTLB 174eventq_index=0 175size=64 176 177[system.cpu.l2cache] 178type=Cache 179children=tags 180addr_ranges=0:18446744073709551615 181assoc=8 182clk_domain=system.cpu_clk_domain 183clusivity=mostly_incl 184demand_mshr_reserve=1 185eventq_index=0 186hit_latency=20 187is_read_only=false 188max_miss_count=0 189mshrs=20 190prefetch_on_access=false 191prefetcher=Null 192response_latency=20 193sequential_access=false 194size=2097152 195system=system 196tags=system.cpu.l2cache.tags 197tgts_per_mshr=12 198write_buffers=8 199writeback_clean=false 200cpu_side=system.cpu.toL2Bus.master[0] 201mem_side=system.membus.slave[1] 202 203[system.cpu.l2cache.tags] 204type=LRU 205assoc=8 206block_size=64 207clk_domain=system.cpu_clk_domain 208eventq_index=0 209hit_latency=20 210sequential_access=false 211size=2097152 212 213[system.cpu.toL2Bus] 214type=CoherentXBar 215children=snoop_filter 216clk_domain=system.cpu_clk_domain 217eventq_index=0 218forward_latency=0 219frontend_latency=1 220point_of_coherency=false 221response_latency=1 222snoop_filter=system.cpu.toL2Bus.snoop_filter 223snoop_response_latency=1 224system=system 225use_default_range=false 226width=32 227master=system.cpu.l2cache.cpu_side 228slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side 229 230[system.cpu.toL2Bus.snoop_filter] 231type=SnoopFilter 232eventq_index=0 233lookup_latency=0 234max_capacity=8388608 235system=system 236 237[system.cpu.tracer] 238type=ExeTracer 239eventq_index=0 240 241[system.cpu.workload] 242type=LiveProcess 243cmd=hello 244cwd= 245drivers= 246egid=100 247env= 248errout=cerr 249euid=100 250eventq_index=0 251executable=/home/stever/hg/m5sim.org/gem5/tests/test-progs/hello/bin/mips/linux/hello 252gid=100 253input=cin 254kvmInSE=false 255max_stack_size=67108864 256output=cout 257pid=100 258ppid=99 259simpoint=0 260system=system 261uid=100 262useArchPT=false 263 264[system.cpu_clk_domain] 265type=SrcClockDomain 266clock=500 267domain_id=-1 268eventq_index=0 269init_perf_level=0 270voltage_domain=system.voltage_domain 271 272[system.dvfs_handler] 273type=DVFSHandler 274domains= 275enable=false 276eventq_index=0 277sys_clk_domain=system.clk_domain 278transition_latency=100000000 279 280[system.membus] 281type=CoherentXBar 282clk_domain=system.clk_domain 283eventq_index=0 284forward_latency=4 285frontend_latency=3 286point_of_coherency=true 287response_latency=2 288snoop_filter=Null 289snoop_response_latency=4 290system=system 291use_default_range=false 292width=16 293master=system.physmem.port 294slave=system.system_port system.cpu.l2cache.mem_side 295 296[system.physmem] 297type=SimpleMemory 298bandwidth=73.000000 299clk_domain=system.clk_domain 300conf_table_reported=true 301eventq_index=0 302in_addr_map=true 303latency=30000 304latency_var=0 305null=false 306range=0:134217727 307port=system.membus.master[0] 308 309[system.voltage_domain] 310type=VoltageDomain 311eventq_index=0 312voltage=1.000000 313 314