config.ini revision 10451
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain 17eventq_index=0 18init_param=0 19kernel= 20kernel_addr_check=true 21load_addr_mask=1099511627775 22load_offset=0 23mem_mode=timing 24mem_ranges= 25memories=system.physmem 26num_work_ids=16 27readfile= 28symbolfile= 29work_begin_ckpt_count=0 30work_begin_cpu_id_exit=-1 31work_begin_exit_count=0 32work_cpus_ckpt_count=0 33work_end_ckpt_count=0 34work_end_exit_count=0 35work_item_id=-1 36system_port=system.membus.slave[0] 37 38[system.clk_domain] 39type=SrcClockDomain 40clock=1000 41domain_id=-1 42eventq_index=0 43init_perf_level=0 44voltage_domain=system.voltage_domain 45 46[system.cpu] 47type=TimingSimpleCPU 48children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload 49branchPred=Null 50checker=Null 51clk_domain=system.cpu_clk_domain 52cpu_id=0 53do_checkpoint_insts=true 54do_quiesce=true 55do_statistics_insts=true 56dtb=system.cpu.dtb 57eventq_index=0 58function_trace=false 59function_trace_start=0 60interrupts=system.cpu.interrupts 61isa=system.cpu.isa 62itb=system.cpu.itb 63max_insts_all_threads=0 64max_insts_any_thread=0 65max_loads_all_threads=0 66max_loads_any_thread=0 67numThreads=1 68profile=0 69progress_interval=0 70simpoint_start_insts= 71socket_id=0 72switched_out=false 73system=system 74tracer=system.cpu.tracer 75workload=system.cpu.workload 76dcache_port=system.cpu.dcache.cpu_side 77icache_port=system.cpu.icache.cpu_side 78 79[system.cpu.dcache] 80type=BaseCache 81children=tags 82addr_ranges=0:18446744073709551615 83assoc=2 84clk_domain=system.cpu_clk_domain 85eventq_index=0 86forward_snoops=true 87hit_latency=2 88is_top_level=true 89max_miss_count=0 90mshrs=4 91prefetch_on_access=false 92prefetcher=Null 93response_latency=2 94sequential_access=false 95size=262144 96system=system 97tags=system.cpu.dcache.tags 98tgts_per_mshr=20 99two_queue=false 100write_buffers=8 101cpu_side=system.cpu.dcache_port 102mem_side=system.cpu.toL2Bus.slave[1] 103 104[system.cpu.dcache.tags] 105type=LRU 106assoc=2 107block_size=64 108clk_domain=system.cpu_clk_domain 109eventq_index=0 110hit_latency=2 111sequential_access=false 112size=262144 113 114[system.cpu.dtb] 115type=MipsTLB 116eventq_index=0 117size=64 118 119[system.cpu.icache] 120type=BaseCache 121children=tags 122addr_ranges=0:18446744073709551615 123assoc=2 124clk_domain=system.cpu_clk_domain 125eventq_index=0 126forward_snoops=true 127hit_latency=2 128is_top_level=true 129max_miss_count=0 130mshrs=4 131prefetch_on_access=false 132prefetcher=Null 133response_latency=2 134sequential_access=false 135size=131072 136system=system 137tags=system.cpu.icache.tags 138tgts_per_mshr=20 139two_queue=false 140write_buffers=8 141cpu_side=system.cpu.icache_port 142mem_side=system.cpu.toL2Bus.slave[0] 143 144[system.cpu.icache.tags] 145type=LRU 146assoc=2 147block_size=64 148clk_domain=system.cpu_clk_domain 149eventq_index=0 150hit_latency=2 151sequential_access=false 152size=131072 153 154[system.cpu.interrupts] 155type=MipsInterrupts 156eventq_index=0 157 158[system.cpu.isa] 159type=MipsISA 160eventq_index=0 161num_threads=1 162num_vpes=1 163system=system 164 165[system.cpu.itb] 166type=MipsTLB 167eventq_index=0 168size=64 169 170[system.cpu.l2cache] 171type=BaseCache 172children=tags 173addr_ranges=0:18446744073709551615 174assoc=8 175clk_domain=system.cpu_clk_domain 176eventq_index=0 177forward_snoops=true 178hit_latency=20 179is_top_level=false 180max_miss_count=0 181mshrs=20 182prefetch_on_access=false 183prefetcher=Null 184response_latency=20 185sequential_access=false 186size=2097152 187system=system 188tags=system.cpu.l2cache.tags 189tgts_per_mshr=12 190two_queue=false 191write_buffers=8 192cpu_side=system.cpu.toL2Bus.master[0] 193mem_side=system.membus.slave[1] 194 195[system.cpu.l2cache.tags] 196type=LRU 197assoc=8 198block_size=64 199clk_domain=system.cpu_clk_domain 200eventq_index=0 201hit_latency=20 202sequential_access=false 203size=2097152 204 205[system.cpu.toL2Bus] 206type=CoherentXBar 207clk_domain=system.cpu_clk_domain 208eventq_index=0 209header_cycles=1 210snoop_filter=Null 211system=system 212use_default_range=false 213width=32 214master=system.cpu.l2cache.cpu_side 215slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side 216 217[system.cpu.tracer] 218type=ExeTracer 219eventq_index=0 220 221[system.cpu.workload] 222type=LiveProcess 223cmd=hello 224cwd= 225egid=100 226env= 227errout=cerr 228euid=100 229eventq_index=0 230executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/mips/linux/hello 231gid=100 232input=cin 233max_stack_size=67108864 234output=cout 235pid=100 236ppid=99 237simpoint=0 238system=system 239uid=100 240useArchPT=false 241 242[system.cpu_clk_domain] 243type=SrcClockDomain 244clock=500 245domain_id=-1 246eventq_index=0 247init_perf_level=0 248voltage_domain=system.voltage_domain 249 250[system.dvfs_handler] 251type=DVFSHandler 252domains= 253enable=false 254eventq_index=0 255sys_clk_domain=system.clk_domain 256transition_latency=100000000 257 258[system.membus] 259type=CoherentXBar 260clk_domain=system.clk_domain 261eventq_index=0 262header_cycles=1 263snoop_filter=Null 264system=system 265use_default_range=false 266width=8 267master=system.physmem.port 268slave=system.system_port system.cpu.l2cache.mem_side 269 270[system.physmem] 271type=SimpleMemory 272bandwidth=73.000000 273clk_domain=system.clk_domain 274conf_table_reported=true 275eventq_index=0 276in_addr_map=true 277latency=30000 278latency_var=0 279null=false 280range=0:134217727 281port=system.membus.master[0] 282 283[system.voltage_domain] 284type=VoltageDomain 285eventq_index=0 286voltage=1.000000 287 288