config.ini revision 4938
110447Snilay@cs.wisc.edu[root] 210447Snilay@cs.wisc.edutype=Root 310447Snilay@cs.wisc.educhildren=system 410447Snilay@cs.wisc.edudummy=0 510447Snilay@cs.wisc.edu 610447Snilay@cs.wisc.edu[system] 710447Snilay@cs.wisc.edutype=System 810447Snilay@cs.wisc.educhildren=cpu membus physmem 910447Snilay@cs.wisc.edumem_mode=atomic 1010447Snilay@cs.wisc.eduphysmem=system.physmem 1110447Snilay@cs.wisc.edu 1210447Snilay@cs.wisc.edu[system.cpu] 1310447Snilay@cs.wisc.edutype=TimingSimpleCPU 1410447Snilay@cs.wisc.educhildren=dcache icache l2cache toL2Bus tracer workload 1510447Snilay@cs.wisc.educlock=500 1610447Snilay@cs.wisc.educpu_id=0 1710447Snilay@cs.wisc.edudefer_registration=false 1810447Snilay@cs.wisc.edufunction_trace=false 1910447Snilay@cs.wisc.edufunction_trace_start=0 2010447Snilay@cs.wisc.edumax_insts_all_threads=0 2110447Snilay@cs.wisc.edumax_insts_any_thread=0 2210447Snilay@cs.wisc.edumax_loads_all_threads=0 2310447Snilay@cs.wisc.edumax_loads_any_thread=0 2410447Snilay@cs.wisc.eduphase=0 2510447Snilay@cs.wisc.eduprogress_interval=0 2610447Snilay@cs.wisc.edusystem=system 2710447Snilay@cs.wisc.edutracer=system.cpu.tracer 2810447Snilay@cs.wisc.eduworkload=system.cpu.workload 2910447Snilay@cs.wisc.edudcache_port=system.cpu.dcache.cpu_side 3010447Snilay@cs.wisc.eduicache_port=system.cpu.icache.cpu_side 3110447Snilay@cs.wisc.edu 3210447Snilay@cs.wisc.edu[system.cpu.dcache] 3310447Snilay@cs.wisc.edutype=BaseCache 34addr_range=0:18446744073709551615 35assoc=2 36block_size=64 37hash_delay=1 38latency=1000 39lifo=false 40max_miss_count=0 41mshrs=10 42prefetch_access=false 43prefetch_cache_check_push=true 44prefetch_data_accesses_only=false 45prefetch_degree=1 46prefetch_latency=10000 47prefetch_miss=false 48prefetch_past_page=false 49prefetch_policy=none 50prefetch_serial_squash=false 51prefetch_use_cpu_id=true 52prefetcher_size=100 53prioritizeRequests=false 54repl=Null 55size=262144 56split=false 57split_size=0 58subblock_size=0 59tgts_per_mshr=5 60trace_addr=0 61two_queue=false 62write_buffers=8 63cpu_side=system.cpu.dcache_port 64mem_side=system.cpu.toL2Bus.port[1] 65 66[system.cpu.icache] 67type=BaseCache 68addr_range=0:18446744073709551615 69assoc=2 70block_size=64 71hash_delay=1 72latency=1000 73lifo=false 74max_miss_count=0 75mshrs=10 76prefetch_access=false 77prefetch_cache_check_push=true 78prefetch_data_accesses_only=false 79prefetch_degree=1 80prefetch_latency=10000 81prefetch_miss=false 82prefetch_past_page=false 83prefetch_policy=none 84prefetch_serial_squash=false 85prefetch_use_cpu_id=true 86prefetcher_size=100 87prioritizeRequests=false 88repl=Null 89size=131072 90split=false 91split_size=0 92subblock_size=0 93tgts_per_mshr=5 94trace_addr=0 95two_queue=false 96write_buffers=8 97cpu_side=system.cpu.icache_port 98mem_side=system.cpu.toL2Bus.port[0] 99 100[system.cpu.l2cache] 101type=BaseCache 102addr_range=0:18446744073709551615 103assoc=2 104block_size=64 105hash_delay=1 106latency=10000 107lifo=false 108max_miss_count=0 109mshrs=10 110prefetch_access=false 111prefetch_cache_check_push=true 112prefetch_data_accesses_only=false 113prefetch_degree=1 114prefetch_latency=100000 115prefetch_miss=false 116prefetch_past_page=false 117prefetch_policy=none 118prefetch_serial_squash=false 119prefetch_use_cpu_id=true 120prefetcher_size=100 121prioritizeRequests=false 122repl=Null 123size=2097152 124split=false 125split_size=0 126subblock_size=0 127tgts_per_mshr=5 128trace_addr=0 129two_queue=false 130write_buffers=8 131cpu_side=system.cpu.toL2Bus.port[2] 132mem_side=system.membus.port[1] 133 134[system.cpu.toL2Bus] 135type=Bus 136block_size=64 137bus_id=0 138clock=1000 139responder_set=false 140width=64 141port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side 142 143[system.cpu.tracer] 144type=ExeTracer 145 146[system.cpu.workload] 147type=LiveProcess 148cmd=hello 149cwd= 150egid=100 151env= 152euid=100 153executable=tests/test-progs/hello/bin/mips/linux/hello 154gid=100 155input=cin 156output=cout 157pid=100 158ppid=99 159system=system 160uid=100 161 162[system.membus] 163type=Bus 164block_size=64 165bus_id=0 166clock=1000 167responder_set=false 168width=64 169port=system.physmem.port[0] system.cpu.l2cache.mem_side 170 171[system.physmem] 172type=PhysicalMemory 173file= 174latency=1 175range=0:134217727 176zero=false 177port=system.membus.port[0] 178 179