stats.txt revision 11390
13006SN/A 23006SN/A---------- Begin Simulation Statistics ---------- 34398SN/Asim_seconds 0.000003 # Number of seconds simulated 411390Ssteve.reinhardt@amd.comsim_ticks 2820500 # Number of ticks simulated 511390Ssteve.reinhardt@amd.comfinal_tick 2820500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 68540SN/Asim_freq 1000000000000 # Frequency of simulated ticks 711390Ssteve.reinhardt@amd.comhost_inst_rate 42403 # Simulator instruction rate (inst/s) 811390Ssteve.reinhardt@amd.comhost_op_rate 42398 # Simulator op (including micro ops) rate (op/s) 911390Ssteve.reinhardt@amd.comhost_tick_rate 21196256 # Simulator tick rate (ticks/s) 1011390Ssteve.reinhardt@amd.comhost_mem_usage 214708 # Number of bytes of host memory used 1111390Ssteve.reinhardt@amd.comhost_seconds 0.13 # Real time elapsed on the host 1211390Ssteve.reinhardt@amd.comsim_insts 5641 # Number of instructions simulated 1311390Ssteve.reinhardt@amd.comsim_ops 5641 # Number of ops (including micro ops) simulated 1410036SAli.Saidi@ARM.comsystem.voltage_domain.voltage 1 # Voltage in Volts 1510036SAli.Saidi@ARM.comsystem.clk_domain.clock 1000 # Clock period in ticks 1611390Ssteve.reinhardt@amd.comsystem.physmem.bytes_read::cpu.inst 22568 # Number of bytes read from this memory 1711390Ssteve.reinhardt@amd.comsystem.physmem.bytes_read::cpu.data 4301 # Number of bytes read from this memory 1811390Ssteve.reinhardt@amd.comsystem.physmem.bytes_read::total 26869 # Number of bytes read from this memory 1911390Ssteve.reinhardt@amd.comsystem.physmem.bytes_inst_read::cpu.inst 22568 # Number of instructions bytes read from this memory 2011390Ssteve.reinhardt@amd.comsystem.physmem.bytes_inst_read::total 22568 # Number of instructions bytes read from this memory 2110488Snilay@cs.wisc.edusystem.physmem.bytes_written::cpu.data 3601 # Number of bytes written to this memory 2210488Snilay@cs.wisc.edusystem.physmem.bytes_written::total 3601 # Number of bytes written to this memory 2311390Ssteve.reinhardt@amd.comsystem.physmem.num_reads::cpu.inst 5642 # Number of read requests responded to by this memory 2411390Ssteve.reinhardt@amd.comsystem.physmem.num_reads::cpu.data 1135 # Number of read requests responded to by this memory 2511390Ssteve.reinhardt@amd.comsystem.physmem.num_reads::total 6777 # Number of read requests responded to by this memory 2610488Snilay@cs.wisc.edusystem.physmem.num_writes::cpu.data 901 # Number of write requests responded to by this memory 2710488Snilay@cs.wisc.edusystem.physmem.num_writes::total 901 # Number of write requests responded to by this memory 2811390Ssteve.reinhardt@amd.comsystem.physmem.bw_read::cpu.inst 8001418188 # Total read bandwidth from this memory (bytes/s) 2911390Ssteve.reinhardt@amd.comsystem.physmem.bw_read::cpu.data 1524906931 # Total read bandwidth from this memory (bytes/s) 3011390Ssteve.reinhardt@amd.comsystem.physmem.bw_read::total 9526325120 # Total read bandwidth from this memory (bytes/s) 3111390Ssteve.reinhardt@amd.comsystem.physmem.bw_inst_read::cpu.inst 8001418188 # Instruction read bandwidth from this memory (bytes/s) 3211390Ssteve.reinhardt@amd.comsystem.physmem.bw_inst_read::total 8001418188 # Instruction read bandwidth from this memory (bytes/s) 3311390Ssteve.reinhardt@amd.comsystem.physmem.bw_write::cpu.data 1276723985 # Write bandwidth from this memory (bytes/s) 3411390Ssteve.reinhardt@amd.comsystem.physmem.bw_write::total 1276723985 # Write bandwidth from this memory (bytes/s) 3511390Ssteve.reinhardt@amd.comsystem.physmem.bw_total::cpu.inst 8001418188 # Total bandwidth to/from this memory (bytes/s) 3611390Ssteve.reinhardt@amd.comsystem.physmem.bw_total::cpu.data 2801630917 # Total bandwidth to/from this memory (bytes/s) 3711390Ssteve.reinhardt@amd.comsystem.physmem.bw_total::total 10803049105 # Total bandwidth to/from this memory (bytes/s) 3810036SAli.Saidi@ARM.comsystem.cpu_clk_domain.clock 500 # Clock period in ticks 398540SN/Asystem.cpu.dtb.read_hits 0 # DTB read hits 408540SN/Asystem.cpu.dtb.read_misses 0 # DTB read misses 418540SN/Asystem.cpu.dtb.read_accesses 0 # DTB read accesses 428540SN/Asystem.cpu.dtb.write_hits 0 # DTB write hits 438540SN/Asystem.cpu.dtb.write_misses 0 # DTB write misses 448540SN/Asystem.cpu.dtb.write_accesses 0 # DTB write accesses 455510SN/Asystem.cpu.dtb.hits 0 # DTB hits 465510SN/Asystem.cpu.dtb.misses 0 # DTB misses 478540SN/Asystem.cpu.dtb.accesses 0 # DTB accesses 488540SN/Asystem.cpu.itb.read_hits 0 # DTB read hits 498540SN/Asystem.cpu.itb.read_misses 0 # DTB read misses 508540SN/Asystem.cpu.itb.read_accesses 0 # DTB read accesses 518540SN/Asystem.cpu.itb.write_hits 0 # DTB write hits 528540SN/Asystem.cpu.itb.write_misses 0 # DTB write misses 538540SN/Asystem.cpu.itb.write_accesses 0 # DTB write accesses 545510SN/Asystem.cpu.itb.hits 0 # DTB hits 555510SN/Asystem.cpu.itb.misses 0 # DTB misses 568540SN/Asystem.cpu.itb.accesses 0 # DTB accesses 5710488Snilay@cs.wisc.edusystem.cpu.workload.num_syscalls 7 # Number of system calls 5811390Ssteve.reinhardt@amd.comsystem.cpu.numCycles 5642 # number of cpu cycles simulated 598540SN/Asystem.cpu.numWorkItemsStarted 0 # number of work items this cpu started 607935SN/Asystem.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 6111390Ssteve.reinhardt@amd.comsystem.cpu.committedInsts 5641 # Number of instructions committed 6211390Ssteve.reinhardt@amd.comsystem.cpu.committedOps 5641 # Number of ops (including micro ops) committed 6311390Ssteve.reinhardt@amd.comsystem.cpu.num_int_alu_accesses 4957 # Number of integer alu accesses 648540SN/Asystem.cpu.num_fp_alu_accesses 2 # Number of float alu accesses 6511390Ssteve.reinhardt@amd.comsystem.cpu.num_func_calls 191 # number of times a function call or return occured 6611390Ssteve.reinhardt@amd.comsystem.cpu.num_conditional_control_insts 651 # number of instructions that are conditional controls 6711390Ssteve.reinhardt@amd.comsystem.cpu.num_int_insts 4957 # number of integer instructions 687935SN/Asystem.cpu.num_fp_insts 2 # number of float instructions 6911390Ssteve.reinhardt@amd.comsystem.cpu.num_int_register_reads 7072 # number of times the integer registers were read 7011390Ssteve.reinhardt@amd.comsystem.cpu.num_int_register_writes 3291 # number of times the integer registers were written 717935SN/Asystem.cpu.num_fp_register_reads 3 # number of times the floating registers were read 727935SN/Asystem.cpu.num_fp_register_writes 1 # number of times the floating registers were written 7311390Ssteve.reinhardt@amd.comsystem.cpu.num_mem_refs 2037 # number of memory refs 7411390Ssteve.reinhardt@amd.comsystem.cpu.num_load_insts 1135 # Number of load instructions 7510488Snilay@cs.wisc.edusystem.cpu.num_store_insts 902 # Number of store instructions 767935SN/Asystem.cpu.num_idle_cycles 0 # Number of idle cycles 7711390Ssteve.reinhardt@amd.comsystem.cpu.num_busy_cycles 5642 # Number of busy cycles 788540SN/Asystem.cpu.not_idle_fraction 1 # Percentage of non-idle cycles 798540SN/Asystem.cpu.idle_fraction 0 # Percentage of idle cycles 8011390Ssteve.reinhardt@amd.comsystem.cpu.Branches 886 # Number of branches fetched 8111390Ssteve.reinhardt@amd.comsystem.cpu.op_class::No_OpClass 641 11.36% 11.36% # Class of executed instruction 8211390Ssteve.reinhardt@amd.comsystem.cpu.op_class::IntAlu 2960 52.46% 63.82% # Class of executed instruction 8311390Ssteve.reinhardt@amd.comsystem.cpu.op_class::IntMult 2 0.04% 63.86% # Class of executed instruction 8411390Ssteve.reinhardt@amd.comsystem.cpu.op_class::IntDiv 0 0.00% 63.86% # Class of executed instruction 8511390Ssteve.reinhardt@amd.comsystem.cpu.op_class::FloatAdd 2 0.04% 63.90% # Class of executed instruction 8611390Ssteve.reinhardt@amd.comsystem.cpu.op_class::FloatCmp 0 0.00% 63.90% # Class of executed instruction 8711390Ssteve.reinhardt@amd.comsystem.cpu.op_class::FloatCvt 0 0.00% 63.90% # Class of executed instruction 8811390Ssteve.reinhardt@amd.comsystem.cpu.op_class::FloatMult 0 0.00% 63.90% # Class of executed instruction 8911390Ssteve.reinhardt@amd.comsystem.cpu.op_class::FloatDiv 0 0.00% 63.90% # Class of executed instruction 9011390Ssteve.reinhardt@amd.comsystem.cpu.op_class::FloatSqrt 0 0.00% 63.90% # Class of executed instruction 9111390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdAdd 0 0.00% 63.90% # Class of executed instruction 9211390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdAddAcc 0 0.00% 63.90% # Class of executed instruction 9311390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdAlu 0 0.00% 63.90% # Class of executed instruction 9411390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdCmp 0 0.00% 63.90% # Class of executed instruction 9511390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdCvt 0 0.00% 63.90% # Class of executed instruction 9611390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdMisc 0 0.00% 63.90% # Class of executed instruction 9711390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdMult 0 0.00% 63.90% # Class of executed instruction 9811390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdMultAcc 0 0.00% 63.90% # Class of executed instruction 9911390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdShift 0 0.00% 63.90% # Class of executed instruction 10011390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdShiftAcc 0 0.00% 63.90% # Class of executed instruction 10111390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdSqrt 0 0.00% 63.90% # Class of executed instruction 10211390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdFloatAdd 0 0.00% 63.90% # Class of executed instruction 10311390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdFloatAlu 0 0.00% 63.90% # Class of executed instruction 10411390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdFloatCmp 0 0.00% 63.90% # Class of executed instruction 10511390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdFloatCvt 0 0.00% 63.90% # Class of executed instruction 10611390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdFloatDiv 0 0.00% 63.90% # Class of executed instruction 10711390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdFloatMisc 0 0.00% 63.90% # Class of executed instruction 10811390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdFloatMult 0 0.00% 63.90% # Class of executed instruction 10911390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdFloatMultAcc 0 0.00% 63.90% # Class of executed instruction 11011390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdFloatSqrt 0 0.00% 63.90% # Class of executed instruction 11111390Ssteve.reinhardt@amd.comsystem.cpu.op_class::MemRead 1135 20.12% 84.01% # Class of executed instruction 11211390Ssteve.reinhardt@amd.comsystem.cpu.op_class::MemWrite 902 15.99% 100.00% # Class of executed instruction 11310220Sandreas.hansson@arm.comsystem.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction 11410220Sandreas.hansson@arm.comsystem.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction 11511390Ssteve.reinhardt@amd.comsystem.cpu.op_class::total 5642 # Class of executed instruction 11611390Ssteve.reinhardt@amd.comsystem.membus.trans_dist::ReadReq 6777 # Transaction distribution 11711390Ssteve.reinhardt@amd.comsystem.membus.trans_dist::ReadResp 6777 # Transaction distribution 11811268Satgutier@umich.edusystem.membus.trans_dist::WriteReq 901 # Transaction distribution 11911268Satgutier@umich.edusystem.membus.trans_dist::WriteResp 901 # Transaction distribution 12011390Ssteve.reinhardt@amd.comsystem.membus.pkt_count_system.cpu.icache_port::system.physmem.port 11284 # Packet count per connected master and slave (bytes) 12111390Ssteve.reinhardt@amd.comsystem.membus.pkt_count_system.cpu.dcache_port::system.physmem.port 4072 # Packet count per connected master and slave (bytes) 12211390Ssteve.reinhardt@amd.comsystem.membus.pkt_count::total 15356 # Packet count per connected master and slave (bytes) 12311390Ssteve.reinhardt@amd.comsystem.membus.pkt_size_system.cpu.icache_port::system.physmem.port 22568 # Cumulative packet size per connected master and slave (bytes) 12411390Ssteve.reinhardt@amd.comsystem.membus.pkt_size_system.cpu.dcache_port::system.physmem.port 7902 # Cumulative packet size per connected master and slave (bytes) 12511390Ssteve.reinhardt@amd.comsystem.membus.pkt_size::total 30470 # Cumulative packet size per connected master and slave (bytes) 12611268Satgutier@umich.edusystem.membus.snoops 0 # Total snoops (count) 12711390Ssteve.reinhardt@amd.comsystem.membus.snoop_fanout::samples 7678 # Request fanout histogram 12811390Ssteve.reinhardt@amd.comsystem.membus.snoop_fanout::mean 0.734827 # Request fanout histogram 12911390Ssteve.reinhardt@amd.comsystem.membus.snoop_fanout::stdev 0.441454 # Request fanout histogram 13011268Satgutier@umich.edusystem.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram 13111390Ssteve.reinhardt@amd.comsystem.membus.snoop_fanout::0 2036 26.52% 26.52% # Request fanout histogram 13211390Ssteve.reinhardt@amd.comsystem.membus.snoop_fanout::1 5642 73.48% 100.00% # Request fanout histogram 13311268Satgutier@umich.edusystem.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 13411268Satgutier@umich.edusystem.membus.snoop_fanout::min_value 0 # Request fanout histogram 13511268Satgutier@umich.edusystem.membus.snoop_fanout::max_value 1 # Request fanout histogram 13611390Ssteve.reinhardt@amd.comsystem.membus.snoop_fanout::total 7678 # Request fanout histogram 1373006SN/A 1383006SN/A---------- End Simulation Statistics ---------- 139