config.ini revision 8893
1[root] 2type=Root 3children=system 4full_system=false 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 9[system] 10type=System 11children=cpu membus physmem 12boot_osflags=a 13init_param=0 14kernel= 15load_addr_mask=1099511627775 16mem_mode=atomic 17memories=system.physmem 18num_work_ids=16 19physmem=system.physmem 20readfile= 21symbolfile= 22work_begin_ckpt_count=0 23work_begin_cpu_id_exit=-1 24work_begin_exit_count=0 25work_cpus_ckpt_count=0 26work_end_ckpt_count=0 27work_end_exit_count=0 28work_item_id=-1 29system_port=system.membus.slave[0] 30 31[system.cpu] 32type=TimingSimpleCPU 33children=dcache dtb icache interrupts itb l2cache toL2Bus tracer workload 34checker=Null 35clock=500 36cpu_id=0 37defer_registration=false 38do_checkpoint_insts=true 39do_quiesce=true 40do_statistics_insts=true 41dtb=system.cpu.dtb 42function_trace=false 43function_trace_start=0 44interrupts=system.cpu.interrupts 45itb=system.cpu.itb 46max_insts_all_threads=0 47max_insts_any_thread=0 48max_loads_all_threads=0 49max_loads_any_thread=0 50numThreads=1 51phase=0 52profile=0 53progress_interval=0 54system=system 55tracer=system.cpu.tracer 56workload=system.cpu.workload 57dcache_port=system.cpu.dcache.cpu_side 58icache_port=system.cpu.icache.cpu_side 59 60[system.cpu.dcache] 61type=BaseCache 62addr_ranges=0:18446744073709551615 63assoc=2 64block_size=64 65forward_snoops=true 66hash_delay=1 67is_top_level=true 68latency=1000 69max_miss_count=0 70mshrs=10 71prefetch_on_access=false 72prefetcher=Null 73prioritizeRequests=false 74repl=Null 75size=262144 76subblock_size=0 77system=system 78tgts_per_mshr=5 79trace_addr=0 80two_queue=false 81write_buffers=8 82cpu_side=system.cpu.dcache_port 83mem_side=system.cpu.toL2Bus.slave[1] 84 85[system.cpu.dtb] 86type=ArmTLB 87children=walker 88size=64 89walker=system.cpu.dtb.walker 90 91[system.cpu.dtb.walker] 92type=ArmTableWalker 93max_backoff=100000 94min_backoff=0 95sys=system 96port=system.cpu.toL2Bus.slave[3] 97 98[system.cpu.icache] 99type=BaseCache 100addr_ranges=0:18446744073709551615 101assoc=2 102block_size=64 103forward_snoops=true 104hash_delay=1 105is_top_level=true 106latency=1000 107max_miss_count=0 108mshrs=10 109prefetch_on_access=false 110prefetcher=Null 111prioritizeRequests=false 112repl=Null 113size=131072 114subblock_size=0 115system=system 116tgts_per_mshr=5 117trace_addr=0 118two_queue=false 119write_buffers=8 120cpu_side=system.cpu.icache_port 121mem_side=system.cpu.toL2Bus.slave[0] 122 123[system.cpu.interrupts] 124type=ArmInterrupts 125 126[system.cpu.itb] 127type=ArmTLB 128children=walker 129size=64 130walker=system.cpu.itb.walker 131 132[system.cpu.itb.walker] 133type=ArmTableWalker 134max_backoff=100000 135min_backoff=0 136sys=system 137port=system.cpu.toL2Bus.slave[2] 138 139[system.cpu.l2cache] 140type=BaseCache 141addr_ranges=0:18446744073709551615 142assoc=2 143block_size=64 144forward_snoops=true 145hash_delay=1 146is_top_level=false 147latency=10000 148max_miss_count=0 149mshrs=10 150prefetch_on_access=false 151prefetcher=Null 152prioritizeRequests=false 153repl=Null 154size=2097152 155subblock_size=0 156system=system 157tgts_per_mshr=5 158trace_addr=0 159two_queue=false 160write_buffers=8 161cpu_side=system.cpu.toL2Bus.master[0] 162mem_side=system.membus.slave[1] 163 164[system.cpu.toL2Bus] 165type=Bus 166block_size=64 167bus_id=0 168clock=1000 169header_cycles=1 170use_default_range=false 171width=64 172master=system.cpu.l2cache.cpu_side 173slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port 174 175[system.cpu.tracer] 176type=ExeTracer 177 178[system.cpu.workload] 179type=LiveProcess 180cmd=hello 181cwd= 182egid=100 183env= 184errout=cerr 185euid=100 186executable=/dist/m5/regression/test-progs/hello/bin/arm/linux/hello 187gid=100 188input=cin 189max_stack_size=67108864 190output=cout 191pid=100 192ppid=99 193simpoint=0 194system=system 195uid=100 196 197[system.membus] 198type=Bus 199block_size=64 200bus_id=0 201clock=1000 202header_cycles=1 203use_default_range=false 204width=64 205master=system.physmem.port[0] 206slave=system.system_port system.cpu.l2cache.mem_side 207 208[system.physmem] 209type=PhysicalMemory 210file= 211latency=30000 212latency_var=0 213null=false 214range=0:134217727 215zero=false 216port=system.membus.master[0] 217 218