simout revision 11103
111103Snilay@cs.wisc.eduRedirecting stdout to build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker/simout 211103Snilay@cs.wisc.eduRedirecting stderr to build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker/simerr 38889Sgeoffrey.blake@arm.comgem5 Simulator System. http://gem5.org 48889Sgeoffrey.blake@arm.comgem5 is copyrighted software; use the --copyright option for details. 58889Sgeoffrey.blake@arm.com 611103Snilay@cs.wisc.edugem5 compiled Sep 14 2015 23:29:19 711103Snilay@cs.wisc.edugem5 started Sep 14 2015 23:30:05 811103Snilay@cs.wisc.edugem5 executing on ribera.cs.wisc.edu 911103Snilay@cs.wisc.educommand line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker 1010798Ssteve.reinhardt@amd.com 118889Sgeoffrey.blake@arm.comGlobal frequency set at 1000000000000 ticks per second 128889Sgeoffrey.blake@arm.cominfo: Entering event queue @ 0. Starting simulation... 138889Sgeoffrey.blake@arm.comHello world! 1411103Snilay@cs.wisc.eduExiting @ tick 17163000 because target called exit() 15