simout revision 10242
110242Ssteve.reinhardt@amd.comRedirecting stdout to build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker/simout 210242Ssteve.reinhardt@amd.comRedirecting stderr to build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker/simerr 38889Sgeoffrey.blake@arm.comgem5 Simulator System. http://gem5.org 48889Sgeoffrey.blake@arm.comgem5 is copyrighted software; use the --copyright option for details. 58889Sgeoffrey.blake@arm.com 610242Ssteve.reinhardt@amd.comgem5 compiled Jun 21 2014 11:22:42 710242Ssteve.reinhardt@amd.comgem5 started Jun 21 2014 11:25:19 810242Ssteve.reinhardt@amd.comgem5 executing on phenom 910242Ssteve.reinhardt@amd.comcommand line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker 108889Sgeoffrey.blake@arm.comGlobal frequency set at 1000000000000 ticks per second 1110242Ssteve.reinhardt@amd.com 0: system.cpu.checker.isa: ISA system set to: 0 0x54ee6d0 1210242Ssteve.reinhardt@amd.com 0: system.cpu.isa: ISA system set to: 0 0x54ee6d0 138889Sgeoffrey.blake@arm.cominfo: Entering event queue @ 0. Starting simulation... 148889Sgeoffrey.blake@arm.comHello world! 1510242Ssteve.reinhardt@amd.comExiting @ tick 16786000 because target called exit() 16