config.ini revision 11390
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain 17eventq_index=0 18exit_on_work_items=false 19init_param=0 20kernel= 21kernel_addr_check=true 22load_addr_mask=1099511627775 23load_offset=0 24mem_mode=timing 25mem_ranges= 26memories=system.physmem 27mmap_using_noreserve=false 28multi_thread=false 29num_work_ids=16 30readfile= 31symbolfile= 32work_begin_ckpt_count=0 33work_begin_cpu_id_exit=-1 34work_begin_exit_count=0 35work_cpus_ckpt_count=0 36work_end_ckpt_count=0 37work_end_exit_count=0 38work_item_id=-1 39system_port=system.membus.slave[0] 40 41[system.clk_domain] 42type=SrcClockDomain 43clock=1000 44domain_id=-1 45eventq_index=0 46init_perf_level=0 47voltage_domain=system.voltage_domain 48 49[system.cpu] 50type=TimingSimpleCPU 51children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload 52branchPred=Null 53checker=Null 54clk_domain=system.cpu_clk_domain 55cpu_id=0 56do_checkpoint_insts=true 57do_quiesce=true 58do_statistics_insts=true 59dtb=system.cpu.dtb 60eventq_index=0 61function_trace=false 62function_trace_start=0 63interrupts=system.cpu.interrupts 64isa=system.cpu.isa 65itb=system.cpu.itb 66max_insts_all_threads=0 67max_insts_any_thread=0 68max_loads_all_threads=0 69max_loads_any_thread=0 70numThreads=1 71profile=0 72progress_interval=0 73simpoint_start_insts= 74socket_id=0 75switched_out=false 76system=system 77tracer=system.cpu.tracer 78workload=system.cpu.workload 79dcache_port=system.cpu.dcache.cpu_side 80icache_port=system.cpu.icache.cpu_side 81 82[system.cpu.dcache] 83type=Cache 84children=tags 85addr_ranges=0:18446744073709551615 86assoc=2 87clk_domain=system.cpu_clk_domain 88clusivity=mostly_incl 89demand_mshr_reserve=1 90eventq_index=0 91hit_latency=2 92is_read_only=false 93max_miss_count=0 94mshrs=4 95prefetch_on_access=false 96prefetcher=Null 97response_latency=2 98sequential_access=false 99size=262144 100system=system 101tags=system.cpu.dcache.tags 102tgts_per_mshr=20 103write_buffers=8 104writeback_clean=false 105cpu_side=system.cpu.dcache_port 106mem_side=system.cpu.toL2Bus.slave[1] 107 108[system.cpu.dcache.tags] 109type=LRU 110assoc=2 111block_size=64 112clk_domain=system.cpu_clk_domain 113eventq_index=0 114hit_latency=2 115sequential_access=false 116size=262144 117 118[system.cpu.dtb] 119type=AlphaTLB 120eventq_index=0 121size=64 122 123[system.cpu.icache] 124type=Cache 125children=tags 126addr_ranges=0:18446744073709551615 127assoc=2 128clk_domain=system.cpu_clk_domain 129clusivity=mostly_incl 130demand_mshr_reserve=1 131eventq_index=0 132hit_latency=2 133is_read_only=true 134max_miss_count=0 135mshrs=4 136prefetch_on_access=false 137prefetcher=Null 138response_latency=2 139sequential_access=false 140size=131072 141system=system 142tags=system.cpu.icache.tags 143tgts_per_mshr=20 144write_buffers=8 145writeback_clean=true 146cpu_side=system.cpu.icache_port 147mem_side=system.cpu.toL2Bus.slave[0] 148 149[system.cpu.icache.tags] 150type=LRU 151assoc=2 152block_size=64 153clk_domain=system.cpu_clk_domain 154eventq_index=0 155hit_latency=2 156sequential_access=false 157size=131072 158 159[system.cpu.interrupts] 160type=AlphaInterrupts 161eventq_index=0 162 163[system.cpu.isa] 164type=AlphaISA 165eventq_index=0 166system=system 167 168[system.cpu.itb] 169type=AlphaTLB 170eventq_index=0 171size=48 172 173[system.cpu.l2cache] 174type=Cache 175children=tags 176addr_ranges=0:18446744073709551615 177assoc=8 178clk_domain=system.cpu_clk_domain 179clusivity=mostly_incl 180demand_mshr_reserve=1 181eventq_index=0 182hit_latency=20 183is_read_only=false 184max_miss_count=0 185mshrs=20 186prefetch_on_access=false 187prefetcher=Null 188response_latency=20 189sequential_access=false 190size=2097152 191system=system 192tags=system.cpu.l2cache.tags 193tgts_per_mshr=12 194write_buffers=8 195writeback_clean=false 196cpu_side=system.cpu.toL2Bus.master[0] 197mem_side=system.membus.slave[1] 198 199[system.cpu.l2cache.tags] 200type=LRU 201assoc=8 202block_size=64 203clk_domain=system.cpu_clk_domain 204eventq_index=0 205hit_latency=20 206sequential_access=false 207size=2097152 208 209[system.cpu.toL2Bus] 210type=CoherentXBar 211children=snoop_filter 212clk_domain=system.cpu_clk_domain 213eventq_index=0 214forward_latency=0 215frontend_latency=1 216point_of_coherency=false 217response_latency=1 218snoop_filter=system.cpu.toL2Bus.snoop_filter 219snoop_response_latency=1 220system=system 221use_default_range=false 222width=32 223master=system.cpu.l2cache.cpu_side 224slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side 225 226[system.cpu.toL2Bus.snoop_filter] 227type=SnoopFilter 228eventq_index=0 229lookup_latency=0 230max_capacity=8388608 231system=system 232 233[system.cpu.tracer] 234type=ExeTracer 235eventq_index=0 236 237[system.cpu.workload] 238type=LiveProcess 239cmd=hello 240cwd= 241drivers= 242egid=100 243env= 244errout=cerr 245euid=100 246eventq_index=0 247executable=/home/stever/hg/m5sim.org/gem5/tests/test-progs/hello/bin/alpha/linux/hello 248gid=100 249input=cin 250kvmInSE=false 251max_stack_size=67108864 252output=cout 253pid=100 254ppid=99 255simpoint=0 256system=system 257uid=100 258useArchPT=false 259 260[system.cpu_clk_domain] 261type=SrcClockDomain 262clock=500 263domain_id=-1 264eventq_index=0 265init_perf_level=0 266voltage_domain=system.voltage_domain 267 268[system.dvfs_handler] 269type=DVFSHandler 270domains= 271enable=false 272eventq_index=0 273sys_clk_domain=system.clk_domain 274transition_latency=100000000 275 276[system.membus] 277type=CoherentXBar 278clk_domain=system.clk_domain 279eventq_index=0 280forward_latency=4 281frontend_latency=3 282point_of_coherency=true 283response_latency=2 284snoop_filter=Null 285snoop_response_latency=4 286system=system 287use_default_range=false 288width=16 289master=system.physmem.port 290slave=system.system_port system.cpu.l2cache.mem_side 291 292[system.physmem] 293type=SimpleMemory 294bandwidth=73.000000 295clk_domain=system.clk_domain 296conf_table_reported=true 297eventq_index=0 298in_addr_map=true 299latency=30000 300latency_var=0 301null=false 302range=0:134217727 303port=system.membus.master[0] 304 305[system.voltage_domain] 306type=VoltageDomain 307eventq_index=0 308voltage=1.000000 309 310