stats.txt revision 9578:49b40999f4a2
1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.000144 # Number of seconds simulated 4sim_ticks 143853 # Number of ticks simulated 5final_tick 143853 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000 # Frequency of simulated ticks 7host_inst_rate 25445 # Simulator instruction rate (inst/s) 8host_op_rate 25443 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 572727 # Simulator tick rate (ticks/s) 10host_mem_usage 150220 # Number of bytes of host memory used 11host_seconds 0.25 # Real time elapsed on the host 12sim_insts 6390 # Number of instructions simulated 13sim_ops 6390 # Number of ops (including micro ops) simulated 14system.ruby.l1_cntrl0.cacheMemory.num_data_array_reads 0 # number of data array reads 15system.ruby.l1_cntrl0.cacheMemory.num_data_array_writes 0 # number of data array writes 16system.ruby.l1_cntrl0.cacheMemory.num_tag_array_reads 0 # number of tag array reads 17system.ruby.l1_cntrl0.cacheMemory.num_tag_array_writes 0 # number of tag array writes 18system.ruby.l1_cntrl0.cacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array 19system.ruby.l1_cntrl0.cacheMemory.num_data_array_stalls 0 # number of stalls caused by data array 20system.cpu.dtb.fetch_hits 0 # ITB hits 21system.cpu.dtb.fetch_misses 0 # ITB misses 22system.cpu.dtb.fetch_acv 0 # ITB acv 23system.cpu.dtb.fetch_accesses 0 # ITB accesses 24system.cpu.dtb.read_hits 1183 # DTB read hits 25system.cpu.dtb.read_misses 7 # DTB read misses 26system.cpu.dtb.read_acv 0 # DTB read access violations 27system.cpu.dtb.read_accesses 1190 # DTB read accesses 28system.cpu.dtb.write_hits 865 # DTB write hits 29system.cpu.dtb.write_misses 3 # DTB write misses 30system.cpu.dtb.write_acv 0 # DTB write access violations 31system.cpu.dtb.write_accesses 868 # DTB write accesses 32system.cpu.dtb.data_hits 2048 # DTB hits 33system.cpu.dtb.data_misses 10 # DTB misses 34system.cpu.dtb.data_acv 0 # DTB access violations 35system.cpu.dtb.data_accesses 2058 # DTB accesses 36system.cpu.itb.fetch_hits 6401 # ITB hits 37system.cpu.itb.fetch_misses 17 # ITB misses 38system.cpu.itb.fetch_acv 0 # ITB acv 39system.cpu.itb.fetch_accesses 6418 # ITB accesses 40system.cpu.itb.read_hits 0 # DTB read hits 41system.cpu.itb.read_misses 0 # DTB read misses 42system.cpu.itb.read_acv 0 # DTB read access violations 43system.cpu.itb.read_accesses 0 # DTB read accesses 44system.cpu.itb.write_hits 0 # DTB write hits 45system.cpu.itb.write_misses 0 # DTB write misses 46system.cpu.itb.write_acv 0 # DTB write access violations 47system.cpu.itb.write_accesses 0 # DTB write accesses 48system.cpu.itb.data_hits 0 # DTB hits 49system.cpu.itb.data_misses 0 # DTB misses 50system.cpu.itb.data_acv 0 # DTB access violations 51system.cpu.itb.data_accesses 0 # DTB accesses 52system.cpu.workload.num_syscalls 17 # Number of system calls 53system.cpu.numCycles 143853 # number of cpu cycles simulated 54system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 55system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 56system.cpu.committedInsts 6390 # Number of instructions committed 57system.cpu.committedOps 6390 # Number of ops (including micro ops) committed 58system.cpu.num_int_alu_accesses 6317 # Number of integer alu accesses 59system.cpu.num_fp_alu_accesses 10 # Number of float alu accesses 60system.cpu.num_func_calls 251 # number of times a function call or return occured 61system.cpu.num_conditional_control_insts 749 # number of instructions that are conditional controls 62system.cpu.num_int_insts 6317 # number of integer instructions 63system.cpu.num_fp_insts 10 # number of float instructions 64system.cpu.num_int_register_reads 8285 # number of times the integer registers were read 65system.cpu.num_int_register_writes 4568 # number of times the integer registers were written 66system.cpu.num_fp_register_reads 8 # number of times the floating registers were read 67system.cpu.num_fp_register_writes 2 # number of times the floating registers were written 68system.cpu.num_mem_refs 2058 # number of memory refs 69system.cpu.num_load_insts 1190 # Number of load instructions 70system.cpu.num_store_insts 868 # Number of store instructions 71system.cpu.num_idle_cycles 0 # Number of idle cycles 72system.cpu.num_busy_cycles 143853 # Number of busy cycles 73system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles 74system.cpu.idle_fraction 0 # Percentage of idle cycles 75 76---------- End Simulation Statistics ---------- 77