config.ini revision 11390:f40859930028
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain 17eventq_index=0 18exit_on_work_items=false 19init_param=0 20kernel= 21kernel_addr_check=true 22load_addr_mask=1099511627775 23load_offset=0 24mem_mode=timing 25mem_ranges= 26memories=system.physmem 27mmap_using_noreserve=false 28multi_thread=false 29num_work_ids=16 30readfile= 31symbolfile= 32work_begin_ckpt_count=0 33work_begin_cpu_id_exit=-1 34work_begin_exit_count=0 35work_cpus_ckpt_count=0 36work_end_ckpt_count=0 37work_end_exit_count=0 38work_item_id=-1 39system_port=system.membus.slave[0] 40 41[system.clk_domain] 42type=SrcClockDomain 43clock=1000 44domain_id=-1 45eventq_index=0 46init_perf_level=0 47voltage_domain=system.voltage_domain 48 49[system.cpu] 50type=MinorCPU 51children=branchPred dcache dtb executeFuncUnits icache interrupts isa itb l2cache toL2Bus tracer workload 52branchPred=system.cpu.branchPred 53checker=Null 54clk_domain=system.cpu_clk_domain 55cpu_id=0 56decodeCycleInput=true 57decodeInputBufferSize=3 58decodeInputWidth=2 59decodeToExecuteForwardDelay=1 60do_checkpoint_insts=true 61do_quiesce=true 62do_statistics_insts=true 63dtb=system.cpu.dtb 64enableIdling=true 65eventq_index=0 66executeAllowEarlyMemoryIssue=true 67executeBranchDelay=1 68executeCommitLimit=2 69executeCycleInput=true 70executeFuncUnits=system.cpu.executeFuncUnits 71executeInputBufferSize=7 72executeInputWidth=2 73executeIssueLimit=2 74executeLSQMaxStoreBufferStoresPerCycle=2 75executeLSQRequestsQueueSize=1 76executeLSQStoreBufferSize=5 77executeLSQTransfersQueueSize=2 78executeMaxAccessesInMemory=2 79executeMemoryCommitLimit=1 80executeMemoryIssueLimit=1 81executeMemoryWidth=0 82executeSetTraceTimeOnCommit=true 83executeSetTraceTimeOnIssue=false 84fetch1FetchLimit=1 85fetch1LineSnapWidth=0 86fetch1LineWidth=0 87fetch1ToFetch2BackwardDelay=1 88fetch1ToFetch2ForwardDelay=1 89fetch2CycleInput=true 90fetch2InputBufferSize=2 91fetch2ToDecodeForwardDelay=1 92function_trace=false 93function_trace_start=0 94interrupts=system.cpu.interrupts 95isa=system.cpu.isa 96itb=system.cpu.itb 97max_insts_all_threads=0 98max_insts_any_thread=0 99max_loads_all_threads=0 100max_loads_any_thread=0 101numThreads=1 102profile=0 103progress_interval=0 104simpoint_start_insts= 105socket_id=0 106switched_out=false 107system=system 108tracer=system.cpu.tracer 109workload=system.cpu.workload 110dcache_port=system.cpu.dcache.cpu_side 111icache_port=system.cpu.icache.cpu_side 112 113[system.cpu.branchPred] 114type=TournamentBP 115BTBEntries=4096 116BTBTagSize=16 117RASSize=16 118choiceCtrBits=2 119choicePredictorSize=8192 120eventq_index=0 121globalCtrBits=2 122globalPredictorSize=8192 123instShiftAmt=2 124localCtrBits=2 125localHistoryTableSize=2048 126localPredictorSize=2048 127numThreads=1 128 129[system.cpu.dcache] 130type=Cache 131children=tags 132addr_ranges=0:18446744073709551615 133assoc=2 134clk_domain=system.cpu_clk_domain 135clusivity=mostly_incl 136demand_mshr_reserve=1 137eventq_index=0 138hit_latency=2 139is_read_only=false 140max_miss_count=0 141mshrs=4 142prefetch_on_access=false 143prefetcher=Null 144response_latency=2 145sequential_access=false 146size=262144 147system=system 148tags=system.cpu.dcache.tags 149tgts_per_mshr=20 150write_buffers=8 151writeback_clean=false 152cpu_side=system.cpu.dcache_port 153mem_side=system.cpu.toL2Bus.slave[1] 154 155[system.cpu.dcache.tags] 156type=LRU 157assoc=2 158block_size=64 159clk_domain=system.cpu_clk_domain 160eventq_index=0 161hit_latency=2 162sequential_access=false 163size=262144 164 165[system.cpu.dtb] 166type=AlphaTLB 167eventq_index=0 168size=64 169 170[system.cpu.executeFuncUnits] 171type=MinorFUPool 172children=funcUnits0 funcUnits1 funcUnits2 funcUnits3 funcUnits4 funcUnits5 funcUnits6 173eventq_index=0 174funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.funcUnits1 system.cpu.executeFuncUnits.funcUnits2 system.cpu.executeFuncUnits.funcUnits3 system.cpu.executeFuncUnits.funcUnits4 system.cpu.executeFuncUnits.funcUnits5 system.cpu.executeFuncUnits.funcUnits6 175 176[system.cpu.executeFuncUnits.funcUnits0] 177type=MinorFU 178children=opClasses timings 179cantForwardFromFUIndices= 180eventq_index=0 181issueLat=1 182opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses 183opLat=3 184timings=system.cpu.executeFuncUnits.funcUnits0.timings 185 186[system.cpu.executeFuncUnits.funcUnits0.opClasses] 187type=MinorOpClassSet 188children=opClasses 189eventq_index=0 190opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses 191 192[system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses] 193type=MinorOpClass 194eventq_index=0 195opClass=IntAlu 196 197[system.cpu.executeFuncUnits.funcUnits0.timings] 198type=MinorFUTiming 199children=opClasses 200description=Int 201eventq_index=0 202extraAssumedLat=0 203extraCommitLat=0 204extraCommitLatExpr=Null 205mask=0 206match=0 207opClasses=system.cpu.executeFuncUnits.funcUnits0.timings.opClasses 208srcRegsRelativeLats=2 209suppress=false 210 211[system.cpu.executeFuncUnits.funcUnits0.timings.opClasses] 212type=MinorOpClassSet 213eventq_index=0 214opClasses= 215 216[system.cpu.executeFuncUnits.funcUnits1] 217type=MinorFU 218children=opClasses timings 219cantForwardFromFUIndices= 220eventq_index=0 221issueLat=1 222opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses 223opLat=3 224timings=system.cpu.executeFuncUnits.funcUnits1.timings 225 226[system.cpu.executeFuncUnits.funcUnits1.opClasses] 227type=MinorOpClassSet 228children=opClasses 229eventq_index=0 230opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses 231 232[system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses] 233type=MinorOpClass 234eventq_index=0 235opClass=IntAlu 236 237[system.cpu.executeFuncUnits.funcUnits1.timings] 238type=MinorFUTiming 239children=opClasses 240description=Int 241eventq_index=0 242extraAssumedLat=0 243extraCommitLat=0 244extraCommitLatExpr=Null 245mask=0 246match=0 247opClasses=system.cpu.executeFuncUnits.funcUnits1.timings.opClasses 248srcRegsRelativeLats=2 249suppress=false 250 251[system.cpu.executeFuncUnits.funcUnits1.timings.opClasses] 252type=MinorOpClassSet 253eventq_index=0 254opClasses= 255 256[system.cpu.executeFuncUnits.funcUnits2] 257type=MinorFU 258children=opClasses timings 259cantForwardFromFUIndices= 260eventq_index=0 261issueLat=1 262opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses 263opLat=3 264timings=system.cpu.executeFuncUnits.funcUnits2.timings 265 266[system.cpu.executeFuncUnits.funcUnits2.opClasses] 267type=MinorOpClassSet 268children=opClasses 269eventq_index=0 270opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses 271 272[system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses] 273type=MinorOpClass 274eventq_index=0 275opClass=IntMult 276 277[system.cpu.executeFuncUnits.funcUnits2.timings] 278type=MinorFUTiming 279children=opClasses 280description=Mul 281eventq_index=0 282extraAssumedLat=0 283extraCommitLat=0 284extraCommitLatExpr=Null 285mask=0 286match=0 287opClasses=system.cpu.executeFuncUnits.funcUnits2.timings.opClasses 288srcRegsRelativeLats=0 289suppress=false 290 291[system.cpu.executeFuncUnits.funcUnits2.timings.opClasses] 292type=MinorOpClassSet 293eventq_index=0 294opClasses= 295 296[system.cpu.executeFuncUnits.funcUnits3] 297type=MinorFU 298children=opClasses 299cantForwardFromFUIndices= 300eventq_index=0 301issueLat=9 302opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses 303opLat=9 304timings= 305 306[system.cpu.executeFuncUnits.funcUnits3.opClasses] 307type=MinorOpClassSet 308children=opClasses 309eventq_index=0 310opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses 311 312[system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses] 313type=MinorOpClass 314eventq_index=0 315opClass=IntDiv 316 317[system.cpu.executeFuncUnits.funcUnits4] 318type=MinorFU 319children=opClasses timings 320cantForwardFromFUIndices= 321eventq_index=0 322issueLat=1 323opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses 324opLat=6 325timings=system.cpu.executeFuncUnits.funcUnits4.timings 326 327[system.cpu.executeFuncUnits.funcUnits4.opClasses] 328type=MinorOpClassSet 329children=opClasses00 opClasses01 opClasses02 opClasses03 opClasses04 opClasses05 opClasses06 opClasses07 opClasses08 opClasses09 opClasses10 opClasses11 opClasses12 opClasses13 opClasses14 opClasses15 opClasses16 opClasses17 opClasses18 opClasses19 opClasses20 opClasses21 opClasses22 opClasses23 opClasses24 opClasses25 330eventq_index=0 331opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25 332 333[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00] 334type=MinorOpClass 335eventq_index=0 336opClass=FloatAdd 337 338[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01] 339type=MinorOpClass 340eventq_index=0 341opClass=FloatCmp 342 343[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02] 344type=MinorOpClass 345eventq_index=0 346opClass=FloatCvt 347 348[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03] 349type=MinorOpClass 350eventq_index=0 351opClass=FloatMult 352 353[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04] 354type=MinorOpClass 355eventq_index=0 356opClass=FloatDiv 357 358[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05] 359type=MinorOpClass 360eventq_index=0 361opClass=FloatSqrt 362 363[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06] 364type=MinorOpClass 365eventq_index=0 366opClass=SimdAdd 367 368[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07] 369type=MinorOpClass 370eventq_index=0 371opClass=SimdAddAcc 372 373[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08] 374type=MinorOpClass 375eventq_index=0 376opClass=SimdAlu 377 378[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09] 379type=MinorOpClass 380eventq_index=0 381opClass=SimdCmp 382 383[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10] 384type=MinorOpClass 385eventq_index=0 386opClass=SimdCvt 387 388[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11] 389type=MinorOpClass 390eventq_index=0 391opClass=SimdMisc 392 393[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12] 394type=MinorOpClass 395eventq_index=0 396opClass=SimdMult 397 398[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13] 399type=MinorOpClass 400eventq_index=0 401opClass=SimdMultAcc 402 403[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14] 404type=MinorOpClass 405eventq_index=0 406opClass=SimdShift 407 408[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15] 409type=MinorOpClass 410eventq_index=0 411opClass=SimdShiftAcc 412 413[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16] 414type=MinorOpClass 415eventq_index=0 416opClass=SimdSqrt 417 418[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17] 419type=MinorOpClass 420eventq_index=0 421opClass=SimdFloatAdd 422 423[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18] 424type=MinorOpClass 425eventq_index=0 426opClass=SimdFloatAlu 427 428[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19] 429type=MinorOpClass 430eventq_index=0 431opClass=SimdFloatCmp 432 433[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20] 434type=MinorOpClass 435eventq_index=0 436opClass=SimdFloatCvt 437 438[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21] 439type=MinorOpClass 440eventq_index=0 441opClass=SimdFloatDiv 442 443[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22] 444type=MinorOpClass 445eventq_index=0 446opClass=SimdFloatMisc 447 448[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23] 449type=MinorOpClass 450eventq_index=0 451opClass=SimdFloatMult 452 453[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24] 454type=MinorOpClass 455eventq_index=0 456opClass=SimdFloatMultAcc 457 458[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25] 459type=MinorOpClass 460eventq_index=0 461opClass=SimdFloatSqrt 462 463[system.cpu.executeFuncUnits.funcUnits4.timings] 464type=MinorFUTiming 465children=opClasses 466description=FloatSimd 467eventq_index=0 468extraAssumedLat=0 469extraCommitLat=0 470extraCommitLatExpr=Null 471mask=0 472match=0 473opClasses=system.cpu.executeFuncUnits.funcUnits4.timings.opClasses 474srcRegsRelativeLats=2 475suppress=false 476 477[system.cpu.executeFuncUnits.funcUnits4.timings.opClasses] 478type=MinorOpClassSet 479eventq_index=0 480opClasses= 481 482[system.cpu.executeFuncUnits.funcUnits5] 483type=MinorFU 484children=opClasses timings 485cantForwardFromFUIndices= 486eventq_index=0 487issueLat=1 488opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses 489opLat=1 490timings=system.cpu.executeFuncUnits.funcUnits5.timings 491 492[system.cpu.executeFuncUnits.funcUnits5.opClasses] 493type=MinorOpClassSet 494children=opClasses0 opClasses1 495eventq_index=0 496opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1 497 498[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0] 499type=MinorOpClass 500eventq_index=0 501opClass=MemRead 502 503[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1] 504type=MinorOpClass 505eventq_index=0 506opClass=MemWrite 507 508[system.cpu.executeFuncUnits.funcUnits5.timings] 509type=MinorFUTiming 510children=opClasses 511description=Mem 512eventq_index=0 513extraAssumedLat=2 514extraCommitLat=0 515extraCommitLatExpr=Null 516mask=0 517match=0 518opClasses=system.cpu.executeFuncUnits.funcUnits5.timings.opClasses 519srcRegsRelativeLats=1 520suppress=false 521 522[system.cpu.executeFuncUnits.funcUnits5.timings.opClasses] 523type=MinorOpClassSet 524eventq_index=0 525opClasses= 526 527[system.cpu.executeFuncUnits.funcUnits6] 528type=MinorFU 529children=opClasses 530cantForwardFromFUIndices= 531eventq_index=0 532issueLat=1 533opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses 534opLat=1 535timings= 536 537[system.cpu.executeFuncUnits.funcUnits6.opClasses] 538type=MinorOpClassSet 539children=opClasses0 opClasses1 540eventq_index=0 541opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1 542 543[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0] 544type=MinorOpClass 545eventq_index=0 546opClass=IprAccess 547 548[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1] 549type=MinorOpClass 550eventq_index=0 551opClass=InstPrefetch 552 553[system.cpu.icache] 554type=Cache 555children=tags 556addr_ranges=0:18446744073709551615 557assoc=2 558clk_domain=system.cpu_clk_domain 559clusivity=mostly_incl 560demand_mshr_reserve=1 561eventq_index=0 562hit_latency=2 563is_read_only=true 564max_miss_count=0 565mshrs=4 566prefetch_on_access=false 567prefetcher=Null 568response_latency=2 569sequential_access=false 570size=131072 571system=system 572tags=system.cpu.icache.tags 573tgts_per_mshr=20 574write_buffers=8 575writeback_clean=true 576cpu_side=system.cpu.icache_port 577mem_side=system.cpu.toL2Bus.slave[0] 578 579[system.cpu.icache.tags] 580type=LRU 581assoc=2 582block_size=64 583clk_domain=system.cpu_clk_domain 584eventq_index=0 585hit_latency=2 586sequential_access=false 587size=131072 588 589[system.cpu.interrupts] 590type=AlphaInterrupts 591eventq_index=0 592 593[system.cpu.isa] 594type=AlphaISA 595eventq_index=0 596system=system 597 598[system.cpu.itb] 599type=AlphaTLB 600eventq_index=0 601size=48 602 603[system.cpu.l2cache] 604type=Cache 605children=tags 606addr_ranges=0:18446744073709551615 607assoc=8 608clk_domain=system.cpu_clk_domain 609clusivity=mostly_incl 610demand_mshr_reserve=1 611eventq_index=0 612hit_latency=20 613is_read_only=false 614max_miss_count=0 615mshrs=20 616prefetch_on_access=false 617prefetcher=Null 618response_latency=20 619sequential_access=false 620size=2097152 621system=system 622tags=system.cpu.l2cache.tags 623tgts_per_mshr=12 624write_buffers=8 625writeback_clean=false 626cpu_side=system.cpu.toL2Bus.master[0] 627mem_side=system.membus.slave[1] 628 629[system.cpu.l2cache.tags] 630type=LRU 631assoc=8 632block_size=64 633clk_domain=system.cpu_clk_domain 634eventq_index=0 635hit_latency=20 636sequential_access=false 637size=2097152 638 639[system.cpu.toL2Bus] 640type=CoherentXBar 641children=snoop_filter 642clk_domain=system.cpu_clk_domain 643eventq_index=0 644forward_latency=0 645frontend_latency=1 646point_of_coherency=false 647response_latency=1 648snoop_filter=system.cpu.toL2Bus.snoop_filter 649snoop_response_latency=1 650system=system 651use_default_range=false 652width=32 653master=system.cpu.l2cache.cpu_side 654slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side 655 656[system.cpu.toL2Bus.snoop_filter] 657type=SnoopFilter 658eventq_index=0 659lookup_latency=0 660max_capacity=8388608 661system=system 662 663[system.cpu.tracer] 664type=ExeTracer 665eventq_index=0 666 667[system.cpu.workload] 668type=LiveProcess 669cmd=hello 670cwd= 671drivers= 672egid=100 673env= 674errout=cerr 675euid=100 676eventq_index=0 677executable=/home/stever/hg/m5sim.org/gem5/tests/test-progs/hello/bin/alpha/linux/hello 678gid=100 679input=cin 680kvmInSE=false 681max_stack_size=67108864 682output=cout 683pid=100 684ppid=99 685simpoint=0 686system=system 687uid=100 688useArchPT=false 689 690[system.cpu_clk_domain] 691type=SrcClockDomain 692clock=500 693domain_id=-1 694eventq_index=0 695init_perf_level=0 696voltage_domain=system.voltage_domain 697 698[system.dvfs_handler] 699type=DVFSHandler 700domains= 701enable=false 702eventq_index=0 703sys_clk_domain=system.clk_domain 704transition_latency=100000000 705 706[system.membus] 707type=CoherentXBar 708clk_domain=system.clk_domain 709eventq_index=0 710forward_latency=4 711frontend_latency=3 712point_of_coherency=true 713response_latency=2 714snoop_filter=Null 715snoop_response_latency=4 716system=system 717use_default_range=false 718width=16 719master=system.physmem.port 720slave=system.system_port system.cpu.l2cache.mem_side 721 722[system.physmem] 723type=DRAMCtrl 724IDD0=0.075000 725IDD02=0.000000 726IDD2N=0.050000 727IDD2N2=0.000000 728IDD2P0=0.000000 729IDD2P02=0.000000 730IDD2P1=0.000000 731IDD2P12=0.000000 732IDD3N=0.057000 733IDD3N2=0.000000 734IDD3P0=0.000000 735IDD3P02=0.000000 736IDD3P1=0.000000 737IDD3P12=0.000000 738IDD4R=0.187000 739IDD4R2=0.000000 740IDD4W=0.165000 741IDD4W2=0.000000 742IDD5=0.220000 743IDD52=0.000000 744IDD6=0.000000 745IDD62=0.000000 746VDD=1.500000 747VDD2=0.000000 748activation_limit=4 749addr_mapping=RoRaBaCoCh 750bank_groups_per_rank=0 751banks_per_rank=8 752burst_length=8 753channels=1 754clk_domain=system.clk_domain 755conf_table_reported=true 756device_bus_width=8 757device_rowbuffer_size=1024 758device_size=536870912 759devices_per_rank=8 760dll=true 761eventq_index=0 762in_addr_map=true 763max_accesses_per_row=16 764mem_sched_policy=frfcfs 765min_writes_per_switch=16 766null=false 767page_policy=open_adaptive 768range=0:134217727 769ranks_per_channel=2 770read_buffer_size=32 771static_backend_latency=10000 772static_frontend_latency=10000 773tBURST=5000 774tCCD_L=0 775tCK=1250 776tCL=13750 777tCS=2500 778tRAS=35000 779tRCD=13750 780tREFI=7800000 781tRFC=260000 782tRP=13750 783tRRD=6000 784tRRD_L=0 785tRTP=7500 786tRTW=2500 787tWR=15000 788tWTR=7500 789tXAW=30000 790tXP=0 791tXPDLL=0 792tXS=0 793tXSDLL=0 794write_buffer_size=64 795write_high_thresh_perc=85 796write_low_thresh_perc=50 797port=system.membus.master[0] 798 799[system.voltage_domain] 800type=VoltageDomain 801eventq_index=0 802voltage=1.000000 803 804