config.ini revision 10451:3a87241adfb8
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain 17eventq_index=0 18init_param=0 19kernel= 20kernel_addr_check=true 21load_addr_mask=1099511627775 22load_offset=0 23mem_mode=timing 24mem_ranges= 25memories=system.physmem 26num_work_ids=16 27readfile= 28symbolfile= 29work_begin_ckpt_count=0 30work_begin_cpu_id_exit=-1 31work_begin_exit_count=0 32work_cpus_ckpt_count=0 33work_end_ckpt_count=0 34work_end_exit_count=0 35work_item_id=-1 36system_port=system.membus.slave[0] 37 38[system.clk_domain] 39type=SrcClockDomain 40clock=1000 41domain_id=-1 42eventq_index=0 43init_perf_level=0 44voltage_domain=system.voltage_domain 45 46[system.cpu] 47type=MinorCPU 48children=branchPred dcache dtb executeFuncUnits icache interrupts isa itb l2cache toL2Bus tracer workload 49branchPred=system.cpu.branchPred 50checker=Null 51clk_domain=system.cpu_clk_domain 52cpu_id=0 53decodeCycleInput=true 54decodeInputBufferSize=3 55decodeInputWidth=2 56decodeToExecuteForwardDelay=1 57do_checkpoint_insts=true 58do_quiesce=true 59do_statistics_insts=true 60dtb=system.cpu.dtb 61enableIdling=true 62eventq_index=0 63executeAllowEarlyMemoryIssue=true 64executeBranchDelay=1 65executeCommitLimit=2 66executeCycleInput=true 67executeFuncUnits=system.cpu.executeFuncUnits 68executeInputBufferSize=7 69executeInputWidth=2 70executeIssueLimit=2 71executeLSQMaxStoreBufferStoresPerCycle=2 72executeLSQRequestsQueueSize=1 73executeLSQStoreBufferSize=5 74executeLSQTransfersQueueSize=2 75executeMaxAccessesInMemory=2 76executeMemoryCommitLimit=1 77executeMemoryIssueLimit=1 78executeMemoryWidth=0 79executeSetTraceTimeOnCommit=true 80executeSetTraceTimeOnIssue=false 81fetch1FetchLimit=1 82fetch1LineSnapWidth=0 83fetch1LineWidth=0 84fetch1ToFetch2BackwardDelay=1 85fetch1ToFetch2ForwardDelay=1 86fetch2CycleInput=true 87fetch2InputBufferSize=2 88fetch2ToDecodeForwardDelay=1 89function_trace=false 90function_trace_start=0 91interrupts=system.cpu.interrupts 92isa=system.cpu.isa 93itb=system.cpu.itb 94max_insts_all_threads=0 95max_insts_any_thread=0 96max_loads_all_threads=0 97max_loads_any_thread=0 98numThreads=1 99profile=0 100progress_interval=0 101simpoint_start_insts= 102socket_id=0 103switched_out=false 104system=system 105tracer=system.cpu.tracer 106workload=system.cpu.workload 107dcache_port=system.cpu.dcache.cpu_side 108icache_port=system.cpu.icache.cpu_side 109 110[system.cpu.branchPred] 111type=BranchPredictor 112BTBEntries=4096 113BTBTagSize=16 114RASSize=16 115choiceCtrBits=2 116choicePredictorSize=8192 117eventq_index=0 118globalCtrBits=2 119globalPredictorSize=8192 120instShiftAmt=2 121localCtrBits=2 122localHistoryTableSize=2048 123localPredictorSize=2048 124numThreads=1 125predType=tournament 126 127[system.cpu.dcache] 128type=BaseCache 129children=tags 130addr_ranges=0:18446744073709551615 131assoc=2 132clk_domain=system.cpu_clk_domain 133eventq_index=0 134forward_snoops=true 135hit_latency=2 136is_top_level=true 137max_miss_count=0 138mshrs=4 139prefetch_on_access=false 140prefetcher=Null 141response_latency=2 142sequential_access=false 143size=262144 144system=system 145tags=system.cpu.dcache.tags 146tgts_per_mshr=20 147two_queue=false 148write_buffers=8 149cpu_side=system.cpu.dcache_port 150mem_side=system.cpu.toL2Bus.slave[1] 151 152[system.cpu.dcache.tags] 153type=LRU 154assoc=2 155block_size=64 156clk_domain=system.cpu_clk_domain 157eventq_index=0 158hit_latency=2 159sequential_access=false 160size=262144 161 162[system.cpu.dtb] 163type=AlphaTLB 164eventq_index=0 165size=64 166 167[system.cpu.executeFuncUnits] 168type=MinorFUPool 169children=funcUnits0 funcUnits1 funcUnits2 funcUnits3 funcUnits4 funcUnits5 funcUnits6 170eventq_index=0 171funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.funcUnits1 system.cpu.executeFuncUnits.funcUnits2 system.cpu.executeFuncUnits.funcUnits3 system.cpu.executeFuncUnits.funcUnits4 system.cpu.executeFuncUnits.funcUnits5 system.cpu.executeFuncUnits.funcUnits6 172 173[system.cpu.executeFuncUnits.funcUnits0] 174type=MinorFU 175children=opClasses timings 176cantForwardFromFUIndices= 177eventq_index=0 178issueLat=1 179opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses 180opLat=3 181timings=system.cpu.executeFuncUnits.funcUnits0.timings 182 183[system.cpu.executeFuncUnits.funcUnits0.opClasses] 184type=MinorOpClassSet 185children=opClasses 186eventq_index=0 187opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses 188 189[system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses] 190type=MinorOpClass 191eventq_index=0 192opClass=IntAlu 193 194[system.cpu.executeFuncUnits.funcUnits0.timings] 195type=MinorFUTiming 196children=opClasses 197description=Int 198eventq_index=0 199extraAssumedLat=0 200extraCommitLat=0 201extraCommitLatExpr=Null 202mask=0 203match=0 204opClasses=system.cpu.executeFuncUnits.funcUnits0.timings.opClasses 205srcRegsRelativeLats=2 206suppress=false 207 208[system.cpu.executeFuncUnits.funcUnits0.timings.opClasses] 209type=MinorOpClassSet 210eventq_index=0 211opClasses= 212 213[system.cpu.executeFuncUnits.funcUnits1] 214type=MinorFU 215children=opClasses timings 216cantForwardFromFUIndices= 217eventq_index=0 218issueLat=1 219opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses 220opLat=3 221timings=system.cpu.executeFuncUnits.funcUnits1.timings 222 223[system.cpu.executeFuncUnits.funcUnits1.opClasses] 224type=MinorOpClassSet 225children=opClasses 226eventq_index=0 227opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses 228 229[system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses] 230type=MinorOpClass 231eventq_index=0 232opClass=IntAlu 233 234[system.cpu.executeFuncUnits.funcUnits1.timings] 235type=MinorFUTiming 236children=opClasses 237description=Int 238eventq_index=0 239extraAssumedLat=0 240extraCommitLat=0 241extraCommitLatExpr=Null 242mask=0 243match=0 244opClasses=system.cpu.executeFuncUnits.funcUnits1.timings.opClasses 245srcRegsRelativeLats=2 246suppress=false 247 248[system.cpu.executeFuncUnits.funcUnits1.timings.opClasses] 249type=MinorOpClassSet 250eventq_index=0 251opClasses= 252 253[system.cpu.executeFuncUnits.funcUnits2] 254type=MinorFU 255children=opClasses timings 256cantForwardFromFUIndices= 257eventq_index=0 258issueLat=1 259opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses 260opLat=3 261timings=system.cpu.executeFuncUnits.funcUnits2.timings 262 263[system.cpu.executeFuncUnits.funcUnits2.opClasses] 264type=MinorOpClassSet 265children=opClasses 266eventq_index=0 267opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses 268 269[system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses] 270type=MinorOpClass 271eventq_index=0 272opClass=IntMult 273 274[system.cpu.executeFuncUnits.funcUnits2.timings] 275type=MinorFUTiming 276children=opClasses 277description=Mul 278eventq_index=0 279extraAssumedLat=0 280extraCommitLat=0 281extraCommitLatExpr=Null 282mask=0 283match=0 284opClasses=system.cpu.executeFuncUnits.funcUnits2.timings.opClasses 285srcRegsRelativeLats=0 286suppress=false 287 288[system.cpu.executeFuncUnits.funcUnits2.timings.opClasses] 289type=MinorOpClassSet 290eventq_index=0 291opClasses= 292 293[system.cpu.executeFuncUnits.funcUnits3] 294type=MinorFU 295children=opClasses 296cantForwardFromFUIndices= 297eventq_index=0 298issueLat=9 299opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses 300opLat=9 301timings= 302 303[system.cpu.executeFuncUnits.funcUnits3.opClasses] 304type=MinorOpClassSet 305children=opClasses 306eventq_index=0 307opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses 308 309[system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses] 310type=MinorOpClass 311eventq_index=0 312opClass=IntDiv 313 314[system.cpu.executeFuncUnits.funcUnits4] 315type=MinorFU 316children=opClasses timings 317cantForwardFromFUIndices= 318eventq_index=0 319issueLat=1 320opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses 321opLat=6 322timings=system.cpu.executeFuncUnits.funcUnits4.timings 323 324[system.cpu.executeFuncUnits.funcUnits4.opClasses] 325type=MinorOpClassSet 326children=opClasses00 opClasses01 opClasses02 opClasses03 opClasses04 opClasses05 opClasses06 opClasses07 opClasses08 opClasses09 opClasses10 opClasses11 opClasses12 opClasses13 opClasses14 opClasses15 opClasses16 opClasses17 opClasses18 opClasses19 opClasses20 opClasses21 opClasses22 opClasses23 opClasses24 opClasses25 327eventq_index=0 328opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25 329 330[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00] 331type=MinorOpClass 332eventq_index=0 333opClass=FloatAdd 334 335[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01] 336type=MinorOpClass 337eventq_index=0 338opClass=FloatCmp 339 340[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02] 341type=MinorOpClass 342eventq_index=0 343opClass=FloatCvt 344 345[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03] 346type=MinorOpClass 347eventq_index=0 348opClass=FloatMult 349 350[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04] 351type=MinorOpClass 352eventq_index=0 353opClass=FloatDiv 354 355[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05] 356type=MinorOpClass 357eventq_index=0 358opClass=FloatSqrt 359 360[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06] 361type=MinorOpClass 362eventq_index=0 363opClass=SimdAdd 364 365[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07] 366type=MinorOpClass 367eventq_index=0 368opClass=SimdAddAcc 369 370[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08] 371type=MinorOpClass 372eventq_index=0 373opClass=SimdAlu 374 375[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09] 376type=MinorOpClass 377eventq_index=0 378opClass=SimdCmp 379 380[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10] 381type=MinorOpClass 382eventq_index=0 383opClass=SimdCvt 384 385[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11] 386type=MinorOpClass 387eventq_index=0 388opClass=SimdMisc 389 390[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12] 391type=MinorOpClass 392eventq_index=0 393opClass=SimdMult 394 395[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13] 396type=MinorOpClass 397eventq_index=0 398opClass=SimdMultAcc 399 400[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14] 401type=MinorOpClass 402eventq_index=0 403opClass=SimdShift 404 405[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15] 406type=MinorOpClass 407eventq_index=0 408opClass=SimdShiftAcc 409 410[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16] 411type=MinorOpClass 412eventq_index=0 413opClass=SimdSqrt 414 415[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17] 416type=MinorOpClass 417eventq_index=0 418opClass=SimdFloatAdd 419 420[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18] 421type=MinorOpClass 422eventq_index=0 423opClass=SimdFloatAlu 424 425[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19] 426type=MinorOpClass 427eventq_index=0 428opClass=SimdFloatCmp 429 430[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20] 431type=MinorOpClass 432eventq_index=0 433opClass=SimdFloatCvt 434 435[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21] 436type=MinorOpClass 437eventq_index=0 438opClass=SimdFloatDiv 439 440[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22] 441type=MinorOpClass 442eventq_index=0 443opClass=SimdFloatMisc 444 445[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23] 446type=MinorOpClass 447eventq_index=0 448opClass=SimdFloatMult 449 450[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24] 451type=MinorOpClass 452eventq_index=0 453opClass=SimdFloatMultAcc 454 455[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25] 456type=MinorOpClass 457eventq_index=0 458opClass=SimdFloatSqrt 459 460[system.cpu.executeFuncUnits.funcUnits4.timings] 461type=MinorFUTiming 462children=opClasses 463description=FloatSimd 464eventq_index=0 465extraAssumedLat=0 466extraCommitLat=0 467extraCommitLatExpr=Null 468mask=0 469match=0 470opClasses=system.cpu.executeFuncUnits.funcUnits4.timings.opClasses 471srcRegsRelativeLats=2 472suppress=false 473 474[system.cpu.executeFuncUnits.funcUnits4.timings.opClasses] 475type=MinorOpClassSet 476eventq_index=0 477opClasses= 478 479[system.cpu.executeFuncUnits.funcUnits5] 480type=MinorFU 481children=opClasses timings 482cantForwardFromFUIndices= 483eventq_index=0 484issueLat=1 485opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses 486opLat=1 487timings=system.cpu.executeFuncUnits.funcUnits5.timings 488 489[system.cpu.executeFuncUnits.funcUnits5.opClasses] 490type=MinorOpClassSet 491children=opClasses0 opClasses1 492eventq_index=0 493opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1 494 495[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0] 496type=MinorOpClass 497eventq_index=0 498opClass=MemRead 499 500[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1] 501type=MinorOpClass 502eventq_index=0 503opClass=MemWrite 504 505[system.cpu.executeFuncUnits.funcUnits5.timings] 506type=MinorFUTiming 507children=opClasses 508description=Mem 509eventq_index=0 510extraAssumedLat=2 511extraCommitLat=0 512extraCommitLatExpr=Null 513mask=0 514match=0 515opClasses=system.cpu.executeFuncUnits.funcUnits5.timings.opClasses 516srcRegsRelativeLats=1 517suppress=false 518 519[system.cpu.executeFuncUnits.funcUnits5.timings.opClasses] 520type=MinorOpClassSet 521eventq_index=0 522opClasses= 523 524[system.cpu.executeFuncUnits.funcUnits6] 525type=MinorFU 526children=opClasses 527cantForwardFromFUIndices= 528eventq_index=0 529issueLat=1 530opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses 531opLat=1 532timings= 533 534[system.cpu.executeFuncUnits.funcUnits6.opClasses] 535type=MinorOpClassSet 536children=opClasses0 opClasses1 537eventq_index=0 538opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1 539 540[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0] 541type=MinorOpClass 542eventq_index=0 543opClass=IprAccess 544 545[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1] 546type=MinorOpClass 547eventq_index=0 548opClass=InstPrefetch 549 550[system.cpu.icache] 551type=BaseCache 552children=tags 553addr_ranges=0:18446744073709551615 554assoc=2 555clk_domain=system.cpu_clk_domain 556eventq_index=0 557forward_snoops=true 558hit_latency=2 559is_top_level=true 560max_miss_count=0 561mshrs=4 562prefetch_on_access=false 563prefetcher=Null 564response_latency=2 565sequential_access=false 566size=131072 567system=system 568tags=system.cpu.icache.tags 569tgts_per_mshr=20 570two_queue=false 571write_buffers=8 572cpu_side=system.cpu.icache_port 573mem_side=system.cpu.toL2Bus.slave[0] 574 575[system.cpu.icache.tags] 576type=LRU 577assoc=2 578block_size=64 579clk_domain=system.cpu_clk_domain 580eventq_index=0 581hit_latency=2 582sequential_access=false 583size=131072 584 585[system.cpu.interrupts] 586type=AlphaInterrupts 587eventq_index=0 588 589[system.cpu.isa] 590type=AlphaISA 591eventq_index=0 592system=system 593 594[system.cpu.itb] 595type=AlphaTLB 596eventq_index=0 597size=48 598 599[system.cpu.l2cache] 600type=BaseCache 601children=tags 602addr_ranges=0:18446744073709551615 603assoc=8 604clk_domain=system.cpu_clk_domain 605eventq_index=0 606forward_snoops=true 607hit_latency=20 608is_top_level=false 609max_miss_count=0 610mshrs=20 611prefetch_on_access=false 612prefetcher=Null 613response_latency=20 614sequential_access=false 615size=2097152 616system=system 617tags=system.cpu.l2cache.tags 618tgts_per_mshr=12 619two_queue=false 620write_buffers=8 621cpu_side=system.cpu.toL2Bus.master[0] 622mem_side=system.membus.slave[1] 623 624[system.cpu.l2cache.tags] 625type=LRU 626assoc=8 627block_size=64 628clk_domain=system.cpu_clk_domain 629eventq_index=0 630hit_latency=20 631sequential_access=false 632size=2097152 633 634[system.cpu.toL2Bus] 635type=CoherentXBar 636clk_domain=system.cpu_clk_domain 637eventq_index=0 638header_cycles=1 639snoop_filter=Null 640system=system 641use_default_range=false 642width=32 643master=system.cpu.l2cache.cpu_side 644slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side 645 646[system.cpu.tracer] 647type=ExeTracer 648eventq_index=0 649 650[system.cpu.workload] 651type=LiveProcess 652cmd=hello 653cwd= 654egid=100 655env= 656errout=cerr 657euid=100 658eventq_index=0 659executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/alpha/linux/hello 660gid=100 661input=cin 662max_stack_size=67108864 663output=cout 664pid=100 665ppid=99 666simpoint=0 667system=system 668uid=100 669useArchPT=false 670 671[system.cpu_clk_domain] 672type=SrcClockDomain 673clock=500 674domain_id=-1 675eventq_index=0 676init_perf_level=0 677voltage_domain=system.voltage_domain 678 679[system.dvfs_handler] 680type=DVFSHandler 681domains= 682enable=false 683eventq_index=0 684sys_clk_domain=system.clk_domain 685transition_latency=100000000 686 687[system.membus] 688type=CoherentXBar 689clk_domain=system.clk_domain 690eventq_index=0 691header_cycles=1 692snoop_filter=Null 693system=system 694use_default_range=false 695width=8 696master=system.physmem.port 697slave=system.system_port system.cpu.l2cache.mem_side 698 699[system.physmem] 700type=DRAMCtrl 701IDD0=0.075000 702IDD02=0.000000 703IDD2N=0.050000 704IDD2N2=0.000000 705IDD2P0=0.000000 706IDD2P02=0.000000 707IDD2P1=0.000000 708IDD2P12=0.000000 709IDD3N=0.057000 710IDD3N2=0.000000 711IDD3P0=0.000000 712IDD3P02=0.000000 713IDD3P1=0.000000 714IDD3P12=0.000000 715IDD4R=0.187000 716IDD4R2=0.000000 717IDD4W=0.165000 718IDD4W2=0.000000 719IDD5=0.220000 720IDD52=0.000000 721IDD6=0.000000 722IDD62=0.000000 723VDD=1.500000 724VDD2=0.000000 725activation_limit=4 726addr_mapping=RoRaBaChCo 727bank_groups_per_rank=0 728banks_per_rank=8 729burst_length=8 730channels=1 731clk_domain=system.clk_domain 732conf_table_reported=true 733device_bus_width=8 734device_rowbuffer_size=1024 735devices_per_rank=8 736dll=true 737eventq_index=0 738in_addr_map=true 739max_accesses_per_row=16 740mem_sched_policy=frfcfs 741min_writes_per_switch=16 742null=false 743page_policy=open_adaptive 744range=0:134217727 745ranks_per_channel=2 746read_buffer_size=32 747static_backend_latency=10000 748static_frontend_latency=10000 749tBURST=5000 750tCCD_L=0 751tCK=1250 752tCL=13750 753tCS=2500 754tRAS=35000 755tRCD=13750 756tREFI=7800000 757tRFC=260000 758tRP=13750 759tRRD=6000 760tRRD_L=0 761tRTP=7500 762tRTW=2500 763tWR=15000 764tWTR=7500 765tXAW=30000 766tXP=0 767tXPDLL=0 768tXS=0 769tXSDLL=0 770write_buffer_size=64 771write_high_thresh_perc=85 772write_low_thresh_perc=50 773port=system.membus.master[0] 774 775[system.voltage_domain] 776type=VoltageDomain 777eventq_index=0 778voltage=1.000000 779 780