stats.txt revision 11606:6b749761c398
1
2---------- Begin Simulation Statistics ----------
3sim_seconds                                  1.829332                       # Number of seconds simulated
4sim_ticks                                1829332003500                       # Number of ticks simulated
5final_tick                               1829332003500                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
6sim_freq                                 1000000000000                       # Frequency of simulated ticks
7host_inst_rate                                1751464                       # Simulator instruction rate (inst/s)
8host_op_rate                                  1751464                       # Simulator op (including micro ops) rate (op/s)
9host_tick_rate                            53365900898                       # Simulator tick rate (ticks/s)
10host_mem_usage                                 334408                       # Number of bytes of host memory used
11host_seconds                                    34.28                       # Real time elapsed on the host
12sim_insts                                    60038469                       # Number of instructions simulated
13sim_ops                                      60038469                       # Number of ops (including micro ops) simulated
14system.voltage_domain.voltage                       1                       # Voltage in Volts
15system.clk_domain.clock                          1000                       # Clock period in ticks
16system.physmem.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
17system.physmem.bytes_read::cpu.inst            850496                       # Number of bytes read from this memory
18system.physmem.bytes_read::cpu.data          66835072                       # Number of bytes read from this memory
19system.physmem.bytes_read::tsunami.ide            960                       # Number of bytes read from this memory
20system.physmem.bytes_read::total             67686528                       # Number of bytes read from this memory
21system.physmem.bytes_inst_read::cpu.inst       850496                       # Number of instructions bytes read from this memory
22system.physmem.bytes_inst_read::total          850496                       # Number of instructions bytes read from this memory
23system.physmem.bytes_written::writebacks      7415744                       # Number of bytes written to this memory
24system.physmem.bytes_written::total           7415744                       # Number of bytes written to this memory
25system.physmem.num_reads::cpu.inst              13289                       # Number of read requests responded to by this memory
26system.physmem.num_reads::cpu.data            1044298                       # Number of read requests responded to by this memory
27system.physmem.num_reads::tsunami.ide              15                       # Number of read requests responded to by this memory
28system.physmem.num_reads::total               1057602                       # Number of read requests responded to by this memory
29system.physmem.num_writes::writebacks          115871                       # Number of write requests responded to by this memory
30system.physmem.num_writes::total               115871                       # Number of write requests responded to by this memory
31system.physmem.bw_read::cpu.inst               464922                       # Total read bandwidth from this memory (bytes/s)
32system.physmem.bw_read::cpu.data             36535234                       # Total read bandwidth from this memory (bytes/s)
33system.physmem.bw_read::tsunami.ide               525                       # Total read bandwidth from this memory (bytes/s)
34system.physmem.bw_read::total                37000680                       # Total read bandwidth from this memory (bytes/s)
35system.physmem.bw_inst_read::cpu.inst          464922                       # Instruction read bandwidth from this memory (bytes/s)
36system.physmem.bw_inst_read::total             464922                       # Instruction read bandwidth from this memory (bytes/s)
37system.physmem.bw_write::writebacks           4053799                       # Write bandwidth from this memory (bytes/s)
38system.physmem.bw_write::total                4053799                       # Write bandwidth from this memory (bytes/s)
39system.physmem.bw_total::writebacks           4053799                       # Total bandwidth to/from this memory (bytes/s)
40system.physmem.bw_total::cpu.inst              464922                       # Total bandwidth to/from this memory (bytes/s)
41system.physmem.bw_total::cpu.data            36535234                       # Total bandwidth to/from this memory (bytes/s)
42system.physmem.bw_total::tsunami.ide              525                       # Total bandwidth to/from this memory (bytes/s)
43system.physmem.bw_total::total               41054479                       # Total bandwidth to/from this memory (bytes/s)
44system.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
45system.bridge.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
46system.cpu_clk_domain.clock                       500                       # Clock period in ticks
47system.cpu.dtb.fetch_hits                           0                       # ITB hits
48system.cpu.dtb.fetch_misses                         0                       # ITB misses
49system.cpu.dtb.fetch_acv                            0                       # ITB acv
50system.cpu.dtb.fetch_accesses                       0                       # ITB accesses
51system.cpu.dtb.read_hits                      9710423                       # DTB read hits
52system.cpu.dtb.read_misses                      10329                       # DTB read misses
53system.cpu.dtb.read_acv                           210                       # DTB read access violations
54system.cpu.dtb.read_accesses                   728856                       # DTB read accesses
55system.cpu.dtb.write_hits                     6352496                       # DTB write hits
56system.cpu.dtb.write_misses                      1142                       # DTB write misses
57system.cpu.dtb.write_acv                          157                       # DTB write access violations
58system.cpu.dtb.write_accesses                  291931                       # DTB write accesses
59system.cpu.dtb.data_hits                     16062919                       # DTB hits
60system.cpu.dtb.data_misses                      11471                       # DTB misses
61system.cpu.dtb.data_acv                           367                       # DTB access violations
62system.cpu.dtb.data_accesses                  1020787                       # DTB accesses
63system.cpu.itb.fetch_hits                     4974637                       # ITB hits
64system.cpu.itb.fetch_misses                      5006                       # ITB misses
65system.cpu.itb.fetch_acv                          184                       # ITB acv
66system.cpu.itb.fetch_accesses                 4979643                       # ITB accesses
67system.cpu.itb.read_hits                            0                       # DTB read hits
68system.cpu.itb.read_misses                          0                       # DTB read misses
69system.cpu.itb.read_acv                             0                       # DTB read access violations
70system.cpu.itb.read_accesses                        0                       # DTB read accesses
71system.cpu.itb.write_hits                           0                       # DTB write hits
72system.cpu.itb.write_misses                         0                       # DTB write misses
73system.cpu.itb.write_acv                            0                       # DTB write access violations
74system.cpu.itb.write_accesses                       0                       # DTB write accesses
75system.cpu.itb.data_hits                            0                       # DTB hits
76system.cpu.itb.data_misses                          0                       # DTB misses
77system.cpu.itb.data_acv                             0                       # DTB access violations
78system.cpu.itb.data_accesses                        0                       # DTB accesses
79system.cpu.numPwrStateTransitions               12714                       # Number of power state transitions
80system.cpu.pwrStateClkGateDist::samples          6357                       # Distribution of time spent in the clock gated state
81system.cpu.pwrStateClkGateDist::mean     283043477.146767                       # Distribution of time spent in the clock gated state
82system.cpu.pwrStateClkGateDist::stdev    441371906.848107                       # Distribution of time spent in the clock gated state
83system.cpu.pwrStateClkGateDist::1000-5e+10         6357    100.00%    100.00% # Distribution of time spent in the clock gated state
84system.cpu.pwrStateClkGateDist::min_value       386000                       # Distribution of time spent in the clock gated state
85system.cpu.pwrStateClkGateDist::max_value   2000000000                       # Distribution of time spent in the clock gated state
86system.cpu.pwrStateClkGateDist::total            6357                       # Distribution of time spent in the clock gated state
87system.cpu.pwrStateResidencyTicks::ON     30024619278                       # Cumulative time (in ticks) in various power states
88system.cpu.pwrStateResidencyTicks::CLK_GATED 1799307384222                       # Cumulative time (in ticks) in various power states
89system.cpu.numCycles                       3658670365                       # number of cpu cycles simulated
90system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
91system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
92system.cpu.kern.inst.arm                            0                       # number of arm instructions executed
93system.cpu.kern.inst.quiesce                     6357                       # number of quiesce instructions executed
94system.cpu.kern.inst.hwrei                     211318                       # number of hwrei instructions executed
95system.cpu.kern.ipl_count::0                    74830     40.99%     40.99% # number of times we switched to this ipl
96system.cpu.kern.ipl_count::21                     243      0.13%     41.12% # number of times we switched to this ipl
97system.cpu.kern.ipl_count::22                    1866      1.02%     42.14% # number of times we switched to this ipl
98system.cpu.kern.ipl_count::31                  105622     57.86%    100.00% # number of times we switched to this ipl
99system.cpu.kern.ipl_count::total               182561                       # number of times we switched to this ipl
100system.cpu.kern.ipl_good::0                     73463     49.29%     49.29% # number of times we switched to this ipl from a different ipl
101system.cpu.kern.ipl_good::21                      243      0.16%     49.46% # number of times we switched to this ipl from a different ipl
102system.cpu.kern.ipl_good::22                     1866      1.25%     50.71% # number of times we switched to this ipl from a different ipl
103system.cpu.kern.ipl_good::31                    73463     49.29%    100.00% # number of times we switched to this ipl from a different ipl
104system.cpu.kern.ipl_good::total                149035                       # number of times we switched to this ipl from a different ipl
105system.cpu.kern.ipl_ticks::0             1811929137500     99.05%     99.05% # number of cycles we spent at this ipl
106system.cpu.kern.ipl_ticks::21                20110000      0.00%     99.05% # number of cycles we spent at this ipl
107system.cpu.kern.ipl_ticks::22                80238000      0.00%     99.05% # number of cycles we spent at this ipl
108system.cpu.kern.ipl_ticks::31             17302310500      0.95%    100.00% # number of cycles we spent at this ipl
109system.cpu.kern.ipl_ticks::total         1829331796000                       # number of cycles we spent at this ipl
110system.cpu.kern.ipl_used::0                  0.981732                       # fraction of swpipl calls that actually changed the ipl
111system.cpu.kern.ipl_used::21                        1                       # fraction of swpipl calls that actually changed the ipl
112system.cpu.kern.ipl_used::22                        1                       # fraction of swpipl calls that actually changed the ipl
113system.cpu.kern.ipl_used::31                 0.695527                       # fraction of swpipl calls that actually changed the ipl
114system.cpu.kern.ipl_used::total              0.816357                       # fraction of swpipl calls that actually changed the ipl
115system.cpu.kern.syscall::2                          8      2.45%      2.45% # number of syscalls executed
116system.cpu.kern.syscall::3                         30      9.20%     11.66% # number of syscalls executed
117system.cpu.kern.syscall::4                          4      1.23%     12.88% # number of syscalls executed
118system.cpu.kern.syscall::6                         42     12.88%     25.77% # number of syscalls executed
119system.cpu.kern.syscall::12                         1      0.31%     26.07% # number of syscalls executed
120system.cpu.kern.syscall::15                         1      0.31%     26.38% # number of syscalls executed
121system.cpu.kern.syscall::17                        15      4.60%     30.98% # number of syscalls executed
122system.cpu.kern.syscall::19                        10      3.07%     34.05% # number of syscalls executed
123system.cpu.kern.syscall::20                         6      1.84%     35.89% # number of syscalls executed
124system.cpu.kern.syscall::23                         4      1.23%     37.12% # number of syscalls executed
125system.cpu.kern.syscall::24                         6      1.84%     38.96% # number of syscalls executed
126system.cpu.kern.syscall::33                        11      3.37%     42.33% # number of syscalls executed
127system.cpu.kern.syscall::41                         2      0.61%     42.94% # number of syscalls executed
128system.cpu.kern.syscall::45                        54     16.56%     59.51% # number of syscalls executed
129system.cpu.kern.syscall::47                         6      1.84%     61.35% # number of syscalls executed
130system.cpu.kern.syscall::48                        10      3.07%     64.42% # number of syscalls executed
131system.cpu.kern.syscall::54                        10      3.07%     67.48% # number of syscalls executed
132system.cpu.kern.syscall::58                         1      0.31%     67.79% # number of syscalls executed
133system.cpu.kern.syscall::59                         7      2.15%     69.94% # number of syscalls executed
134system.cpu.kern.syscall::71                        54     16.56%     86.50% # number of syscalls executed
135system.cpu.kern.syscall::73                         3      0.92%     87.42% # number of syscalls executed
136system.cpu.kern.syscall::74                        16      4.91%     92.33% # number of syscalls executed
137system.cpu.kern.syscall::87                         1      0.31%     92.64% # number of syscalls executed
138system.cpu.kern.syscall::90                         3      0.92%     93.56% # number of syscalls executed
139system.cpu.kern.syscall::92                         9      2.76%     96.32% # number of syscalls executed
140system.cpu.kern.syscall::97                         2      0.61%     96.93% # number of syscalls executed
141system.cpu.kern.syscall::98                         2      0.61%     97.55% # number of syscalls executed
142system.cpu.kern.syscall::132                        4      1.23%     98.77% # number of syscalls executed
143system.cpu.kern.syscall::144                        2      0.61%     99.39% # number of syscalls executed
144system.cpu.kern.syscall::147                        2      0.61%    100.00% # number of syscalls executed
145system.cpu.kern.syscall::total                    326                       # number of syscalls executed
146system.cpu.kern.callpal::cserve                     1      0.00%      0.00% # number of callpals executed
147system.cpu.kern.callpal::wrmces                     1      0.00%      0.00% # number of callpals executed
148system.cpu.kern.callpal::wrfen                      1      0.00%      0.00% # number of callpals executed
149system.cpu.kern.callpal::wrvptptr                   1      0.00%      0.00% # number of callpals executed
150system.cpu.kern.callpal::swpctx                  4177      2.17%      2.18% # number of callpals executed
151system.cpu.kern.callpal::tbi                       54      0.03%      2.20% # number of callpals executed
152system.cpu.kern.callpal::wrent                      7      0.00%      2.21% # number of callpals executed
153system.cpu.kern.callpal::swpipl                175248     91.19%     93.40% # number of callpals executed
154system.cpu.kern.callpal::rdps                    6771      3.52%     96.92% # number of callpals executed
155system.cpu.kern.callpal::wrkgp                      1      0.00%     96.92% # number of callpals executed
156system.cpu.kern.callpal::wrusp                      7      0.00%     96.92% # number of callpals executed
157system.cpu.kern.callpal::rdusp                      9      0.00%     96.93% # number of callpals executed
158system.cpu.kern.callpal::whami                      2      0.00%     96.93% # number of callpals executed
159system.cpu.kern.callpal::rti                     5203      2.71%     99.64% # number of callpals executed
160system.cpu.kern.callpal::callsys                  515      0.27%     99.91% # number of callpals executed
161system.cpu.kern.callpal::imb                      181      0.09%    100.00% # number of callpals executed
162system.cpu.kern.callpal::total                 192179                       # number of callpals executed
163system.cpu.kern.mode_switch::kernel              5949                       # number of protection mode switches
164system.cpu.kern.mode_switch::user                1737                       # number of protection mode switches
165system.cpu.kern.mode_switch::idle                2097                       # number of protection mode switches
166system.cpu.kern.mode_good::kernel                1908                      
167system.cpu.kern.mode_good::user                  1737                      
168system.cpu.kern.mode_good::idle                   171                      
169system.cpu.kern.mode_switch_good::kernel     0.320726                       # fraction of useful protection mode switches
170system.cpu.kern.mode_switch_good::user              1                       # fraction of useful protection mode switches
171system.cpu.kern.mode_switch_good::idle       0.081545                       # fraction of useful protection mode switches
172system.cpu.kern.mode_switch_good::total      0.390064                       # fraction of useful protection mode switches
173system.cpu.kern.mode_ticks::kernel        26833316500      1.47%      1.47% # number of ticks spent at the given mode
174system.cpu.kern.mode_ticks::user           1465069000      0.08%      1.55% # number of ticks spent at the given mode
175system.cpu.kern.mode_ticks::idle         1801033409500     98.45%    100.00% # number of ticks spent at the given mode
176system.cpu.kern.swap_context                     4178                       # number of times the context was actually changed
177system.cpu.committedInsts                    60038469                       # Number of instructions committed
178system.cpu.committedOps                      60038469                       # Number of ops (including micro ops) committed
179system.cpu.num_int_alu_accesses              55913692                       # Number of integer alu accesses
180system.cpu.num_fp_alu_accesses                 324460                       # Number of float alu accesses
181system.cpu.num_func_calls                     1484182                       # number of times a function call or return occured
182system.cpu.num_conditional_control_insts      7110791                       # number of instructions that are conditional controls
183system.cpu.num_int_insts                     55913692                       # number of integer instructions
184system.cpu.num_fp_insts                        324460                       # number of float instructions
185system.cpu.num_int_register_reads            76954245                       # number of times the integer registers were read
186system.cpu.num_int_register_writes           41740352                       # number of times the integer registers were written
187system.cpu.num_fp_register_reads               163642                       # number of times the floating registers were read
188system.cpu.num_fp_register_writes              166520                       # number of times the floating registers were written
189system.cpu.num_mem_refs                      16115703                       # number of memory refs
190system.cpu.num_load_insts                     9747509                       # Number of load instructions
191system.cpu.num_store_insts                    6368194                       # Number of store instructions
192system.cpu.num_idle_cycles               3598621022.088898                       # Number of idle cycles
193system.cpu.num_busy_cycles               60049342.911102                       # Number of busy cycles
194system.cpu.not_idle_fraction                 0.016413                       # Percentage of non-idle cycles
195system.cpu.idle_fraction                     0.983587                       # Percentage of idle cycles
196system.cpu.Branches                           9064428                       # Number of branches fetched
197system.cpu.op_class::No_OpClass               3199100      5.33%      5.33% # Class of executed instruction
198system.cpu.op_class::IntAlu                  39448406     65.69%     71.02% # Class of executed instruction
199system.cpu.op_class::IntMult                    60677      0.10%     71.12% # Class of executed instruction
200system.cpu.op_class::IntDiv                         0      0.00%     71.12% # Class of executed instruction
201system.cpu.op_class::FloatAdd                   38087      0.06%     71.18% # Class of executed instruction
202system.cpu.op_class::FloatCmp                       0      0.00%     71.18% # Class of executed instruction
203system.cpu.op_class::FloatCvt                       0      0.00%     71.18% # Class of executed instruction
204system.cpu.op_class::FloatMult                      0      0.00%     71.18% # Class of executed instruction
205system.cpu.op_class::FloatDiv                    3636      0.01%     71.19% # Class of executed instruction
206system.cpu.op_class::FloatSqrt                      0      0.00%     71.19% # Class of executed instruction
207system.cpu.op_class::SimdAdd                        0      0.00%     71.19% # Class of executed instruction
208system.cpu.op_class::SimdAddAcc                     0      0.00%     71.19% # Class of executed instruction
209system.cpu.op_class::SimdAlu                        0      0.00%     71.19% # Class of executed instruction
210system.cpu.op_class::SimdCmp                        0      0.00%     71.19% # Class of executed instruction
211system.cpu.op_class::SimdCvt                        0      0.00%     71.19% # Class of executed instruction
212system.cpu.op_class::SimdMisc                       0      0.00%     71.19% # Class of executed instruction
213system.cpu.op_class::SimdMult                       0      0.00%     71.19% # Class of executed instruction
214system.cpu.op_class::SimdMultAcc                    0      0.00%     71.19% # Class of executed instruction
215system.cpu.op_class::SimdShift                      0      0.00%     71.19% # Class of executed instruction
216system.cpu.op_class::SimdShiftAcc                   0      0.00%     71.19% # Class of executed instruction
217system.cpu.op_class::SimdSqrt                       0      0.00%     71.19% # Class of executed instruction
218system.cpu.op_class::SimdFloatAdd                   0      0.00%     71.19% # Class of executed instruction
219system.cpu.op_class::SimdFloatAlu                   0      0.00%     71.19% # Class of executed instruction
220system.cpu.op_class::SimdFloatCmp                   0      0.00%     71.19% # Class of executed instruction
221system.cpu.op_class::SimdFloatCvt                   0      0.00%     71.19% # Class of executed instruction
222system.cpu.op_class::SimdFloatDiv                   0      0.00%     71.19% # Class of executed instruction
223system.cpu.op_class::SimdFloatMisc                  0      0.00%     71.19% # Class of executed instruction
224system.cpu.op_class::SimdFloatMult                  0      0.00%     71.19% # Class of executed instruction
225system.cpu.op_class::SimdFloatMultAcc               0      0.00%     71.19% # Class of executed instruction
226system.cpu.op_class::SimdFloatSqrt                  0      0.00%     71.19% # Class of executed instruction
227system.cpu.op_class::MemRead                  9975077     16.61%     87.80% # Class of executed instruction
228system.cpu.op_class::MemWrite                 6374115     10.61%     98.42% # Class of executed instruction
229system.cpu.op_class::IprAccess                 951209      1.58%    100.00% # Class of executed instruction
230system.cpu.op_class::InstPrefetch                   0      0.00%    100.00% # Class of executed instruction
231system.cpu.op_class::total                   60050307                       # Class of executed instruction
232system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
233system.cpu.dcache.tags.replacements           2042707                       # number of replacements
234system.cpu.dcache.tags.tagsinuse           511.997802                       # Cycle average of tags in use
235system.cpu.dcache.tags.total_refs            14038420                       # Total number of references to valid blocks.
236system.cpu.dcache.tags.sampled_refs           2043219                       # Sample count of references to valid blocks.
237system.cpu.dcache.tags.avg_refs              6.870737                       # Average number of references to valid blocks.
238system.cpu.dcache.tags.warmup_cycle          10840000                       # Cycle when the warmup percentage was hit.
239system.cpu.dcache.tags.occ_blocks::cpu.data   511.997802                       # Average occupied blocks per requestor
240system.cpu.dcache.tags.occ_percent::cpu.data     0.999996                       # Average percentage of cache occupancy
241system.cpu.dcache.tags.occ_percent::total     0.999996                       # Average percentage of cache occupancy
242system.cpu.dcache.tags.occ_task_id_blocks::1024          512                       # Occupied blocks per task id
243system.cpu.dcache.tags.age_task_id_blocks_1024::0          443                       # Occupied blocks per task id
244system.cpu.dcache.tags.age_task_id_blocks_1024::1           66                       # Occupied blocks per task id
245system.cpu.dcache.tags.age_task_id_blocks_1024::2            3                       # Occupied blocks per task id
246system.cpu.dcache.tags.occ_task_id_percent::1024            1                       # Percentage of cache occupancy per task id
247system.cpu.dcache.tags.tag_accesses          66369780                       # Number of tag accesses
248system.cpu.dcache.tags.data_accesses         66369780                       # Number of data accesses
249system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
250system.cpu.dcache.ReadReq_hits::cpu.data      7807772                       # number of ReadReq hits
251system.cpu.dcache.ReadReq_hits::total         7807772                       # number of ReadReq hits
252system.cpu.dcache.WriteReq_hits::cpu.data      5848209                       # number of WriteReq hits
253system.cpu.dcache.WriteReq_hits::total        5848209                       # number of WriteReq hits
254system.cpu.dcache.LoadLockedReq_hits::cpu.data       183141                       # number of LoadLockedReq hits
255system.cpu.dcache.LoadLockedReq_hits::total       183141                       # number of LoadLockedReq hits
256system.cpu.dcache.StoreCondReq_hits::cpu.data       199282                       # number of StoreCondReq hits
257system.cpu.dcache.StoreCondReq_hits::total       199282                       # number of StoreCondReq hits
258system.cpu.dcache.demand_hits::cpu.data      13655981                       # number of demand (read+write) hits
259system.cpu.dcache.demand_hits::total         13655981                       # number of demand (read+write) hits
260system.cpu.dcache.overall_hits::cpu.data     13655981                       # number of overall hits
261system.cpu.dcache.overall_hits::total        13655981                       # number of overall hits
262system.cpu.dcache.ReadReq_misses::cpu.data      1721711                       # number of ReadReq misses
263system.cpu.dcache.ReadReq_misses::total       1721711                       # number of ReadReq misses
264system.cpu.dcache.WriteReq_misses::cpu.data       304363                       # number of WriteReq misses
265system.cpu.dcache.WriteReq_misses::total       304363                       # number of WriteReq misses
266system.cpu.dcache.LoadLockedReq_misses::cpu.data        17162                       # number of LoadLockedReq misses
267system.cpu.dcache.LoadLockedReq_misses::total        17162                       # number of LoadLockedReq misses
268system.cpu.dcache.demand_misses::cpu.data      2026074                       # number of demand (read+write) misses
269system.cpu.dcache.demand_misses::total        2026074                       # number of demand (read+write) misses
270system.cpu.dcache.overall_misses::cpu.data      2026074                       # number of overall misses
271system.cpu.dcache.overall_misses::total       2026074                       # number of overall misses
272system.cpu.dcache.ReadReq_accesses::cpu.data      9529483                       # number of ReadReq accesses(hits+misses)
273system.cpu.dcache.ReadReq_accesses::total      9529483                       # number of ReadReq accesses(hits+misses)
274system.cpu.dcache.WriteReq_accesses::cpu.data      6152572                       # number of WriteReq accesses(hits+misses)
275system.cpu.dcache.WriteReq_accesses::total      6152572                       # number of WriteReq accesses(hits+misses)
276system.cpu.dcache.LoadLockedReq_accesses::cpu.data       200303                       # number of LoadLockedReq accesses(hits+misses)
277system.cpu.dcache.LoadLockedReq_accesses::total       200303                       # number of LoadLockedReq accesses(hits+misses)
278system.cpu.dcache.StoreCondReq_accesses::cpu.data       199282                       # number of StoreCondReq accesses(hits+misses)
279system.cpu.dcache.StoreCondReq_accesses::total       199282                       # number of StoreCondReq accesses(hits+misses)
280system.cpu.dcache.demand_accesses::cpu.data     15682055                       # number of demand (read+write) accesses
281system.cpu.dcache.demand_accesses::total     15682055                       # number of demand (read+write) accesses
282system.cpu.dcache.overall_accesses::cpu.data     15682055                       # number of overall (read+write) accesses
283system.cpu.dcache.overall_accesses::total     15682055                       # number of overall (read+write) accesses
284system.cpu.dcache.ReadReq_miss_rate::cpu.data     0.180672                       # miss rate for ReadReq accesses
285system.cpu.dcache.ReadReq_miss_rate::total     0.180672                       # miss rate for ReadReq accesses
286system.cpu.dcache.WriteReq_miss_rate::cpu.data     0.049469                       # miss rate for WriteReq accesses
287system.cpu.dcache.WriteReq_miss_rate::total     0.049469                       # miss rate for WriteReq accesses
288system.cpu.dcache.LoadLockedReq_miss_rate::cpu.data     0.085680                       # miss rate for LoadLockedReq accesses
289system.cpu.dcache.LoadLockedReq_miss_rate::total     0.085680                       # miss rate for LoadLockedReq accesses
290system.cpu.dcache.demand_miss_rate::cpu.data     0.129197                       # miss rate for demand accesses
291system.cpu.dcache.demand_miss_rate::total     0.129197                       # miss rate for demand accesses
292system.cpu.dcache.overall_miss_rate::cpu.data     0.129197                       # miss rate for overall accesses
293system.cpu.dcache.overall_miss_rate::total     0.129197                       # miss rate for overall accesses
294system.cpu.dcache.blocked_cycles::no_mshrs            0                       # number of cycles access was blocked
295system.cpu.dcache.blocked_cycles::no_targets            0                       # number of cycles access was blocked
296system.cpu.dcache.blocked::no_mshrs                 0                       # number of cycles access was blocked
297system.cpu.dcache.blocked::no_targets               0                       # number of cycles access was blocked
298system.cpu.dcache.avg_blocked_cycles::no_mshrs          nan                       # average number of cycles each access was blocked
299system.cpu.dcache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
300system.cpu.dcache.writebacks::writebacks       833476                       # number of writebacks
301system.cpu.dcache.writebacks::total            833476                       # number of writebacks
302system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
303system.cpu.icache.tags.replacements            919606                       # number of replacements
304system.cpu.icache.tags.tagsinuse           511.215257                       # Cycle average of tags in use
305system.cpu.icache.tags.total_refs            59130074                       # Total number of references to valid blocks.
306system.cpu.icache.tags.sampled_refs            920118                       # Sample count of references to valid blocks.
307system.cpu.icache.tags.avg_refs             64.263577                       # Average number of references to valid blocks.
308system.cpu.icache.tags.warmup_cycle        9686452000                       # Cycle when the warmup percentage was hit.
309system.cpu.icache.tags.occ_blocks::cpu.inst   511.215257                       # Average occupied blocks per requestor
310system.cpu.icache.tags.occ_percent::cpu.inst     0.998467                       # Average percentage of cache occupancy
311system.cpu.icache.tags.occ_percent::total     0.998467                       # Average percentage of cache occupancy
312system.cpu.icache.tags.occ_task_id_blocks::1024          512                       # Occupied blocks per task id
313system.cpu.icache.tags.age_task_id_blocks_1024::0           63                       # Occupied blocks per task id
314system.cpu.icache.tags.age_task_id_blocks_1024::1          117                       # Occupied blocks per task id
315system.cpu.icache.tags.age_task_id_blocks_1024::2          332                       # Occupied blocks per task id
316system.cpu.icache.tags.occ_task_id_percent::1024            1                       # Percentage of cache occupancy per task id
317system.cpu.icache.tags.tag_accesses          60970540                       # Number of tag accesses
318system.cpu.icache.tags.data_accesses         60970540                       # Number of data accesses
319system.cpu.icache.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
320system.cpu.icache.ReadReq_hits::cpu.inst     59130074                       # number of ReadReq hits
321system.cpu.icache.ReadReq_hits::total        59130074                       # number of ReadReq hits
322system.cpu.icache.demand_hits::cpu.inst      59130074                       # number of demand (read+write) hits
323system.cpu.icache.demand_hits::total         59130074                       # number of demand (read+write) hits
324system.cpu.icache.overall_hits::cpu.inst     59130074                       # number of overall hits
325system.cpu.icache.overall_hits::total        59130074                       # number of overall hits
326system.cpu.icache.ReadReq_misses::cpu.inst       920233                       # number of ReadReq misses
327system.cpu.icache.ReadReq_misses::total        920233                       # number of ReadReq misses
328system.cpu.icache.demand_misses::cpu.inst       920233                       # number of demand (read+write) misses
329system.cpu.icache.demand_misses::total         920233                       # number of demand (read+write) misses
330system.cpu.icache.overall_misses::cpu.inst       920233                       # number of overall misses
331system.cpu.icache.overall_misses::total        920233                       # number of overall misses
332system.cpu.icache.ReadReq_accesses::cpu.inst     60050307                       # number of ReadReq accesses(hits+misses)
333system.cpu.icache.ReadReq_accesses::total     60050307                       # number of ReadReq accesses(hits+misses)
334system.cpu.icache.demand_accesses::cpu.inst     60050307                       # number of demand (read+write) accesses
335system.cpu.icache.demand_accesses::total     60050307                       # number of demand (read+write) accesses
336system.cpu.icache.overall_accesses::cpu.inst     60050307                       # number of overall (read+write) accesses
337system.cpu.icache.overall_accesses::total     60050307                       # number of overall (read+write) accesses
338system.cpu.icache.ReadReq_miss_rate::cpu.inst     0.015324                       # miss rate for ReadReq accesses
339system.cpu.icache.ReadReq_miss_rate::total     0.015324                       # miss rate for ReadReq accesses
340system.cpu.icache.demand_miss_rate::cpu.inst     0.015324                       # miss rate for demand accesses
341system.cpu.icache.demand_miss_rate::total     0.015324                       # miss rate for demand accesses
342system.cpu.icache.overall_miss_rate::cpu.inst     0.015324                       # miss rate for overall accesses
343system.cpu.icache.overall_miss_rate::total     0.015324                       # miss rate for overall accesses
344system.cpu.icache.blocked_cycles::no_mshrs            0                       # number of cycles access was blocked
345system.cpu.icache.blocked_cycles::no_targets            0                       # number of cycles access was blocked
346system.cpu.icache.blocked::no_mshrs                 0                       # number of cycles access was blocked
347system.cpu.icache.blocked::no_targets               0                       # number of cycles access was blocked
348system.cpu.icache.avg_blocked_cycles::no_mshrs          nan                       # average number of cycles each access was blocked
349system.cpu.icache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
350system.cpu.icache.writebacks::writebacks       919606                       # number of writebacks
351system.cpu.icache.writebacks::total            919606                       # number of writebacks
352system.cpu.l2cache.tags.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
353system.cpu.l2cache.tags.replacements           992419                       # number of replacements
354system.cpu.l2cache.tags.tagsinuse        65520.104765                       # Cycle average of tags in use
355system.cpu.l2cache.tags.total_refs            4865571                       # Total number of references to valid blocks.
356system.cpu.l2cache.tags.sampled_refs          1057941                       # Sample count of references to valid blocks.
357system.cpu.l2cache.tags.avg_refs             4.599095                       # Average number of references to valid blocks.
358system.cpu.l2cache.tags.warmup_cycle        614754000                       # Cycle when the warmup percentage was hit.
359system.cpu.l2cache.tags.occ_blocks::writebacks   264.552906                       # Average occupied blocks per requestor
360system.cpu.l2cache.tags.occ_blocks::cpu.inst  4852.732213                       # Average occupied blocks per requestor
361system.cpu.l2cache.tags.occ_blocks::cpu.data 60402.819646                       # Average occupied blocks per requestor
362system.cpu.l2cache.tags.occ_percent::writebacks     0.004037                       # Average percentage of cache occupancy
363system.cpu.l2cache.tags.occ_percent::cpu.inst     0.074047                       # Average percentage of cache occupancy
364system.cpu.l2cache.tags.occ_percent::cpu.data     0.921674                       # Average percentage of cache occupancy
365system.cpu.l2cache.tags.occ_percent::total     0.999757                       # Average percentage of cache occupancy
366system.cpu.l2cache.tags.occ_task_id_blocks::1024        65522                       # Occupied blocks per task id
367system.cpu.l2cache.tags.age_task_id_blocks_1024::0          168                       # Occupied blocks per task id
368system.cpu.l2cache.tags.age_task_id_blocks_1024::1          606                       # Occupied blocks per task id
369system.cpu.l2cache.tags.age_task_id_blocks_1024::2         3042                       # Occupied blocks per task id
370system.cpu.l2cache.tags.age_task_id_blocks_1024::3         6629                       # Occupied blocks per task id
371system.cpu.l2cache.tags.age_task_id_blocks_1024::4        55077                       # Occupied blocks per task id
372system.cpu.l2cache.tags.occ_task_id_percent::1024     0.999786                       # Percentage of cache occupancy per task id
373system.cpu.l2cache.tags.tag_accesses         48449706                       # Number of tag accesses
374system.cpu.l2cache.tags.data_accesses        48449706                       # Number of data accesses
375system.cpu.l2cache.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
376system.cpu.l2cache.WritebackDirty_hits::writebacks       833476                       # number of WritebackDirty hits
377system.cpu.l2cache.WritebackDirty_hits::total       833476                       # number of WritebackDirty hits
378system.cpu.l2cache.WritebackClean_hits::writebacks       919354                       # number of WritebackClean hits
379system.cpu.l2cache.WritebackClean_hits::total       919354                       # number of WritebackClean hits
380system.cpu.l2cache.UpgradeReq_hits::cpu.data           12                       # number of UpgradeReq hits
381system.cpu.l2cache.UpgradeReq_hits::total           12                       # number of UpgradeReq hits
382system.cpu.l2cache.ReadExReq_hits::cpu.data       187293                       # number of ReadExReq hits
383system.cpu.l2cache.ReadExReq_hits::total       187293                       # number of ReadExReq hits
384system.cpu.l2cache.ReadCleanReq_hits::cpu.inst       906926                       # number of ReadCleanReq hits
385system.cpu.l2cache.ReadCleanReq_hits::total       906926                       # number of ReadCleanReq hits
386system.cpu.l2cache.ReadSharedReq_hits::cpu.data       811229                       # number of ReadSharedReq hits
387system.cpu.l2cache.ReadSharedReq_hits::total       811229                       # number of ReadSharedReq hits
388system.cpu.l2cache.demand_hits::cpu.inst       906926                       # number of demand (read+write) hits
389system.cpu.l2cache.demand_hits::cpu.data       998522                       # number of demand (read+write) hits
390system.cpu.l2cache.demand_hits::total         1905448                       # number of demand (read+write) hits
391system.cpu.l2cache.overall_hits::cpu.inst       906926                       # number of overall hits
392system.cpu.l2cache.overall_hits::cpu.data       998522                       # number of overall hits
393system.cpu.l2cache.overall_hits::total        1905448                       # number of overall hits
394system.cpu.l2cache.UpgradeReq_misses::cpu.data            4                       # number of UpgradeReq misses
395system.cpu.l2cache.UpgradeReq_misses::total            4                       # number of UpgradeReq misses
396system.cpu.l2cache.ReadExReq_misses::cpu.data       117054                       # number of ReadExReq misses
397system.cpu.l2cache.ReadExReq_misses::total       117054                       # number of ReadExReq misses
398system.cpu.l2cache.ReadCleanReq_misses::cpu.inst        13289                       # number of ReadCleanReq misses
399system.cpu.l2cache.ReadCleanReq_misses::total        13289                       # number of ReadCleanReq misses
400system.cpu.l2cache.ReadSharedReq_misses::cpu.data       927644                       # number of ReadSharedReq misses
401system.cpu.l2cache.ReadSharedReq_misses::total       927644                       # number of ReadSharedReq misses
402system.cpu.l2cache.demand_misses::cpu.inst        13289                       # number of demand (read+write) misses
403system.cpu.l2cache.demand_misses::cpu.data      1044698                       # number of demand (read+write) misses
404system.cpu.l2cache.demand_misses::total       1057987                       # number of demand (read+write) misses
405system.cpu.l2cache.overall_misses::cpu.inst        13289                       # number of overall misses
406system.cpu.l2cache.overall_misses::cpu.data      1044698                       # number of overall misses
407system.cpu.l2cache.overall_misses::total      1057987                       # number of overall misses
408system.cpu.l2cache.WritebackDirty_accesses::writebacks       833476                       # number of WritebackDirty accesses(hits+misses)
409system.cpu.l2cache.WritebackDirty_accesses::total       833476                       # number of WritebackDirty accesses(hits+misses)
410system.cpu.l2cache.WritebackClean_accesses::writebacks       919354                       # number of WritebackClean accesses(hits+misses)
411system.cpu.l2cache.WritebackClean_accesses::total       919354                       # number of WritebackClean accesses(hits+misses)
412system.cpu.l2cache.UpgradeReq_accesses::cpu.data           16                       # number of UpgradeReq accesses(hits+misses)
413system.cpu.l2cache.UpgradeReq_accesses::total           16                       # number of UpgradeReq accesses(hits+misses)
414system.cpu.l2cache.ReadExReq_accesses::cpu.data       304347                       # number of ReadExReq accesses(hits+misses)
415system.cpu.l2cache.ReadExReq_accesses::total       304347                       # number of ReadExReq accesses(hits+misses)
416system.cpu.l2cache.ReadCleanReq_accesses::cpu.inst       920215                       # number of ReadCleanReq accesses(hits+misses)
417system.cpu.l2cache.ReadCleanReq_accesses::total       920215                       # number of ReadCleanReq accesses(hits+misses)
418system.cpu.l2cache.ReadSharedReq_accesses::cpu.data      1738873                       # number of ReadSharedReq accesses(hits+misses)
419system.cpu.l2cache.ReadSharedReq_accesses::total      1738873                       # number of ReadSharedReq accesses(hits+misses)
420system.cpu.l2cache.demand_accesses::cpu.inst       920215                       # number of demand (read+write) accesses
421system.cpu.l2cache.demand_accesses::cpu.data      2043220                       # number of demand (read+write) accesses
422system.cpu.l2cache.demand_accesses::total      2963435                       # number of demand (read+write) accesses
423system.cpu.l2cache.overall_accesses::cpu.inst       920215                       # number of overall (read+write) accesses
424system.cpu.l2cache.overall_accesses::cpu.data      2043220                       # number of overall (read+write) accesses
425system.cpu.l2cache.overall_accesses::total      2963435                       # number of overall (read+write) accesses
426system.cpu.l2cache.UpgradeReq_miss_rate::cpu.data     0.250000                       # miss rate for UpgradeReq accesses
427system.cpu.l2cache.UpgradeReq_miss_rate::total     0.250000                       # miss rate for UpgradeReq accesses
428system.cpu.l2cache.ReadExReq_miss_rate::cpu.data     0.384607                       # miss rate for ReadExReq accesses
429system.cpu.l2cache.ReadExReq_miss_rate::total     0.384607                       # miss rate for ReadExReq accesses
430system.cpu.l2cache.ReadCleanReq_miss_rate::cpu.inst     0.014441                       # miss rate for ReadCleanReq accesses
431system.cpu.l2cache.ReadCleanReq_miss_rate::total     0.014441                       # miss rate for ReadCleanReq accesses
432system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.data     0.533474                       # miss rate for ReadSharedReq accesses
433system.cpu.l2cache.ReadSharedReq_miss_rate::total     0.533474                       # miss rate for ReadSharedReq accesses
434system.cpu.l2cache.demand_miss_rate::cpu.inst     0.014441                       # miss rate for demand accesses
435system.cpu.l2cache.demand_miss_rate::cpu.data     0.511300                       # miss rate for demand accesses
436system.cpu.l2cache.demand_miss_rate::total     0.357014                       # miss rate for demand accesses
437system.cpu.l2cache.overall_miss_rate::cpu.inst     0.014441                       # miss rate for overall accesses
438system.cpu.l2cache.overall_miss_rate::cpu.data     0.511300                       # miss rate for overall accesses
439system.cpu.l2cache.overall_miss_rate::total     0.357014                       # miss rate for overall accesses
440system.cpu.l2cache.blocked_cycles::no_mshrs            0                       # number of cycles access was blocked
441system.cpu.l2cache.blocked_cycles::no_targets            0                       # number of cycles access was blocked
442system.cpu.l2cache.blocked::no_mshrs                0                       # number of cycles access was blocked
443system.cpu.l2cache.blocked::no_targets              0                       # number of cycles access was blocked
444system.cpu.l2cache.avg_blocked_cycles::no_mshrs          nan                       # average number of cycles each access was blocked
445system.cpu.l2cache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
446system.cpu.l2cache.writebacks::writebacks        74359                       # number of writebacks
447system.cpu.l2cache.writebacks::total            74359                       # number of writebacks
448system.cpu.toL2Bus.snoop_filter.tot_requests      5925782                       # Total number of requests made to the snoop filter.
449system.cpu.toL2Bus.snoop_filter.hit_single_requests      2962435                       # Number of requests hitting in the snoop filter with a single holder of the requested data.
450system.cpu.toL2Bus.snoop_filter.hit_multi_requests         1834                       # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
451system.cpu.toL2Bus.snoop_filter.tot_snoops         1449                       # Total number of snoops made to the snoop filter.
452system.cpu.toL2Bus.snoop_filter.hit_single_snoops         1449                       # Number of snoops hitting in the snoop filter with a single holder of the requested data.
453system.cpu.toL2Bus.snoop_filter.hit_multi_snoops            0                       # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
454system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
455system.cpu.toL2Bus.trans_dist::ReadReq           7184                       # Transaction distribution
456system.cpu.toL2Bus.trans_dist::ReadResp       2666290                       # Transaction distribution
457system.cpu.toL2Bus.trans_dist::WriteReq          9838                       # Transaction distribution
458system.cpu.toL2Bus.trans_dist::WriteResp         9838                       # Transaction distribution
459system.cpu.toL2Bus.trans_dist::WritebackDirty       833476                       # Transaction distribution
460system.cpu.toL2Bus.trans_dist::WritebackClean       919606                       # Transaction distribution
461system.cpu.toL2Bus.trans_dist::CleanEvict      1209231                       # Transaction distribution
462system.cpu.toL2Bus.trans_dist::UpgradeReq           16                       # Transaction distribution
463system.cpu.toL2Bus.trans_dist::UpgradeResp           16                       # Transaction distribution
464system.cpu.toL2Bus.trans_dist::ReadExReq       304347                       # Transaction distribution
465system.cpu.toL2Bus.trans_dist::ReadExResp       304347                       # Transaction distribution
466system.cpu.toL2Bus.trans_dist::ReadCleanReq       920233                       # Transaction distribution
467system.cpu.toL2Bus.trans_dist::ReadSharedReq      1738873                       # Transaction distribution
468system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side      2760072                       # Packet count per connected master and slave (bytes)
469system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side      6163223                       # Packet count per connected master and slave (bytes)
470system.cpu.toL2Bus.pkt_count::total           8923295                       # Packet count per connected master and slave (bytes)
471system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side    117749696                       # Cumulative packet size per connected master and slave (bytes)
472system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side    184154670                       # Cumulative packet size per connected master and slave (bytes)
473system.cpu.toL2Bus.pkt_size::total          301904366                       # Cumulative packet size per connected master and slave (bytes)
474system.cpu.toL2Bus.snoops                      993364                       # Total snoops (count)
475system.cpu.toL2Bus.snoopTraffic               4774656                       # Total snoop traffic (bytes)
476system.cpu.toL2Bus.snoop_fanout::samples      6936011                       # Request fanout histogram
477system.cpu.toL2Bus.snoop_fanout::mean        0.000753                       # Request fanout histogram
478system.cpu.toL2Bus.snoop_fanout::stdev       0.027431                       # Request fanout histogram
479system.cpu.toL2Bus.snoop_fanout::underflows            0      0.00%      0.00% # Request fanout histogram
480system.cpu.toL2Bus.snoop_fanout::0            6930788     99.92%     99.92% # Request fanout histogram
481system.cpu.toL2Bus.snoop_fanout::1               5223      0.08%    100.00% # Request fanout histogram
482system.cpu.toL2Bus.snoop_fanout::2                  0      0.00%    100.00% # Request fanout histogram
483system.cpu.toL2Bus.snoop_fanout::overflows            0      0.00%    100.00% # Request fanout histogram
484system.cpu.toL2Bus.snoop_fanout::min_value            0                       # Request fanout histogram
485system.cpu.toL2Bus.snoop_fanout::max_value            1                       # Request fanout histogram
486system.cpu.toL2Bus.snoop_fanout::total        6936011                       # Request fanout histogram
487system.disk0.dma_read_full_pages                    0                       # Number of full page size DMA reads (not PRD).
488system.disk0.dma_read_bytes                      1024                       # Number of bytes transfered via DMA reads (not PRD).
489system.disk0.dma_read_txs                           1                       # Number of DMA read transactions (not PRD).
490system.disk0.dma_write_full_pages                 298                       # Number of full page size DMA writes.
491system.disk0.dma_write_bytes                  2651136                       # Number of bytes transfered via DMA writes.
492system.disk0.dma_write_txs                        395                       # Number of DMA write transactions.
493system.disk2.dma_read_full_pages                    0                       # Number of full page size DMA reads (not PRD).
494system.disk2.dma_read_bytes                         0                       # Number of bytes transfered via DMA reads (not PRD).
495system.disk2.dma_read_txs                           0                       # Number of DMA read transactions (not PRD).
496system.disk2.dma_write_full_pages                   1                       # Number of full page size DMA writes.
497system.disk2.dma_write_bytes                     8192                       # Number of bytes transfered via DMA writes.
498system.disk2.dma_write_txs                          1                       # Number of DMA write transactions.
499system.iobus.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
500system.iobus.trans_dist::ReadReq                 7358                       # Transaction distribution
501system.iobus.trans_dist::ReadResp                7358                       # Transaction distribution
502system.iobus.trans_dist::WriteReq               51390                       # Transaction distribution
503system.iobus.trans_dist::WriteResp              51390                       # Transaction distribution
504system.iobus.pkt_count_system.bridge.master::system.tsunami.cchip.pio         5248                       # Packet count per connected master and slave (bytes)
505system.iobus.pkt_count_system.bridge.master::system.tsunami.pchip.pio         1010                       # Packet count per connected master and slave (bytes)
506system.iobus.pkt_count_system.bridge.master::system.tsunami.fake_sm_chip.pio           10                       # Packet count per connected master and slave (bytes)
507system.iobus.pkt_count_system.bridge.master::system.tsunami.fake_uart4.pio           10                       # Packet count per connected master and slave (bytes)
508system.iobus.pkt_count_system.bridge.master::system.tsunami.io.pio         1076                       # Packet count per connected master and slave (bytes)
509system.iobus.pkt_count_system.bridge.master::system.tsunami.uart.pio        18012                       # Packet count per connected master and slave (bytes)
510system.iobus.pkt_count_system.bridge.master::system.tsunami.backdoor.pio         1904                       # Packet count per connected master and slave (bytes)
511system.iobus.pkt_count_system.bridge.master::system.tsunami.ide.pio         6672                       # Packet count per connected master and slave (bytes)
512system.iobus.pkt_count_system.bridge.master::system.tsunami.ethernet.pio          102                       # Packet count per connected master and slave (bytes)
513system.iobus.pkt_count_system.bridge.master::total        34044                       # Packet count per connected master and slave (bytes)
514system.iobus.pkt_count_system.tsunami.ide.dma::system.iocache.cpu_side        83452                       # Packet count per connected master and slave (bytes)
515system.iobus.pkt_count_system.tsunami.ide.dma::total        83452                       # Packet count per connected master and slave (bytes)
516system.iobus.pkt_count::total                  117496                       # Packet count per connected master and slave (bytes)
517system.iobus.pkt_size_system.bridge.master::system.tsunami.cchip.pio        20992                       # Cumulative packet size per connected master and slave (bytes)
518system.iobus.pkt_size_system.bridge.master::system.tsunami.pchip.pio         2733                       # Cumulative packet size per connected master and slave (bytes)
519system.iobus.pkt_size_system.bridge.master::system.tsunami.fake_sm_chip.pio            5                       # Cumulative packet size per connected master and slave (bytes)
520system.iobus.pkt_size_system.bridge.master::system.tsunami.fake_uart4.pio            5                       # Cumulative packet size per connected master and slave (bytes)
521system.iobus.pkt_size_system.bridge.master::system.tsunami.io.pio         1392                       # Cumulative packet size per connected master and slave (bytes)
522system.iobus.pkt_size_system.bridge.master::system.tsunami.uart.pio         9006                       # Cumulative packet size per connected master and slave (bytes)
523system.iobus.pkt_size_system.bridge.master::system.tsunami.backdoor.pio         7596                       # Cumulative packet size per connected master and slave (bytes)
524system.iobus.pkt_size_system.bridge.master::system.tsunami.ide.pio         4193                       # Cumulative packet size per connected master and slave (bytes)
525system.iobus.pkt_size_system.bridge.master::system.tsunami.ethernet.pio          204                       # Cumulative packet size per connected master and slave (bytes)
526system.iobus.pkt_size_system.bridge.master::total        46126                       # Cumulative packet size per connected master and slave (bytes)
527system.iobus.pkt_size_system.tsunami.ide.dma::system.iocache.cpu_side      2661616                       # Cumulative packet size per connected master and slave (bytes)
528system.iobus.pkt_size_system.tsunami.ide.dma::total      2661616                       # Cumulative packet size per connected master and slave (bytes)
529system.iobus.pkt_size::total                  2707742                       # Cumulative packet size per connected master and slave (bytes)
530system.iocache.tags.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
531system.iocache.tags.replacements                41686                       # number of replacements
532system.iocache.tags.tagsinuse                1.225569                       # Cycle average of tags in use
533system.iocache.tags.total_refs                      0                       # Total number of references to valid blocks.
534system.iocache.tags.sampled_refs                41702                       # Sample count of references to valid blocks.
535system.iocache.tags.avg_refs                        0                       # Average number of references to valid blocks.
536system.iocache.tags.warmup_cycle         1685780588017                       # Cycle when the warmup percentage was hit.
537system.iocache.tags.occ_blocks::tsunami.ide     1.225569                       # Average occupied blocks per requestor
538system.iocache.tags.occ_percent::tsunami.ide     0.076598                       # Average percentage of cache occupancy
539system.iocache.tags.occ_percent::total       0.076598                       # Average percentage of cache occupancy
540system.iocache.tags.occ_task_id_blocks::1023           16                       # Occupied blocks per task id
541system.iocache.tags.age_task_id_blocks_1023::2           16                       # Occupied blocks per task id
542system.iocache.tags.occ_task_id_percent::1023            1                       # Percentage of cache occupancy per task id
543system.iocache.tags.tag_accesses               375534                       # Number of tag accesses
544system.iocache.tags.data_accesses              375534                       # Number of data accesses
545system.iocache.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
546system.iocache.ReadReq_misses::tsunami.ide          174                       # number of ReadReq misses
547system.iocache.ReadReq_misses::total              174                       # number of ReadReq misses
548system.iocache.WriteLineReq_misses::tsunami.ide        41552                       # number of WriteLineReq misses
549system.iocache.WriteLineReq_misses::total        41552                       # number of WriteLineReq misses
550system.iocache.demand_misses::tsunami.ide        41726                       # number of demand (read+write) misses
551system.iocache.demand_misses::total             41726                       # number of demand (read+write) misses
552system.iocache.overall_misses::tsunami.ide        41726                       # number of overall misses
553system.iocache.overall_misses::total            41726                       # number of overall misses
554system.iocache.ReadReq_accesses::tsunami.ide          174                       # number of ReadReq accesses(hits+misses)
555system.iocache.ReadReq_accesses::total            174                       # number of ReadReq accesses(hits+misses)
556system.iocache.WriteLineReq_accesses::tsunami.ide        41552                       # number of WriteLineReq accesses(hits+misses)
557system.iocache.WriteLineReq_accesses::total        41552                       # number of WriteLineReq accesses(hits+misses)
558system.iocache.demand_accesses::tsunami.ide        41726                       # number of demand (read+write) accesses
559system.iocache.demand_accesses::total           41726                       # number of demand (read+write) accesses
560system.iocache.overall_accesses::tsunami.ide        41726                       # number of overall (read+write) accesses
561system.iocache.overall_accesses::total          41726                       # number of overall (read+write) accesses
562system.iocache.ReadReq_miss_rate::tsunami.ide            1                       # miss rate for ReadReq accesses
563system.iocache.ReadReq_miss_rate::total             1                       # miss rate for ReadReq accesses
564system.iocache.WriteLineReq_miss_rate::tsunami.ide            1                       # miss rate for WriteLineReq accesses
565system.iocache.WriteLineReq_miss_rate::total            1                       # miss rate for WriteLineReq accesses
566system.iocache.demand_miss_rate::tsunami.ide            1                       # miss rate for demand accesses
567system.iocache.demand_miss_rate::total              1                       # miss rate for demand accesses
568system.iocache.overall_miss_rate::tsunami.ide            1                       # miss rate for overall accesses
569system.iocache.overall_miss_rate::total             1                       # miss rate for overall accesses
570system.iocache.blocked_cycles::no_mshrs             0                       # number of cycles access was blocked
571system.iocache.blocked_cycles::no_targets            0                       # number of cycles access was blocked
572system.iocache.blocked::no_mshrs                    0                       # number of cycles access was blocked
573system.iocache.blocked::no_targets                  0                       # number of cycles access was blocked
574system.iocache.avg_blocked_cycles::no_mshrs          nan                       # average number of cycles each access was blocked
575system.iocache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
576system.iocache.writebacks::writebacks           41512                       # number of writebacks
577system.iocache.writebacks::total                41512                       # number of writebacks
578system.membus.snoop_filter.tot_requests       2132776                       # Total number of requests made to the snoop filter.
579system.membus.snoop_filter.hit_single_requests      1034179                       # Number of requests hitting in the snoop filter with a single holder of the requested data.
580system.membus.snoop_filter.hit_multi_requests          408                       # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
581system.membus.snoop_filter.tot_snoops               0                       # Total number of snoops made to the snoop filter.
582system.membus.snoop_filter.hit_single_snoops            0                       # Number of snoops hitting in the snoop filter with a single holder of the requested data.
583system.membus.snoop_filter.hit_multi_snoops            0                       # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
584system.membus.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
585system.membus.trans_dist::ReadReq                7184                       # Transaction distribution
586system.membus.trans_dist::ReadResp             948291                       # Transaction distribution
587system.membus.trans_dist::WriteReq               9838                       # Transaction distribution
588system.membus.trans_dist::WriteResp              9838                       # Transaction distribution
589system.membus.trans_dist::WritebackDirty       115871                       # Transaction distribution
590system.membus.trans_dist::CleanEvict           917188                       # Transaction distribution
591system.membus.trans_dist::UpgradeReq              133                       # Transaction distribution
592system.membus.trans_dist::UpgradeResp             133                       # Transaction distribution
593system.membus.trans_dist::ReadExReq            116925                       # Transaction distribution
594system.membus.trans_dist::ReadExResp           116925                       # Transaction distribution
595system.membus.trans_dist::ReadSharedReq        941107                       # Transaction distribution
596system.membus.trans_dist::InvalidateReq         41552                       # Transaction distribution
597system.membus.trans_dist::InvalidateResp        41552                       # Transaction distribution
598system.membus.pkt_count_system.cpu.l2cache.mem_side::system.bridge.slave        34044                       # Packet count per connected master and slave (bytes)
599system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port      3107355                       # Packet count per connected master and slave (bytes)
600system.membus.pkt_count_system.cpu.l2cache.mem_side::total      3141399                       # Packet count per connected master and slave (bytes)
601system.membus.pkt_count_system.iocache.mem_side::system.physmem.port       125138                       # Packet count per connected master and slave (bytes)
602system.membus.pkt_count_system.iocache.mem_side::total       125138                       # Packet count per connected master and slave (bytes)
603system.membus.pkt_count::total                3266537                       # Packet count per connected master and slave (bytes)
604system.membus.pkt_size_system.cpu.l2cache.mem_side::system.bridge.slave        46126                       # Cumulative packet size per connected master and slave (bytes)
605system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port     72461888                       # Cumulative packet size per connected master and slave (bytes)
606system.membus.pkt_size_system.cpu.l2cache.mem_side::total     72508014                       # Cumulative packet size per connected master and slave (bytes)
607system.membus.pkt_size_system.iocache.mem_side::system.physmem.port      2667904                       # Cumulative packet size per connected master and slave (bytes)
608system.membus.pkt_size_system.iocache.mem_side::total      2667904                       # Cumulative packet size per connected master and slave (bytes)
609system.membus.pkt_size::total                75175918                       # Cumulative packet size per connected master and slave (bytes)
610system.membus.snoops                                0                       # Total snoops (count)
611system.membus.snoopTraffic                          0                       # Total snoop traffic (bytes)
612system.membus.snoop_fanout::samples           2149798                       # Request fanout histogram
613system.membus.snoop_fanout::mean             0.000494                       # Request fanout histogram
614system.membus.snoop_fanout::stdev            0.022210                       # Request fanout histogram
615system.membus.snoop_fanout::underflows              0      0.00%      0.00% # Request fanout histogram
616system.membus.snoop_fanout::0                 2148737     99.95%     99.95% # Request fanout histogram
617system.membus.snoop_fanout::1                    1061      0.05%    100.00% # Request fanout histogram
618system.membus.snoop_fanout::2                       0      0.00%    100.00% # Request fanout histogram
619system.membus.snoop_fanout::overflows               0      0.00%    100.00% # Request fanout histogram
620system.membus.snoop_fanout::min_value               0                       # Request fanout histogram
621system.membus.snoop_fanout::max_value               1                       # Request fanout histogram
622system.membus.snoop_fanout::total             2149798                       # Request fanout histogram
623system.membus.badaddr_responder.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
624system.tsunami.backdoor.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
625system.tsunami.cchip.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
626system.tsunami.pchip.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
627system.tsunami.ethernet.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
628system.tsunami.ethernet.descDMAReads                0                       # Number of descriptors the device read w/ DMA
629system.tsunami.ethernet.descDMAWrites               0                       # Number of descriptors the device wrote w/ DMA
630system.tsunami.ethernet.descDmaReadBytes            0                       # number of descriptor bytes read w/ DMA
631system.tsunami.ethernet.descDmaWriteBytes            0                       # number of descriptor bytes write w/ DMA
632system.tsunami.ethernet.postedSwi                   0                       # number of software interrupts posted to CPU
633system.tsunami.ethernet.coalescedSwi              nan                       # average number of Swi's coalesced into each post
634system.tsunami.ethernet.totalSwi                    0                       # total number of Swi written to ISR
635system.tsunami.ethernet.postedRxIdle                0                       # number of rxIdle interrupts posted to CPU
636system.tsunami.ethernet.coalescedRxIdle           nan                       # average number of RxIdle's coalesced into each post
637system.tsunami.ethernet.totalRxIdle                 0                       # total number of RxIdle written to ISR
638system.tsunami.ethernet.postedRxOk                  0                       # number of RxOk interrupts posted to CPU
639system.tsunami.ethernet.coalescedRxOk             nan                       # average number of RxOk's coalesced into each post
640system.tsunami.ethernet.totalRxOk                   0                       # total number of RxOk written to ISR
641system.tsunami.ethernet.postedRxDesc                0                       # number of RxDesc interrupts posted to CPU
642system.tsunami.ethernet.coalescedRxDesc           nan                       # average number of RxDesc's coalesced into each post
643system.tsunami.ethernet.totalRxDesc                 0                       # total number of RxDesc written to ISR
644system.tsunami.ethernet.postedTxOk                  0                       # number of TxOk interrupts posted to CPU
645system.tsunami.ethernet.coalescedTxOk             nan                       # average number of TxOk's coalesced into each post
646system.tsunami.ethernet.totalTxOk                   0                       # total number of TxOk written to ISR
647system.tsunami.ethernet.postedTxIdle                0                       # number of TxIdle interrupts posted to CPU
648system.tsunami.ethernet.coalescedTxIdle           nan                       # average number of TxIdle's coalesced into each post
649system.tsunami.ethernet.totalTxIdle                 0                       # total number of TxIdle written to ISR
650system.tsunami.ethernet.postedTxDesc                0                       # number of TxDesc interrupts posted to CPU
651system.tsunami.ethernet.coalescedTxDesc           nan                       # average number of TxDesc's coalesced into each post
652system.tsunami.ethernet.totalTxDesc                 0                       # total number of TxDesc written to ISR
653system.tsunami.ethernet.postedRxOrn                 0                       # number of RxOrn posted to CPU
654system.tsunami.ethernet.coalescedRxOrn            nan                       # average number of RxOrn's coalesced into each post
655system.tsunami.ethernet.totalRxOrn                  0                       # total number of RxOrn written to ISR
656system.tsunami.ethernet.coalescedTotal            nan                       # average number of interrupts coalesced into each post
657system.tsunami.ethernet.postedInterrupts            0                       # number of posts to CPU
658system.tsunami.ethernet.droppedPackets              0                       # number of packets dropped
659system.tsunami.fake_OROM.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
660system.tsunami.fake_ata0.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
661system.tsunami.fake_ata1.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
662system.tsunami.fake_pnp_addr.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
663system.tsunami.fake_pnp_read0.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
664system.tsunami.fake_pnp_read1.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
665system.tsunami.fake_pnp_read2.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
666system.tsunami.fake_pnp_read3.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
667system.tsunami.fake_pnp_read4.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
668system.tsunami.fake_pnp_read5.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
669system.tsunami.fake_pnp_read6.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
670system.tsunami.fake_pnp_read7.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
671system.tsunami.fake_pnp_write.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
672system.tsunami.fake_ppc.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
673system.tsunami.fake_sm_chip.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
674system.tsunami.fake_uart1.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
675system.tsunami.fake_uart2.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
676system.tsunami.fake_uart3.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
677system.tsunami.fake_uart4.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
678system.tsunami.fb.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
679system.tsunami.ide.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
680system.tsunami.io.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
681system.tsunami.uart.pwrStateResidencyTicks::UNDEFINED 1829332003500                       # Cumulative time (in ticks) in various power states
682
683---------- End Simulation Statistics   ----------
684