stats.txt revision 11219:b65d4e878ed2
1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 1.829332 # Number of seconds simulated 4sim_ticks 1829332273500 # Number of ticks simulated 5final_tick 1829332273500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks 7host_inst_rate 1568783 # Simulator instruction rate (inst/s) 8host_op_rate 1568783 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 47799849374 # Simulator tick rate (ticks/s) 10host_mem_usage 368252 # Number of bytes of host memory used 11host_seconds 38.27 # Real time elapsed on the host 12sim_insts 60038341 # Number of instructions simulated 13sim_ops 60038341 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.bytes_read::cpu.inst 850496 # Number of bytes read from this memory 17system.physmem.bytes_read::cpu.data 66835456 # Number of bytes read from this memory 18system.physmem.bytes_read::tsunami.ide 960 # Number of bytes read from this memory 19system.physmem.bytes_read::total 67686912 # Number of bytes read from this memory 20system.physmem.bytes_inst_read::cpu.inst 850496 # Number of instructions bytes read from this memory 21system.physmem.bytes_inst_read::total 850496 # Number of instructions bytes read from this memory 22system.physmem.bytes_written::writebacks 7416128 # Number of bytes written to this memory 23system.physmem.bytes_written::total 7416128 # Number of bytes written to this memory 24system.physmem.num_reads::cpu.inst 13289 # Number of read requests responded to by this memory 25system.physmem.num_reads::cpu.data 1044304 # Number of read requests responded to by this memory 26system.physmem.num_reads::tsunami.ide 15 # Number of read requests responded to by this memory 27system.physmem.num_reads::total 1057608 # Number of read requests responded to by this memory 28system.physmem.num_writes::writebacks 115877 # Number of write requests responded to by this memory 29system.physmem.num_writes::total 115877 # Number of write requests responded to by this memory 30system.physmem.bw_read::cpu.inst 464922 # Total read bandwidth from this memory (bytes/s) 31system.physmem.bw_read::cpu.data 36535438 # Total read bandwidth from this memory (bytes/s) 32system.physmem.bw_read::tsunami.ide 525 # Total read bandwidth from this memory (bytes/s) 33system.physmem.bw_read::total 37000884 # Total read bandwidth from this memory (bytes/s) 34system.physmem.bw_inst_read::cpu.inst 464922 # Instruction read bandwidth from this memory (bytes/s) 35system.physmem.bw_inst_read::total 464922 # Instruction read bandwidth from this memory (bytes/s) 36system.physmem.bw_write::writebacks 4054008 # Write bandwidth from this memory (bytes/s) 37system.physmem.bw_write::total 4054008 # Write bandwidth from this memory (bytes/s) 38system.physmem.bw_total::writebacks 4054008 # Total bandwidth to/from this memory (bytes/s) 39system.physmem.bw_total::cpu.inst 464922 # Total bandwidth to/from this memory (bytes/s) 40system.physmem.bw_total::cpu.data 36535438 # Total bandwidth to/from this memory (bytes/s) 41system.physmem.bw_total::tsunami.ide 525 # Total bandwidth to/from this memory (bytes/s) 42system.physmem.bw_total::total 41054893 # Total bandwidth to/from this memory (bytes/s) 43system.cpu_clk_domain.clock 500 # Clock period in ticks 44system.cpu.dtb.fetch_hits 0 # ITB hits 45system.cpu.dtb.fetch_misses 0 # ITB misses 46system.cpu.dtb.fetch_acv 0 # ITB acv 47system.cpu.dtb.fetch_accesses 0 # ITB accesses 48system.cpu.dtb.read_hits 9710422 # DTB read hits 49system.cpu.dtb.read_misses 10329 # DTB read misses 50system.cpu.dtb.read_acv 210 # DTB read access violations 51system.cpu.dtb.read_accesses 728856 # DTB read accesses 52system.cpu.dtb.write_hits 6352496 # DTB write hits 53system.cpu.dtb.write_misses 1142 # DTB write misses 54system.cpu.dtb.write_acv 157 # DTB write access violations 55system.cpu.dtb.write_accesses 291931 # DTB write accesses 56system.cpu.dtb.data_hits 16062918 # DTB hits 57system.cpu.dtb.data_misses 11471 # DTB misses 58system.cpu.dtb.data_acv 367 # DTB access violations 59system.cpu.dtb.data_accesses 1020787 # DTB accesses 60system.cpu.itb.fetch_hits 4974648 # ITB hits 61system.cpu.itb.fetch_misses 5006 # ITB misses 62system.cpu.itb.fetch_acv 184 # ITB acv 63system.cpu.itb.fetch_accesses 4979654 # ITB accesses 64system.cpu.itb.read_hits 0 # DTB read hits 65system.cpu.itb.read_misses 0 # DTB read misses 66system.cpu.itb.read_acv 0 # DTB read access violations 67system.cpu.itb.read_accesses 0 # DTB read accesses 68system.cpu.itb.write_hits 0 # DTB write hits 69system.cpu.itb.write_misses 0 # DTB write misses 70system.cpu.itb.write_acv 0 # DTB write access violations 71system.cpu.itb.write_accesses 0 # DTB write accesses 72system.cpu.itb.data_hits 0 # DTB hits 73system.cpu.itb.data_misses 0 # DTB misses 74system.cpu.itb.data_acv 0 # DTB access violations 75system.cpu.itb.data_accesses 0 # DTB accesses 76system.cpu.numCycles 3658670905 # number of cpu cycles simulated 77system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 78system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 79system.cpu.kern.inst.arm 0 # number of arm instructions executed 80system.cpu.kern.inst.quiesce 6357 # number of quiesce instructions executed 81system.cpu.kern.inst.hwrei 211319 # number of hwrei instructions executed 82system.cpu.kern.ipl_count::0 74830 40.99% 40.99% # number of times we switched to this ipl 83system.cpu.kern.ipl_count::21 243 0.13% 41.12% # number of times we switched to this ipl 84system.cpu.kern.ipl_count::22 1866 1.02% 42.14% # number of times we switched to this ipl 85system.cpu.kern.ipl_count::31 105623 57.86% 100.00% # number of times we switched to this ipl 86system.cpu.kern.ipl_count::total 182562 # number of times we switched to this ipl 87system.cpu.kern.ipl_good::0 73463 49.29% 49.29% # number of times we switched to this ipl from a different ipl 88system.cpu.kern.ipl_good::21 243 0.16% 49.46% # number of times we switched to this ipl from a different ipl 89system.cpu.kern.ipl_good::22 1866 1.25% 50.71% # number of times we switched to this ipl from a different ipl 90system.cpu.kern.ipl_good::31 73463 49.29% 100.00% # number of times we switched to this ipl from a different ipl 91system.cpu.kern.ipl_good::total 149035 # number of times we switched to this ipl from a different ipl 92system.cpu.kern.ipl_ticks::0 1811929473000 99.05% 99.05% # number of cycles we spent at this ipl 93system.cpu.kern.ipl_ticks::21 20110000 0.00% 99.05% # number of cycles we spent at this ipl 94system.cpu.kern.ipl_ticks::22 80238000 0.00% 99.05% # number of cycles we spent at this ipl 95system.cpu.kern.ipl_ticks::31 17302245000 0.95% 100.00% # number of cycles we spent at this ipl 96system.cpu.kern.ipl_ticks::total 1829332066000 # number of cycles we spent at this ipl 97system.cpu.kern.ipl_used::0 0.981732 # fraction of swpipl calls that actually changed the ipl 98system.cpu.kern.ipl_used::21 1 # fraction of swpipl calls that actually changed the ipl 99system.cpu.kern.ipl_used::22 1 # fraction of swpipl calls that actually changed the ipl 100system.cpu.kern.ipl_used::31 0.695521 # fraction of swpipl calls that actually changed the ipl 101system.cpu.kern.ipl_used::total 0.816353 # fraction of swpipl calls that actually changed the ipl 102system.cpu.kern.syscall::2 8 2.45% 2.45% # number of syscalls executed 103system.cpu.kern.syscall::3 30 9.20% 11.66% # number of syscalls executed 104system.cpu.kern.syscall::4 4 1.23% 12.88% # number of syscalls executed 105system.cpu.kern.syscall::6 42 12.88% 25.77% # number of syscalls executed 106system.cpu.kern.syscall::12 1 0.31% 26.07% # number of syscalls executed 107system.cpu.kern.syscall::15 1 0.31% 26.38% # number of syscalls executed 108system.cpu.kern.syscall::17 15 4.60% 30.98% # number of syscalls executed 109system.cpu.kern.syscall::19 10 3.07% 34.05% # number of syscalls executed 110system.cpu.kern.syscall::20 6 1.84% 35.89% # number of syscalls executed 111system.cpu.kern.syscall::23 4 1.23% 37.12% # number of syscalls executed 112system.cpu.kern.syscall::24 6 1.84% 38.96% # number of syscalls executed 113system.cpu.kern.syscall::33 11 3.37% 42.33% # number of syscalls executed 114system.cpu.kern.syscall::41 2 0.61% 42.94% # number of syscalls executed 115system.cpu.kern.syscall::45 54 16.56% 59.51% # number of syscalls executed 116system.cpu.kern.syscall::47 6 1.84% 61.35% # number of syscalls executed 117system.cpu.kern.syscall::48 10 3.07% 64.42% # number of syscalls executed 118system.cpu.kern.syscall::54 10 3.07% 67.48% # number of syscalls executed 119system.cpu.kern.syscall::58 1 0.31% 67.79% # number of syscalls executed 120system.cpu.kern.syscall::59 7 2.15% 69.94% # number of syscalls executed 121system.cpu.kern.syscall::71 54 16.56% 86.50% # number of syscalls executed 122system.cpu.kern.syscall::73 3 0.92% 87.42% # number of syscalls executed 123system.cpu.kern.syscall::74 16 4.91% 92.33% # number of syscalls executed 124system.cpu.kern.syscall::87 1 0.31% 92.64% # number of syscalls executed 125system.cpu.kern.syscall::90 3 0.92% 93.56% # number of syscalls executed 126system.cpu.kern.syscall::92 9 2.76% 96.32% # number of syscalls executed 127system.cpu.kern.syscall::97 2 0.61% 96.93% # number of syscalls executed 128system.cpu.kern.syscall::98 2 0.61% 97.55% # number of syscalls executed 129system.cpu.kern.syscall::132 4 1.23% 98.77% # number of syscalls executed 130system.cpu.kern.syscall::144 2 0.61% 99.39% # number of syscalls executed 131system.cpu.kern.syscall::147 2 0.61% 100.00% # number of syscalls executed 132system.cpu.kern.syscall::total 326 # number of syscalls executed 133system.cpu.kern.callpal::cserve 1 0.00% 0.00% # number of callpals executed 134system.cpu.kern.callpal::wrmces 1 0.00% 0.00% # number of callpals executed 135system.cpu.kern.callpal::wrfen 1 0.00% 0.00% # number of callpals executed 136system.cpu.kern.callpal::wrvptptr 1 0.00% 0.00% # number of callpals executed 137system.cpu.kern.callpal::swpctx 4177 2.17% 2.18% # number of callpals executed 138system.cpu.kern.callpal::tbi 54 0.03% 2.20% # number of callpals executed 139system.cpu.kern.callpal::wrent 7 0.00% 2.21% # number of callpals executed 140system.cpu.kern.callpal::swpipl 175249 91.19% 93.40% # number of callpals executed 141system.cpu.kern.callpal::rdps 6771 3.52% 96.92% # number of callpals executed 142system.cpu.kern.callpal::wrkgp 1 0.00% 96.92% # number of callpals executed 143system.cpu.kern.callpal::wrusp 7 0.00% 96.92% # number of callpals executed 144system.cpu.kern.callpal::rdusp 9 0.00% 96.93% # number of callpals executed 145system.cpu.kern.callpal::whami 2 0.00% 96.93% # number of callpals executed 146system.cpu.kern.callpal::rti 5203 2.71% 99.64% # number of callpals executed 147system.cpu.kern.callpal::callsys 515 0.27% 99.91% # number of callpals executed 148system.cpu.kern.callpal::imb 181 0.09% 100.00% # number of callpals executed 149system.cpu.kern.callpal::total 192180 # number of callpals executed 150system.cpu.kern.mode_switch::kernel 5949 # number of protection mode switches 151system.cpu.kern.mode_switch::user 1738 # number of protection mode switches 152system.cpu.kern.mode_switch::idle 2097 # number of protection mode switches 153system.cpu.kern.mode_good::kernel 1909 154system.cpu.kern.mode_good::user 1738 155system.cpu.kern.mode_good::idle 171 156system.cpu.kern.mode_switch_good::kernel 0.320894 # fraction of useful protection mode switches 157system.cpu.kern.mode_switch_good::user 1 # fraction of useful protection mode switches 158system.cpu.kern.mode_switch_good::idle 0.081545 # fraction of useful protection mode switches 159system.cpu.kern.mode_switch_good::total 0.390229 # fraction of useful protection mode switches 160system.cpu.kern.mode_ticks::kernel 26833319500 1.47% 1.47% # number of ticks spent at the given mode 161system.cpu.kern.mode_ticks::user 1465074000 0.08% 1.55% # number of ticks spent at the given mode 162system.cpu.kern.mode_ticks::idle 1801033671500 98.45% 100.00% # number of ticks spent at the given mode 163system.cpu.kern.swap_context 4178 # number of times the context was actually changed 164system.cpu.committedInsts 60038341 # Number of instructions committed 165system.cpu.committedOps 60038341 # Number of ops (including micro ops) committed 166system.cpu.num_int_alu_accesses 55913563 # Number of integer alu accesses 167system.cpu.num_fp_alu_accesses 324460 # Number of float alu accesses 168system.cpu.num_func_calls 1484182 # number of times a function call or return occured 169system.cpu.num_conditional_control_insts 7110761 # number of instructions that are conditional controls 170system.cpu.num_int_insts 55913563 # number of integer instructions 171system.cpu.num_fp_insts 324460 # number of float instructions 172system.cpu.num_int_register_reads 76954014 # number of times the integer registers were read 173system.cpu.num_int_register_writes 41740254 # number of times the integer registers were written 174system.cpu.num_fp_register_reads 163642 # number of times the floating registers were read 175system.cpu.num_fp_register_writes 166520 # number of times the floating registers were written 176system.cpu.num_mem_refs 16115702 # number of memory refs 177system.cpu.num_load_insts 9747508 # Number of load instructions 178system.cpu.num_store_insts 6368194 # Number of store instructions 179system.cpu.num_idle_cycles 3598621691.055137 # Number of idle cycles 180system.cpu.num_busy_cycles 60049213.944863 # Number of busy cycles 181system.cpu.not_idle_fraction 0.016413 # Percentage of non-idle cycles 182system.cpu.idle_fraction 0.983587 # Percentage of idle cycles 183system.cpu.Branches 9064400 # Number of branches fetched 184system.cpu.op_class::No_OpClass 3199098 5.33% 5.33% # Class of executed instruction 185system.cpu.op_class::IntAlu 39448273 65.69% 71.02% # Class of executed instruction 186system.cpu.op_class::IntMult 60677 0.10% 71.12% # Class of executed instruction 187system.cpu.op_class::IntDiv 0 0.00% 71.12% # Class of executed instruction 188system.cpu.op_class::FloatAdd 38087 0.06% 71.18% # Class of executed instruction 189system.cpu.op_class::FloatCmp 0 0.00% 71.18% # Class of executed instruction 190system.cpu.op_class::FloatCvt 0 0.00% 71.18% # Class of executed instruction 191system.cpu.op_class::FloatMult 0 0.00% 71.18% # Class of executed instruction 192system.cpu.op_class::FloatDiv 3636 0.01% 71.19% # Class of executed instruction 193system.cpu.op_class::FloatSqrt 0 0.00% 71.19% # Class of executed instruction 194system.cpu.op_class::SimdAdd 0 0.00% 71.19% # Class of executed instruction 195system.cpu.op_class::SimdAddAcc 0 0.00% 71.19% # Class of executed instruction 196system.cpu.op_class::SimdAlu 0 0.00% 71.19% # Class of executed instruction 197system.cpu.op_class::SimdCmp 0 0.00% 71.19% # Class of executed instruction 198system.cpu.op_class::SimdCvt 0 0.00% 71.19% # Class of executed instruction 199system.cpu.op_class::SimdMisc 0 0.00% 71.19% # Class of executed instruction 200system.cpu.op_class::SimdMult 0 0.00% 71.19% # Class of executed instruction 201system.cpu.op_class::SimdMultAcc 0 0.00% 71.19% # Class of executed instruction 202system.cpu.op_class::SimdShift 0 0.00% 71.19% # Class of executed instruction 203system.cpu.op_class::SimdShiftAcc 0 0.00% 71.19% # Class of executed instruction 204system.cpu.op_class::SimdSqrt 0 0.00% 71.19% # Class of executed instruction 205system.cpu.op_class::SimdFloatAdd 0 0.00% 71.19% # Class of executed instruction 206system.cpu.op_class::SimdFloatAlu 0 0.00% 71.19% # Class of executed instruction 207system.cpu.op_class::SimdFloatCmp 0 0.00% 71.19% # Class of executed instruction 208system.cpu.op_class::SimdFloatCvt 0 0.00% 71.19% # Class of executed instruction 209system.cpu.op_class::SimdFloatDiv 0 0.00% 71.19% # Class of executed instruction 210system.cpu.op_class::SimdFloatMisc 0 0.00% 71.19% # Class of executed instruction 211system.cpu.op_class::SimdFloatMult 0 0.00% 71.19% # Class of executed instruction 212system.cpu.op_class::SimdFloatMultAcc 0 0.00% 71.19% # Class of executed instruction 213system.cpu.op_class::SimdFloatSqrt 0 0.00% 71.19% # Class of executed instruction 214system.cpu.op_class::MemRead 9975076 16.61% 87.80% # Class of executed instruction 215system.cpu.op_class::MemWrite 6374115 10.61% 98.42% # Class of executed instruction 216system.cpu.op_class::IprAccess 951217 1.58% 100.00% # Class of executed instruction 217system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction 218system.cpu.op_class::total 60050179 # Class of executed instruction 219system.cpu.dcache.tags.replacements 2042728 # number of replacements 220system.cpu.dcache.tags.tagsinuse 511.997802 # Cycle average of tags in use 221system.cpu.dcache.tags.total_refs 14038398 # Total number of references to valid blocks. 222system.cpu.dcache.tags.sampled_refs 2043240 # Sample count of references to valid blocks. 223system.cpu.dcache.tags.avg_refs 6.870655 # Average number of references to valid blocks. 224system.cpu.dcache.tags.warmup_cycle 10840000 # Cycle when the warmup percentage was hit. 225system.cpu.dcache.tags.occ_blocks::cpu.data 511.997802 # Average occupied blocks per requestor 226system.cpu.dcache.tags.occ_percent::cpu.data 0.999996 # Average percentage of cache occupancy 227system.cpu.dcache.tags.occ_percent::total 0.999996 # Average percentage of cache occupancy 228system.cpu.dcache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id 229system.cpu.dcache.tags.age_task_id_blocks_1024::0 443 # Occupied blocks per task id 230system.cpu.dcache.tags.age_task_id_blocks_1024::1 66 # Occupied blocks per task id 231system.cpu.dcache.tags.age_task_id_blocks_1024::2 3 # Occupied blocks per task id 232system.cpu.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id 233system.cpu.dcache.tags.tag_accesses 66369797 # Number of tag accesses 234system.cpu.dcache.tags.data_accesses 66369797 # Number of data accesses 235system.cpu.dcache.ReadReq_hits::cpu.data 7807758 # number of ReadReq hits 236system.cpu.dcache.ReadReq_hits::total 7807758 # number of ReadReq hits 237system.cpu.dcache.WriteReq_hits::cpu.data 5848202 # number of WriteReq hits 238system.cpu.dcache.WriteReq_hits::total 5848202 # number of WriteReq hits 239system.cpu.dcache.LoadLockedReq_hits::cpu.data 183140 # number of LoadLockedReq hits 240system.cpu.dcache.LoadLockedReq_hits::total 183140 # number of LoadLockedReq hits 241system.cpu.dcache.StoreCondReq_hits::cpu.data 199282 # number of StoreCondReq hits 242system.cpu.dcache.StoreCondReq_hits::total 199282 # number of StoreCondReq hits 243system.cpu.dcache.demand_hits::cpu.data 13655960 # number of demand (read+write) hits 244system.cpu.dcache.demand_hits::total 13655960 # number of demand (read+write) hits 245system.cpu.dcache.overall_hits::cpu.data 13655960 # number of overall hits 246system.cpu.dcache.overall_hits::total 13655960 # number of overall hits 247system.cpu.dcache.ReadReq_misses::cpu.data 1721724 # number of ReadReq misses 248system.cpu.dcache.ReadReq_misses::total 1721724 # number of ReadReq misses 249system.cpu.dcache.WriteReq_misses::cpu.data 304370 # number of WriteReq misses 250system.cpu.dcache.WriteReq_misses::total 304370 # number of WriteReq misses 251system.cpu.dcache.LoadLockedReq_misses::cpu.data 17163 # number of LoadLockedReq misses 252system.cpu.dcache.LoadLockedReq_misses::total 17163 # number of LoadLockedReq misses 253system.cpu.dcache.demand_misses::cpu.data 2026094 # number of demand (read+write) misses 254system.cpu.dcache.demand_misses::total 2026094 # number of demand (read+write) misses 255system.cpu.dcache.overall_misses::cpu.data 2026094 # number of overall misses 256system.cpu.dcache.overall_misses::total 2026094 # number of overall misses 257system.cpu.dcache.ReadReq_accesses::cpu.data 9529482 # number of ReadReq accesses(hits+misses) 258system.cpu.dcache.ReadReq_accesses::total 9529482 # number of ReadReq accesses(hits+misses) 259system.cpu.dcache.WriteReq_accesses::cpu.data 6152572 # number of WriteReq accesses(hits+misses) 260system.cpu.dcache.WriteReq_accesses::total 6152572 # number of WriteReq accesses(hits+misses) 261system.cpu.dcache.LoadLockedReq_accesses::cpu.data 200303 # number of LoadLockedReq accesses(hits+misses) 262system.cpu.dcache.LoadLockedReq_accesses::total 200303 # number of LoadLockedReq accesses(hits+misses) 263system.cpu.dcache.StoreCondReq_accesses::cpu.data 199282 # number of StoreCondReq accesses(hits+misses) 264system.cpu.dcache.StoreCondReq_accesses::total 199282 # number of StoreCondReq accesses(hits+misses) 265system.cpu.dcache.demand_accesses::cpu.data 15682054 # number of demand (read+write) accesses 266system.cpu.dcache.demand_accesses::total 15682054 # number of demand (read+write) accesses 267system.cpu.dcache.overall_accesses::cpu.data 15682054 # number of overall (read+write) accesses 268system.cpu.dcache.overall_accesses::total 15682054 # number of overall (read+write) accesses 269system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.180673 # miss rate for ReadReq accesses 270system.cpu.dcache.ReadReq_miss_rate::total 0.180673 # miss rate for ReadReq accesses 271system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.049470 # miss rate for WriteReq accesses 272system.cpu.dcache.WriteReq_miss_rate::total 0.049470 # miss rate for WriteReq accesses 273system.cpu.dcache.LoadLockedReq_miss_rate::cpu.data 0.085685 # miss rate for LoadLockedReq accesses 274system.cpu.dcache.LoadLockedReq_miss_rate::total 0.085685 # miss rate for LoadLockedReq accesses 275system.cpu.dcache.demand_miss_rate::cpu.data 0.129198 # miss rate for demand accesses 276system.cpu.dcache.demand_miss_rate::total 0.129198 # miss rate for demand accesses 277system.cpu.dcache.overall_miss_rate::cpu.data 0.129198 # miss rate for overall accesses 278system.cpu.dcache.overall_miss_rate::total 0.129198 # miss rate for overall accesses 279system.cpu.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 280system.cpu.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 281system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 282system.cpu.dcache.blocked::no_targets 0 # number of cycles access was blocked 283system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 284system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 285system.cpu.dcache.fast_writes 0 # number of fast writes performed 286system.cpu.dcache.cache_copies 0 # number of cache copies performed 287system.cpu.dcache.writebacks::writebacks 833492 # number of writebacks 288system.cpu.dcache.writebacks::total 833492 # number of writebacks 289system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate 290system.cpu.icache.tags.replacements 919605 # number of replacements 291system.cpu.icache.tags.tagsinuse 511.215260 # Cycle average of tags in use 292system.cpu.icache.tags.total_refs 59129947 # Total number of references to valid blocks. 293system.cpu.icache.tags.sampled_refs 920117 # Sample count of references to valid blocks. 294system.cpu.icache.tags.avg_refs 64.263509 # Average number of references to valid blocks. 295system.cpu.icache.tags.warmup_cycle 9686452000 # Cycle when the warmup percentage was hit. 296system.cpu.icache.tags.occ_blocks::cpu.inst 511.215260 # Average occupied blocks per requestor 297system.cpu.icache.tags.occ_percent::cpu.inst 0.998467 # Average percentage of cache occupancy 298system.cpu.icache.tags.occ_percent::total 0.998467 # Average percentage of cache occupancy 299system.cpu.icache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id 300system.cpu.icache.tags.age_task_id_blocks_1024::0 63 # Occupied blocks per task id 301system.cpu.icache.tags.age_task_id_blocks_1024::1 117 # Occupied blocks per task id 302system.cpu.icache.tags.age_task_id_blocks_1024::2 332 # Occupied blocks per task id 303system.cpu.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id 304system.cpu.icache.tags.tag_accesses 60970411 # Number of tag accesses 305system.cpu.icache.tags.data_accesses 60970411 # Number of data accesses 306system.cpu.icache.ReadReq_hits::cpu.inst 59129947 # number of ReadReq hits 307system.cpu.icache.ReadReq_hits::total 59129947 # number of ReadReq hits 308system.cpu.icache.demand_hits::cpu.inst 59129947 # number of demand (read+write) hits 309system.cpu.icache.demand_hits::total 59129947 # number of demand (read+write) hits 310system.cpu.icache.overall_hits::cpu.inst 59129947 # number of overall hits 311system.cpu.icache.overall_hits::total 59129947 # number of overall hits 312system.cpu.icache.ReadReq_misses::cpu.inst 920232 # number of ReadReq misses 313system.cpu.icache.ReadReq_misses::total 920232 # number of ReadReq misses 314system.cpu.icache.demand_misses::cpu.inst 920232 # number of demand (read+write) misses 315system.cpu.icache.demand_misses::total 920232 # number of demand (read+write) misses 316system.cpu.icache.overall_misses::cpu.inst 920232 # number of overall misses 317system.cpu.icache.overall_misses::total 920232 # number of overall misses 318system.cpu.icache.ReadReq_accesses::cpu.inst 60050179 # number of ReadReq accesses(hits+misses) 319system.cpu.icache.ReadReq_accesses::total 60050179 # number of ReadReq accesses(hits+misses) 320system.cpu.icache.demand_accesses::cpu.inst 60050179 # number of demand (read+write) accesses 321system.cpu.icache.demand_accesses::total 60050179 # number of demand (read+write) accesses 322system.cpu.icache.overall_accesses::cpu.inst 60050179 # number of overall (read+write) accesses 323system.cpu.icache.overall_accesses::total 60050179 # number of overall (read+write) accesses 324system.cpu.icache.ReadReq_miss_rate::cpu.inst 0.015324 # miss rate for ReadReq accesses 325system.cpu.icache.ReadReq_miss_rate::total 0.015324 # miss rate for ReadReq accesses 326system.cpu.icache.demand_miss_rate::cpu.inst 0.015324 # miss rate for demand accesses 327system.cpu.icache.demand_miss_rate::total 0.015324 # miss rate for demand accesses 328system.cpu.icache.overall_miss_rate::cpu.inst 0.015324 # miss rate for overall accesses 329system.cpu.icache.overall_miss_rate::total 0.015324 # miss rate for overall accesses 330system.cpu.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 331system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked 332system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked 333system.cpu.icache.blocked::no_targets 0 # number of cycles access was blocked 334system.cpu.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 335system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 336system.cpu.icache.fast_writes 0 # number of fast writes performed 337system.cpu.icache.cache_copies 0 # number of cache copies performed 338system.cpu.icache.writebacks::writebacks 919605 # number of writebacks 339system.cpu.icache.writebacks::total 919605 # number of writebacks 340system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate 341system.cpu.l2cache.tags.replacements 992425 # number of replacements 342system.cpu.l2cache.tags.tagsinuse 65424.374115 # Cycle average of tags in use 343system.cpu.l2cache.tags.total_refs 4560164 # Total number of references to valid blocks. 344system.cpu.l2cache.tags.sampled_refs 1057588 # Sample count of references to valid blocks. 345system.cpu.l2cache.tags.avg_refs 4.311853 # Average number of references to valid blocks. 346system.cpu.l2cache.tags.warmup_cycle 614754000 # Cycle when the warmup percentage was hit. 347system.cpu.l2cache.tags.occ_blocks::writebacks 56331.555575 # Average occupied blocks per requestor 348system.cpu.l2cache.tags.occ_blocks::cpu.inst 4843.320500 # Average occupied blocks per requestor 349system.cpu.l2cache.tags.occ_blocks::cpu.data 4249.498040 # Average occupied blocks per requestor 350system.cpu.l2cache.tags.occ_percent::writebacks 0.859551 # Average percentage of cache occupancy 351system.cpu.l2cache.tags.occ_percent::cpu.inst 0.073903 # Average percentage of cache occupancy 352system.cpu.l2cache.tags.occ_percent::cpu.data 0.064842 # Average percentage of cache occupancy 353system.cpu.l2cache.tags.occ_percent::total 0.998297 # Average percentage of cache occupancy 354system.cpu.l2cache.tags.occ_task_id_blocks::1024 65163 # Occupied blocks per task id 355system.cpu.l2cache.tags.age_task_id_blocks_1024::0 781 # Occupied blocks per task id 356system.cpu.l2cache.tags.age_task_id_blocks_1024::1 3260 # Occupied blocks per task id 357system.cpu.l2cache.tags.age_task_id_blocks_1024::2 4024 # Occupied blocks per task id 358system.cpu.l2cache.tags.age_task_id_blocks_1024::3 3053 # Occupied blocks per task id 359system.cpu.l2cache.tags.age_task_id_blocks_1024::4 54045 # Occupied blocks per task id 360system.cpu.l2cache.tags.occ_task_id_percent::1024 0.994308 # Percentage of cache occupancy per task id 361system.cpu.l2cache.tags.tag_accesses 48754034 # Number of tag accesses 362system.cpu.l2cache.tags.data_accesses 48754034 # Number of data accesses 363system.cpu.l2cache.WritebackDirty_hits::writebacks 833492 # number of WritebackDirty hits 364system.cpu.l2cache.WritebackDirty_hits::total 833492 # number of WritebackDirty hits 365system.cpu.l2cache.WritebackClean_hits::writebacks 919353 # number of WritebackClean hits 366system.cpu.l2cache.WritebackClean_hits::total 919353 # number of WritebackClean hits 367system.cpu.l2cache.UpgradeReq_hits::cpu.data 4 # number of UpgradeReq hits 368system.cpu.l2cache.UpgradeReq_hits::total 4 # number of UpgradeReq hits 369system.cpu.l2cache.ReadExReq_hits::cpu.data 187288 # number of ReadExReq hits 370system.cpu.l2cache.ReadExReq_hits::total 187288 # number of ReadExReq hits 371system.cpu.l2cache.ReadCleanReq_hits::cpu.inst 906925 # number of ReadCleanReq hits 372system.cpu.l2cache.ReadCleanReq_hits::total 906925 # number of ReadCleanReq hits 373system.cpu.l2cache.ReadSharedReq_hits::cpu.data 811243 # number of ReadSharedReq hits 374system.cpu.l2cache.ReadSharedReq_hits::total 811243 # number of ReadSharedReq hits 375system.cpu.l2cache.demand_hits::cpu.inst 906925 # number of demand (read+write) hits 376system.cpu.l2cache.demand_hits::cpu.data 998531 # number of demand (read+write) hits 377system.cpu.l2cache.demand_hits::total 1905456 # number of demand (read+write) hits 378system.cpu.l2cache.overall_hits::cpu.inst 906925 # number of overall hits 379system.cpu.l2cache.overall_hits::cpu.data 998531 # number of overall hits 380system.cpu.l2cache.overall_hits::total 1905456 # number of overall hits 381system.cpu.l2cache.UpgradeReq_misses::cpu.data 12 # number of UpgradeReq misses 382system.cpu.l2cache.UpgradeReq_misses::total 12 # number of UpgradeReq misses 383system.cpu.l2cache.ReadExReq_misses::cpu.data 117066 # number of ReadExReq misses 384system.cpu.l2cache.ReadExReq_misses::total 117066 # number of ReadExReq misses 385system.cpu.l2cache.ReadCleanReq_misses::cpu.inst 13289 # number of ReadCleanReq misses 386system.cpu.l2cache.ReadCleanReq_misses::total 13289 # number of ReadCleanReq misses 387system.cpu.l2cache.ReadSharedReq_misses::cpu.data 927644 # number of ReadSharedReq misses 388system.cpu.l2cache.ReadSharedReq_misses::total 927644 # number of ReadSharedReq misses 389system.cpu.l2cache.demand_misses::cpu.inst 13289 # number of demand (read+write) misses 390system.cpu.l2cache.demand_misses::cpu.data 1044710 # number of demand (read+write) misses 391system.cpu.l2cache.demand_misses::total 1057999 # number of demand (read+write) misses 392system.cpu.l2cache.overall_misses::cpu.inst 13289 # number of overall misses 393system.cpu.l2cache.overall_misses::cpu.data 1044710 # number of overall misses 394system.cpu.l2cache.overall_misses::total 1057999 # number of overall misses 395system.cpu.l2cache.WritebackDirty_accesses::writebacks 833492 # number of WritebackDirty accesses(hits+misses) 396system.cpu.l2cache.WritebackDirty_accesses::total 833492 # number of WritebackDirty accesses(hits+misses) 397system.cpu.l2cache.WritebackClean_accesses::writebacks 919353 # number of WritebackClean accesses(hits+misses) 398system.cpu.l2cache.WritebackClean_accesses::total 919353 # number of WritebackClean accesses(hits+misses) 399system.cpu.l2cache.UpgradeReq_accesses::cpu.data 16 # number of UpgradeReq accesses(hits+misses) 400system.cpu.l2cache.UpgradeReq_accesses::total 16 # number of UpgradeReq accesses(hits+misses) 401system.cpu.l2cache.ReadExReq_accesses::cpu.data 304354 # number of ReadExReq accesses(hits+misses) 402system.cpu.l2cache.ReadExReq_accesses::total 304354 # number of ReadExReq accesses(hits+misses) 403system.cpu.l2cache.ReadCleanReq_accesses::cpu.inst 920214 # number of ReadCleanReq accesses(hits+misses) 404system.cpu.l2cache.ReadCleanReq_accesses::total 920214 # number of ReadCleanReq accesses(hits+misses) 405system.cpu.l2cache.ReadSharedReq_accesses::cpu.data 1738887 # number of ReadSharedReq accesses(hits+misses) 406system.cpu.l2cache.ReadSharedReq_accesses::total 1738887 # number of ReadSharedReq accesses(hits+misses) 407system.cpu.l2cache.demand_accesses::cpu.inst 920214 # number of demand (read+write) accesses 408system.cpu.l2cache.demand_accesses::cpu.data 2043241 # number of demand (read+write) accesses 409system.cpu.l2cache.demand_accesses::total 2963455 # number of demand (read+write) accesses 410system.cpu.l2cache.overall_accesses::cpu.inst 920214 # number of overall (read+write) accesses 411system.cpu.l2cache.overall_accesses::cpu.data 2043241 # number of overall (read+write) accesses 412system.cpu.l2cache.overall_accesses::total 2963455 # number of overall (read+write) accesses 413system.cpu.l2cache.UpgradeReq_miss_rate::cpu.data 0.750000 # miss rate for UpgradeReq accesses 414system.cpu.l2cache.UpgradeReq_miss_rate::total 0.750000 # miss rate for UpgradeReq accesses 415system.cpu.l2cache.ReadExReq_miss_rate::cpu.data 0.384638 # miss rate for ReadExReq accesses 416system.cpu.l2cache.ReadExReq_miss_rate::total 0.384638 # miss rate for ReadExReq accesses 417system.cpu.l2cache.ReadCleanReq_miss_rate::cpu.inst 0.014441 # miss rate for ReadCleanReq accesses 418system.cpu.l2cache.ReadCleanReq_miss_rate::total 0.014441 # miss rate for ReadCleanReq accesses 419system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.data 0.533470 # miss rate for ReadSharedReq accesses 420system.cpu.l2cache.ReadSharedReq_miss_rate::total 0.533470 # miss rate for ReadSharedReq accesses 421system.cpu.l2cache.demand_miss_rate::cpu.inst 0.014441 # miss rate for demand accesses 422system.cpu.l2cache.demand_miss_rate::cpu.data 0.511300 # miss rate for demand accesses 423system.cpu.l2cache.demand_miss_rate::total 0.357015 # miss rate for demand accesses 424system.cpu.l2cache.overall_miss_rate::cpu.inst 0.014441 # miss rate for overall accesses 425system.cpu.l2cache.overall_miss_rate::cpu.data 0.511300 # miss rate for overall accesses 426system.cpu.l2cache.overall_miss_rate::total 0.357015 # miss rate for overall accesses 427system.cpu.l2cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 428system.cpu.l2cache.blocked_cycles::no_targets 0 # number of cycles access was blocked 429system.cpu.l2cache.blocked::no_mshrs 0 # number of cycles access was blocked 430system.cpu.l2cache.blocked::no_targets 0 # number of cycles access was blocked 431system.cpu.l2cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 432system.cpu.l2cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 433system.cpu.l2cache.fast_writes 0 # number of fast writes performed 434system.cpu.l2cache.cache_copies 0 # number of cache copies performed 435system.cpu.l2cache.writebacks::writebacks 74365 # number of writebacks 436system.cpu.l2cache.writebacks::total 74365 # number of writebacks 437system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate 438system.cpu.toL2Bus.snoop_filter.tot_requests 5925822 # Total number of requests made to the snoop filter. 439system.cpu.toL2Bus.snoop_filter.hit_single_requests 2962455 # Number of requests hitting in the snoop filter with a single holder of the requested data. 440system.cpu.toL2Bus.snoop_filter.hit_multi_requests 1834 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. 441system.cpu.toL2Bus.snoop_filter.tot_snoops 1449 # Total number of snoops made to the snoop filter. 442system.cpu.toL2Bus.snoop_filter.hit_single_snoops 1449 # Number of snoops hitting in the snoop filter with a single holder of the requested data. 443system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. 444system.cpu.toL2Bus.trans_dist::ReadReq 7184 # Transaction distribution 445system.cpu.toL2Bus.trans_dist::ReadResp 2666303 # Transaction distribution 446system.cpu.toL2Bus.trans_dist::WriteReq 9838 # Transaction distribution 447system.cpu.toL2Bus.trans_dist::WriteResp 9838 # Transaction distribution 448system.cpu.toL2Bus.trans_dist::WritebackDirty 833492 # Transaction distribution 449system.cpu.toL2Bus.trans_dist::WritebackClean 919353 # Transaction distribution 450system.cpu.toL2Bus.trans_dist::CleanEvict 1207667 # Transaction distribution 451system.cpu.toL2Bus.trans_dist::UpgradeReq 16 # Transaction distribution 452system.cpu.toL2Bus.trans_dist::UpgradeResp 16 # Transaction distribution 453system.cpu.toL2Bus.trans_dist::ReadExReq 304354 # Transaction distribution 454system.cpu.toL2Bus.trans_dist::ReadExResp 304354 # Transaction distribution 455system.cpu.toL2Bus.trans_dist::ReadCleanReq 920232 # Transaction distribution 456system.cpu.toL2Bus.trans_dist::ReadSharedReq 1738887 # Transaction distribution 457system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 2759817 # Packet count per connected master and slave (bytes) 458system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 6161717 # Packet count per connected master and slave (bytes) 459system.cpu.toL2Bus.pkt_count::total 8921534 # Packet count per connected master and slave (bytes) 460system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 117733440 # Cumulative packet size per connected master and slave (bytes) 461system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 184157038 # Cumulative packet size per connected master and slave (bytes) 462system.cpu.toL2Bus.pkt_size::total 301890478 # Cumulative packet size per connected master and slave (bytes) 463system.cpu.toL2Bus.snoops 1075994 # Total snoops (count) 464system.cpu.toL2Bus.snoop_fanout::samples 7018681 # Request fanout histogram 465system.cpu.toL2Bus.snoop_fanout::mean 0.000744 # Request fanout histogram 466system.cpu.toL2Bus.snoop_fanout::stdev 0.027269 # Request fanout histogram 467system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram 468system.cpu.toL2Bus.snoop_fanout::0 7013458 99.93% 99.93% # Request fanout histogram 469system.cpu.toL2Bus.snoop_fanout::1 5223 0.07% 100.00% # Request fanout histogram 470system.cpu.toL2Bus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram 471system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 472system.cpu.toL2Bus.snoop_fanout::min_value 0 # Request fanout histogram 473system.cpu.toL2Bus.snoop_fanout::max_value 1 # Request fanout histogram 474system.cpu.toL2Bus.snoop_fanout::total 7018681 # Request fanout histogram 475system.disk0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 476system.disk0.dma_read_bytes 1024 # Number of bytes transfered via DMA reads (not PRD). 477system.disk0.dma_read_txs 1 # Number of DMA read transactions (not PRD). 478system.disk0.dma_write_full_pages 298 # Number of full page size DMA writes. 479system.disk0.dma_write_bytes 2651136 # Number of bytes transfered via DMA writes. 480system.disk0.dma_write_txs 395 # Number of DMA write transactions. 481system.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 482system.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). 483system.disk2.dma_read_txs 0 # Number of DMA read transactions (not PRD). 484system.disk2.dma_write_full_pages 1 # Number of full page size DMA writes. 485system.disk2.dma_write_bytes 8192 # Number of bytes transfered via DMA writes. 486system.disk2.dma_write_txs 1 # Number of DMA write transactions. 487system.iobus.trans_dist::ReadReq 7358 # Transaction distribution 488system.iobus.trans_dist::ReadResp 7358 # Transaction distribution 489system.iobus.trans_dist::WriteReq 51390 # Transaction distribution 490system.iobus.trans_dist::WriteResp 51390 # Transaction distribution 491system.iobus.pkt_count_system.bridge.master::system.tsunami.cchip.pio 5248 # Packet count per connected master and slave (bytes) 492system.iobus.pkt_count_system.bridge.master::system.tsunami.pchip.pio 476 # Packet count per connected master and slave (bytes) 493system.iobus.pkt_count_system.bridge.master::system.tsunami.fake_sm_chip.pio 10 # Packet count per connected master and slave (bytes) 494system.iobus.pkt_count_system.bridge.master::system.tsunami.fake_uart4.pio 10 # Packet count per connected master and slave (bytes) 495system.iobus.pkt_count_system.bridge.master::system.tsunami.io.pio 1076 # Packet count per connected master and slave (bytes) 496system.iobus.pkt_count_system.bridge.master::system.tsunami.uart.pio 18012 # Packet count per connected master and slave (bytes) 497system.iobus.pkt_count_system.bridge.master::system.tsunami.backdoor.pio 1904 # Packet count per connected master and slave (bytes) 498system.iobus.pkt_count_system.bridge.master::system.tsunami.ide.pio 6672 # Packet count per connected master and slave (bytes) 499system.iobus.pkt_count_system.bridge.master::system.tsunami.ide-pciconf 294 # Packet count per connected master and slave (bytes) 500system.iobus.pkt_count_system.bridge.master::system.tsunami.ethernet.pio 102 # Packet count per connected master and slave (bytes) 501system.iobus.pkt_count_system.bridge.master::system.tsunami.ethernet-pciconf 180 # Packet count per connected master and slave (bytes) 502system.iobus.pkt_count_system.bridge.master::system.tsunami.pciconfig.pio 60 # Packet count per connected master and slave (bytes) 503system.iobus.pkt_count_system.bridge.master::total 34044 # Packet count per connected master and slave (bytes) 504system.iobus.pkt_count_system.tsunami.ide.dma::system.iocache.cpu_side 83452 # Packet count per connected master and slave (bytes) 505system.iobus.pkt_count_system.tsunami.ide.dma::total 83452 # Packet count per connected master and slave (bytes) 506system.iobus.pkt_count::total 117496 # Packet count per connected master and slave (bytes) 507system.iobus.pkt_size_system.bridge.master::system.tsunami.cchip.pio 20992 # Cumulative packet size per connected master and slave (bytes) 508system.iobus.pkt_size_system.bridge.master::system.tsunami.pchip.pio 1904 # Cumulative packet size per connected master and slave (bytes) 509system.iobus.pkt_size_system.bridge.master::system.tsunami.fake_sm_chip.pio 5 # Cumulative packet size per connected master and slave (bytes) 510system.iobus.pkt_size_system.bridge.master::system.tsunami.fake_uart4.pio 5 # Cumulative packet size per connected master and slave (bytes) 511system.iobus.pkt_size_system.bridge.master::system.tsunami.io.pio 1392 # Cumulative packet size per connected master and slave (bytes) 512system.iobus.pkt_size_system.bridge.master::system.tsunami.uart.pio 9006 # Cumulative packet size per connected master and slave (bytes) 513system.iobus.pkt_size_system.bridge.master::system.tsunami.backdoor.pio 7596 # Cumulative packet size per connected master and slave (bytes) 514system.iobus.pkt_size_system.bridge.master::system.tsunami.ide.pio 4193 # Cumulative packet size per connected master and slave (bytes) 515system.iobus.pkt_size_system.bridge.master::system.tsunami.ide-pciconf 410 # Cumulative packet size per connected master and slave (bytes) 516system.iobus.pkt_size_system.bridge.master::system.tsunami.ethernet.pio 204 # Cumulative packet size per connected master and slave (bytes) 517system.iobus.pkt_size_system.bridge.master::system.tsunami.ethernet-pciconf 299 # Cumulative packet size per connected master and slave (bytes) 518system.iobus.pkt_size_system.bridge.master::system.tsunami.pciconfig.pio 120 # Cumulative packet size per connected master and slave (bytes) 519system.iobus.pkt_size_system.bridge.master::total 46126 # Cumulative packet size per connected master and slave (bytes) 520system.iobus.pkt_size_system.tsunami.ide.dma::system.iocache.cpu_side 2661616 # Cumulative packet size per connected master and slave (bytes) 521system.iobus.pkt_size_system.tsunami.ide.dma::total 2661616 # Cumulative packet size per connected master and slave (bytes) 522system.iobus.pkt_size::total 2707742 # Cumulative packet size per connected master and slave (bytes) 523system.iocache.tags.replacements 41686 # number of replacements 524system.iocache.tags.tagsinuse 1.225572 # Cycle average of tags in use 525system.iocache.tags.total_refs 0 # Total number of references to valid blocks. 526system.iocache.tags.sampled_refs 41702 # Sample count of references to valid blocks. 527system.iocache.tags.avg_refs 0 # Average number of references to valid blocks. 528system.iocache.tags.warmup_cycle 1685780587017 # Cycle when the warmup percentage was hit. 529system.iocache.tags.occ_blocks::tsunami.ide 1.225572 # Average occupied blocks per requestor 530system.iocache.tags.occ_percent::tsunami.ide 0.076598 # Average percentage of cache occupancy 531system.iocache.tags.occ_percent::total 0.076598 # Average percentage of cache occupancy 532system.iocache.tags.occ_task_id_blocks::1023 16 # Occupied blocks per task id 533system.iocache.tags.age_task_id_blocks_1023::2 16 # Occupied blocks per task id 534system.iocache.tags.occ_task_id_percent::1023 1 # Percentage of cache occupancy per task id 535system.iocache.tags.tag_accesses 375534 # Number of tag accesses 536system.iocache.tags.data_accesses 375534 # Number of data accesses 537system.iocache.ReadReq_misses::tsunami.ide 174 # number of ReadReq misses 538system.iocache.ReadReq_misses::total 174 # number of ReadReq misses 539system.iocache.WriteLineReq_misses::tsunami.ide 41552 # number of WriteLineReq misses 540system.iocache.WriteLineReq_misses::total 41552 # number of WriteLineReq misses 541system.iocache.demand_misses::tsunami.ide 174 # number of demand (read+write) misses 542system.iocache.demand_misses::total 174 # number of demand (read+write) misses 543system.iocache.overall_misses::tsunami.ide 174 # number of overall misses 544system.iocache.overall_misses::total 174 # number of overall misses 545system.iocache.ReadReq_accesses::tsunami.ide 174 # number of ReadReq accesses(hits+misses) 546system.iocache.ReadReq_accesses::total 174 # number of ReadReq accesses(hits+misses) 547system.iocache.WriteLineReq_accesses::tsunami.ide 41552 # number of WriteLineReq accesses(hits+misses) 548system.iocache.WriteLineReq_accesses::total 41552 # number of WriteLineReq accesses(hits+misses) 549system.iocache.demand_accesses::tsunami.ide 174 # number of demand (read+write) accesses 550system.iocache.demand_accesses::total 174 # number of demand (read+write) accesses 551system.iocache.overall_accesses::tsunami.ide 174 # number of overall (read+write) accesses 552system.iocache.overall_accesses::total 174 # number of overall (read+write) accesses 553system.iocache.ReadReq_miss_rate::tsunami.ide 1 # miss rate for ReadReq accesses 554system.iocache.ReadReq_miss_rate::total 1 # miss rate for ReadReq accesses 555system.iocache.WriteLineReq_miss_rate::tsunami.ide 1 # miss rate for WriteLineReq accesses 556system.iocache.WriteLineReq_miss_rate::total 1 # miss rate for WriteLineReq accesses 557system.iocache.demand_miss_rate::tsunami.ide 1 # miss rate for demand accesses 558system.iocache.demand_miss_rate::total 1 # miss rate for demand accesses 559system.iocache.overall_miss_rate::tsunami.ide 1 # miss rate for overall accesses 560system.iocache.overall_miss_rate::total 1 # miss rate for overall accesses 561system.iocache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 562system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked 563system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked 564system.iocache.blocked::no_targets 0 # number of cycles access was blocked 565system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 566system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 567system.iocache.fast_writes 0 # number of fast writes performed 568system.iocache.cache_copies 0 # number of cache copies performed 569system.iocache.writebacks::writebacks 41512 # number of writebacks 570system.iocache.writebacks::total 41512 # number of writebacks 571system.iocache.no_allocate_misses 0 # Number of misses that were no-allocate 572system.membus.trans_dist::ReadReq 7184 # Transaction distribution 573system.membus.trans_dist::ReadResp 948291 # Transaction distribution 574system.membus.trans_dist::WriteReq 9838 # Transaction distribution 575system.membus.trans_dist::WriteResp 9838 # Transaction distribution 576system.membus.trans_dist::WritebackDirty 115877 # Transaction distribution 577system.membus.trans_dist::CleanEvict 917027 # Transaction distribution 578system.membus.trans_dist::UpgradeReq 147 # Transaction distribution 579system.membus.trans_dist::UpgradeResp 147 # Transaction distribution 580system.membus.trans_dist::ReadExReq 116931 # Transaction distribution 581system.membus.trans_dist::ReadExResp 116931 # Transaction distribution 582system.membus.trans_dist::ReadSharedReq 941107 # Transaction distribution 583system.membus.trans_dist::InvalidateReq 41552 # Transaction distribution 584system.membus.trans_dist::InvalidateResp 41552 # Transaction distribution 585system.membus.pkt_count_system.cpu.l2cache.mem_side::system.bridge.slave 34044 # Packet count per connected master and slave (bytes) 586system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 3107401 # Packet count per connected master and slave (bytes) 587system.membus.pkt_count_system.cpu.l2cache.mem_side::total 3141445 # Packet count per connected master and slave (bytes) 588system.membus.pkt_count_system.iocache.mem_side::system.physmem.port 124977 # Packet count per connected master and slave (bytes) 589system.membus.pkt_count_system.iocache.mem_side::total 124977 # Packet count per connected master and slave (bytes) 590system.membus.pkt_count::total 3266422 # Packet count per connected master and slave (bytes) 591system.membus.pkt_size_system.cpu.l2cache.mem_side::system.bridge.slave 46126 # Cumulative packet size per connected master and slave (bytes) 592system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 72462656 # Cumulative packet size per connected master and slave (bytes) 593system.membus.pkt_size_system.cpu.l2cache.mem_side::total 72508782 # Cumulative packet size per connected master and slave (bytes) 594system.membus.pkt_size_system.iocache.mem_side::system.physmem.port 2667904 # Cumulative packet size per connected master and slave (bytes) 595system.membus.pkt_size_system.iocache.mem_side::total 2667904 # Cumulative packet size per connected master and slave (bytes) 596system.membus.pkt_size::total 75176686 # Cumulative packet size per connected master and slave (bytes) 597system.membus.snoops 0 # Total snoops (count) 598system.membus.snoop_fanout::samples 2149824 # Request fanout histogram 599system.membus.snoop_fanout::mean 1 # Request fanout histogram 600system.membus.snoop_fanout::stdev 0 # Request fanout histogram 601system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram 602system.membus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram 603system.membus.snoop_fanout::1 2149824 100.00% 100.00% # Request fanout histogram 604system.membus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram 605system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 606system.membus.snoop_fanout::min_value 1 # Request fanout histogram 607system.membus.snoop_fanout::max_value 1 # Request fanout histogram 608system.membus.snoop_fanout::total 2149824 # Request fanout histogram 609system.tsunami.ethernet.descDMAReads 0 # Number of descriptors the device read w/ DMA 610system.tsunami.ethernet.descDMAWrites 0 # Number of descriptors the device wrote w/ DMA 611system.tsunami.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA 612system.tsunami.ethernet.descDmaWriteBytes 0 # number of descriptor bytes write w/ DMA 613system.tsunami.ethernet.postedSwi 0 # number of software interrupts posted to CPU 614system.tsunami.ethernet.coalescedSwi nan # average number of Swi's coalesced into each post 615system.tsunami.ethernet.totalSwi 0 # total number of Swi written to ISR 616system.tsunami.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU 617system.tsunami.ethernet.coalescedRxIdle nan # average number of RxIdle's coalesced into each post 618system.tsunami.ethernet.totalRxIdle 0 # total number of RxIdle written to ISR 619system.tsunami.ethernet.postedRxOk 0 # number of RxOk interrupts posted to CPU 620system.tsunami.ethernet.coalescedRxOk nan # average number of RxOk's coalesced into each post 621system.tsunami.ethernet.totalRxOk 0 # total number of RxOk written to ISR 622system.tsunami.ethernet.postedRxDesc 0 # number of RxDesc interrupts posted to CPU 623system.tsunami.ethernet.coalescedRxDesc nan # average number of RxDesc's coalesced into each post 624system.tsunami.ethernet.totalRxDesc 0 # total number of RxDesc written to ISR 625system.tsunami.ethernet.postedTxOk 0 # number of TxOk interrupts posted to CPU 626system.tsunami.ethernet.coalescedTxOk nan # average number of TxOk's coalesced into each post 627system.tsunami.ethernet.totalTxOk 0 # total number of TxOk written to ISR 628system.tsunami.ethernet.postedTxIdle 0 # number of TxIdle interrupts posted to CPU 629system.tsunami.ethernet.coalescedTxIdle nan # average number of TxIdle's coalesced into each post 630system.tsunami.ethernet.totalTxIdle 0 # total number of TxIdle written to ISR 631system.tsunami.ethernet.postedTxDesc 0 # number of TxDesc interrupts posted to CPU 632system.tsunami.ethernet.coalescedTxDesc nan # average number of TxDesc's coalesced into each post 633system.tsunami.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR 634system.tsunami.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU 635system.tsunami.ethernet.coalescedRxOrn nan # average number of RxOrn's coalesced into each post 636system.tsunami.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR 637system.tsunami.ethernet.coalescedTotal nan # average number of interrupts coalesced into each post 638system.tsunami.ethernet.postedInterrupts 0 # number of posts to CPU 639system.tsunami.ethernet.droppedPackets 0 # number of packets dropped 640 641---------- End Simulation Statistics ---------- 642