stats.txt revision 11456:c0fb4435b80f
1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 1.869358 # Number of seconds simulated 4sim_ticks 1869357988000 # Number of ticks simulated 5final_tick 1869357988000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks 7host_inst_rate 1670594 # Simulator instruction rate (inst/s) 8host_op_rate 1670593 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 48045239456 # Simulator tick rate (ticks/s) 10host_mem_usage 332628 # Number of bytes of host memory used 11host_seconds 38.91 # Real time elapsed on the host 12sim_insts 64999904 # Number of instructions simulated 13sim_ops 64999904 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.bytes_read::cpu0.inst 758272 # Number of bytes read from this memory 17system.physmem.bytes_read::cpu0.data 66535616 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu1.inst 106112 # Number of bytes read from this memory 19system.physmem.bytes_read::cpu1.data 766336 # Number of bytes read from this memory 20system.physmem.bytes_read::tsunami.ide 960 # Number of bytes read from this memory 21system.physmem.bytes_read::total 68167296 # Number of bytes read from this memory 22system.physmem.bytes_inst_read::cpu0.inst 758272 # Number of instructions bytes read from this memory 23system.physmem.bytes_inst_read::cpu1.inst 106112 # Number of instructions bytes read from this memory 24system.physmem.bytes_inst_read::total 864384 # Number of instructions bytes read from this memory 25system.physmem.bytes_written::writebacks 7836352 # Number of bytes written to this memory 26system.physmem.bytes_written::total 7836352 # Number of bytes written to this memory 27system.physmem.num_reads::cpu0.inst 11848 # Number of read requests responded to by this memory 28system.physmem.num_reads::cpu0.data 1039619 # Number of read requests responded to by this memory 29system.physmem.num_reads::cpu1.inst 1658 # Number of read requests responded to by this memory 30system.physmem.num_reads::cpu1.data 11974 # Number of read requests responded to by this memory 31system.physmem.num_reads::tsunami.ide 15 # Number of read requests responded to by this memory 32system.physmem.num_reads::total 1065114 # Number of read requests responded to by this memory 33system.physmem.num_writes::writebacks 122443 # Number of write requests responded to by this memory 34system.physmem.num_writes::total 122443 # Number of write requests responded to by this memory 35system.physmem.bw_read::cpu0.inst 405632 # Total read bandwidth from this memory (bytes/s) 36system.physmem.bw_read::cpu0.data 35592763 # Total read bandwidth from this memory (bytes/s) 37system.physmem.bw_read::cpu1.inst 56764 # Total read bandwidth from this memory (bytes/s) 38system.physmem.bw_read::cpu1.data 409946 # Total read bandwidth from this memory (bytes/s) 39system.physmem.bw_read::tsunami.ide 514 # Total read bandwidth from this memory (bytes/s) 40system.physmem.bw_read::total 36465619 # Total read bandwidth from this memory (bytes/s) 41system.physmem.bw_inst_read::cpu0.inst 405632 # Instruction read bandwidth from this memory (bytes/s) 42system.physmem.bw_inst_read::cpu1.inst 56764 # Instruction read bandwidth from this memory (bytes/s) 43system.physmem.bw_inst_read::total 462396 # Instruction read bandwidth from this memory (bytes/s) 44system.physmem.bw_write::writebacks 4192002 # Write bandwidth from this memory (bytes/s) 45system.physmem.bw_write::total 4192002 # Write bandwidth from this memory (bytes/s) 46system.physmem.bw_total::writebacks 4192002 # Total bandwidth to/from this memory (bytes/s) 47system.physmem.bw_total::cpu0.inst 405632 # Total bandwidth to/from this memory (bytes/s) 48system.physmem.bw_total::cpu0.data 35592763 # Total bandwidth to/from this memory (bytes/s) 49system.physmem.bw_total::cpu1.inst 56764 # Total bandwidth to/from this memory (bytes/s) 50system.physmem.bw_total::cpu1.data 409946 # Total bandwidth to/from this memory (bytes/s) 51system.physmem.bw_total::tsunami.ide 514 # Total bandwidth to/from this memory (bytes/s) 52system.physmem.bw_total::total 40657621 # Total bandwidth to/from this memory (bytes/s) 53system.cpu_clk_domain.clock 500 # Clock period in ticks 54system.cpu0.dtb.fetch_hits 0 # ITB hits 55system.cpu0.dtb.fetch_misses 0 # ITB misses 56system.cpu0.dtb.fetch_acv 0 # ITB acv 57system.cpu0.dtb.fetch_accesses 0 # ITB accesses 58system.cpu0.dtb.read_hits 7758808 # DTB read hits 59system.cpu0.dtb.read_misses 7155 # DTB read misses 60system.cpu0.dtb.read_acv 152 # DTB read access violations 61system.cpu0.dtb.read_accesses 531148 # DTB read accesses 62system.cpu0.dtb.write_hits 4740251 # DTB write hits 63system.cpu0.dtb.write_misses 732 # DTB write misses 64system.cpu0.dtb.write_acv 102 # DTB write access violations 65system.cpu0.dtb.write_accesses 201714 # DTB write accesses 66system.cpu0.dtb.data_hits 12499059 # DTB hits 67system.cpu0.dtb.data_misses 7887 # DTB misses 68system.cpu0.dtb.data_acv 254 # DTB access violations 69system.cpu0.dtb.data_accesses 732862 # DTB accesses 70system.cpu0.itb.fetch_hits 3525726 # ITB hits 71system.cpu0.itb.fetch_misses 3572 # ITB misses 72system.cpu0.itb.fetch_acv 127 # ITB acv 73system.cpu0.itb.fetch_accesses 3529298 # ITB accesses 74system.cpu0.itb.read_hits 0 # DTB read hits 75system.cpu0.itb.read_misses 0 # DTB read misses 76system.cpu0.itb.read_acv 0 # DTB read access violations 77system.cpu0.itb.read_accesses 0 # DTB read accesses 78system.cpu0.itb.write_hits 0 # DTB write hits 79system.cpu0.itb.write_misses 0 # DTB write misses 80system.cpu0.itb.write_acv 0 # DTB write access violations 81system.cpu0.itb.write_accesses 0 # DTB write accesses 82system.cpu0.itb.data_hits 0 # DTB hits 83system.cpu0.itb.data_misses 0 # DTB misses 84system.cpu0.itb.data_acv 0 # DTB access violations 85system.cpu0.itb.data_accesses 0 # DTB accesses 86system.cpu0.numCycles 3738722771 # number of cpu cycles simulated 87system.cpu0.numWorkItemsStarted 0 # number of work items this cpu started 88system.cpu0.numWorkItemsCompleted 0 # number of work items this cpu completed 89system.cpu0.kern.inst.arm 0 # number of arm instructions executed 90system.cpu0.kern.inst.quiesce 6794 # number of quiesce instructions executed 91system.cpu0.kern.inst.hwrei 150435 # number of hwrei instructions executed 92system.cpu0.kern.ipl_count::0 51398 40.00% 40.00% # number of times we switched to this ipl 93system.cpu0.kern.ipl_count::21 243 0.19% 40.19% # number of times we switched to this ipl 94system.cpu0.kern.ipl_count::22 1907 1.48% 41.67% # number of times we switched to this ipl 95system.cpu0.kern.ipl_count::30 514 0.40% 42.07% # number of times we switched to this ipl 96system.cpu0.kern.ipl_count::31 74446 57.93% 100.00% # number of times we switched to this ipl 97system.cpu0.kern.ipl_count::total 128508 # number of times we switched to this ipl 98system.cpu0.kern.ipl_good::0 51050 48.97% 48.97% # number of times we switched to this ipl from a different ipl 99system.cpu0.kern.ipl_good::21 243 0.23% 49.20% # number of times we switched to this ipl from a different ipl 100system.cpu0.kern.ipl_good::22 1907 1.83% 51.03% # number of times we switched to this ipl from a different ipl 101system.cpu0.kern.ipl_good::30 514 0.49% 51.52% # number of times we switched to this ipl from a different ipl 102system.cpu0.kern.ipl_good::31 50536 48.48% 100.00% # number of times we switched to this ipl from a different ipl 103system.cpu0.kern.ipl_good::total 104250 # number of times we switched to this ipl from a different ipl 104system.cpu0.kern.ipl_ticks::0 1853222721000 99.14% 99.14% # number of cycles we spent at this ipl 105system.cpu0.kern.ipl_ticks::21 20110000 0.00% 99.14% # number of cycles we spent at this ipl 106system.cpu0.kern.ipl_ticks::22 82001000 0.00% 99.14% # number of cycles we spent at this ipl 107system.cpu0.kern.ipl_ticks::30 57621500 0.00% 99.15% # number of cycles we spent at this ipl 108system.cpu0.kern.ipl_ticks::31 15975327000 0.85% 100.00% # number of cycles we spent at this ipl 109system.cpu0.kern.ipl_ticks::total 1869357780500 # number of cycles we spent at this ipl 110system.cpu0.kern.ipl_used::0 0.993229 # fraction of swpipl calls that actually changed the ipl 111system.cpu0.kern.ipl_used::21 1 # fraction of swpipl calls that actually changed the ipl 112system.cpu0.kern.ipl_used::22 1 # fraction of swpipl calls that actually changed the ipl 113system.cpu0.kern.ipl_used::30 1 # fraction of swpipl calls that actually changed the ipl 114system.cpu0.kern.ipl_used::31 0.678828 # fraction of swpipl calls that actually changed the ipl 115system.cpu0.kern.ipl_used::total 0.811234 # fraction of swpipl calls that actually changed the ipl 116system.cpu0.kern.syscall::2 6 2.63% 2.63% # number of syscalls executed 117system.cpu0.kern.syscall::3 20 8.77% 11.40% # number of syscalls executed 118system.cpu0.kern.syscall::4 2 0.88% 12.28% # number of syscalls executed 119system.cpu0.kern.syscall::6 32 14.04% 26.32% # number of syscalls executed 120system.cpu0.kern.syscall::12 1 0.44% 26.75% # number of syscalls executed 121system.cpu0.kern.syscall::15 1 0.44% 27.19% # number of syscalls executed 122system.cpu0.kern.syscall::17 9 3.95% 31.14% # number of syscalls executed 123system.cpu0.kern.syscall::19 8 3.51% 34.65% # number of syscalls executed 124system.cpu0.kern.syscall::20 6 2.63% 37.28% # number of syscalls executed 125system.cpu0.kern.syscall::23 2 0.88% 38.16% # number of syscalls executed 126system.cpu0.kern.syscall::24 4 1.75% 39.91% # number of syscalls executed 127system.cpu0.kern.syscall::33 7 3.07% 42.98% # number of syscalls executed 128system.cpu0.kern.syscall::41 2 0.88% 43.86% # number of syscalls executed 129system.cpu0.kern.syscall::45 37 16.23% 60.09% # number of syscalls executed 130system.cpu0.kern.syscall::47 4 1.75% 61.84% # number of syscalls executed 131system.cpu0.kern.syscall::48 8 3.51% 65.35% # number of syscalls executed 132system.cpu0.kern.syscall::54 10 4.39% 69.74% # number of syscalls executed 133system.cpu0.kern.syscall::58 1 0.44% 70.18% # number of syscalls executed 134system.cpu0.kern.syscall::59 5 2.19% 72.37% # number of syscalls executed 135system.cpu0.kern.syscall::71 30 13.16% 85.53% # number of syscalls executed 136system.cpu0.kern.syscall::73 3 1.32% 86.84% # number of syscalls executed 137system.cpu0.kern.syscall::74 8 3.51% 90.35% # number of syscalls executed 138system.cpu0.kern.syscall::87 1 0.44% 90.79% # number of syscalls executed 139system.cpu0.kern.syscall::90 2 0.88% 91.67% # number of syscalls executed 140system.cpu0.kern.syscall::92 9 3.95% 95.61% # number of syscalls executed 141system.cpu0.kern.syscall::97 2 0.88% 96.49% # number of syscalls executed 142system.cpu0.kern.syscall::98 2 0.88% 97.37% # number of syscalls executed 143system.cpu0.kern.syscall::132 2 0.88% 98.25% # number of syscalls executed 144system.cpu0.kern.syscall::144 2 0.88% 99.12% # number of syscalls executed 145system.cpu0.kern.syscall::147 2 0.88% 100.00% # number of syscalls executed 146system.cpu0.kern.syscall::total 228 # number of syscalls executed 147system.cpu0.kern.callpal::cserve 1 0.00% 0.00% # number of callpals executed 148system.cpu0.kern.callpal::wripir 616 0.45% 0.45% # number of callpals executed 149system.cpu0.kern.callpal::wrmces 1 0.00% 0.45% # number of callpals executed 150system.cpu0.kern.callpal::wrfen 1 0.00% 0.46% # number of callpals executed 151system.cpu0.kern.callpal::wrvptptr 1 0.00% 0.46% # number of callpals executed 152system.cpu0.kern.callpal::swpctx 2743 2.02% 2.47% # number of callpals executed 153system.cpu0.kern.callpal::tbi 39 0.03% 2.50% # number of callpals executed 154system.cpu0.kern.callpal::wrent 7 0.01% 2.51% # number of callpals executed 155system.cpu0.kern.callpal::swpipl 121668 89.51% 92.02% # number of callpals executed 156system.cpu0.kern.callpal::rdps 6149 4.52% 96.54% # number of callpals executed 157system.cpu0.kern.callpal::wrkgp 1 0.00% 96.54% # number of callpals executed 158system.cpu0.kern.callpal::wrusp 3 0.00% 96.54% # number of callpals executed 159system.cpu0.kern.callpal::rdusp 7 0.01% 96.55% # number of callpals executed 160system.cpu0.kern.callpal::whami 2 0.00% 96.55% # number of callpals executed 161system.cpu0.kern.callpal::rti 4175 3.07% 99.62% # number of callpals executed 162system.cpu0.kern.callpal::callsys 369 0.27% 99.89% # number of callpals executed 163system.cpu0.kern.callpal::imb 146 0.11% 100.00% # number of callpals executed 164system.cpu0.kern.callpal::total 135929 # number of callpals executed 165system.cpu0.kern.mode_switch::kernel 6593 # number of protection mode switches 166system.cpu0.kern.mode_switch::user 1173 # number of protection mode switches 167system.cpu0.kern.mode_switch::idle 0 # number of protection mode switches 168system.cpu0.kern.mode_good::kernel 1172 169system.cpu0.kern.mode_good::user 1173 170system.cpu0.kern.mode_good::idle 0 171system.cpu0.kern.mode_switch_good::kernel 0.177764 # fraction of useful protection mode switches 172system.cpu0.kern.mode_switch_good::user 1 # fraction of useful protection mode switches 173system.cpu0.kern.mode_switch_good::idle nan # fraction of useful protection mode switches 174system.cpu0.kern.mode_switch_good::total 0.301957 # fraction of useful protection mode switches 175system.cpu0.kern.mode_ticks::kernel 1868349152500 99.95% 99.95% # number of ticks spent at the given mode 176system.cpu0.kern.mode_ticks::user 1008627000 0.05% 100.00% # number of ticks spent at the given mode 177system.cpu0.kern.mode_ticks::idle 0 0.00% 100.00% # number of ticks spent at the given mode 178system.cpu0.kern.swap_context 2744 # number of times the context was actually changed 179system.cpu0.committedInsts 49477745 # Number of instructions committed 180system.cpu0.committedOps 49477745 # Number of ops (including micro ops) committed 181system.cpu0.num_int_alu_accesses 46201705 # Number of integer alu accesses 182system.cpu0.num_fp_alu_accesses 197598 # Number of float alu accesses 183system.cpu0.num_func_calls 1124633 # number of times a function call or return occured 184system.cpu0.num_conditional_control_insts 6043603 # number of instructions that are conditional controls 185system.cpu0.num_int_insts 46201705 # number of integer instructions 186system.cpu0.num_fp_insts 197598 # number of float instructions 187system.cpu0.num_int_register_reads 64003225 # number of times the integer registers were read 188system.cpu0.num_int_register_writes 34834421 # number of times the integer registers were written 189system.cpu0.num_fp_register_reads 97440 # number of times the floating registers were read 190system.cpu0.num_fp_register_writes 98967 # number of times the floating registers were written 191system.cpu0.num_mem_refs 12536107 # number of memory refs 192system.cpu0.num_load_insts 7783754 # Number of load instructions 193system.cpu0.num_store_insts 4752353 # Number of store instructions 194system.cpu0.num_idle_cycles 3689239788.666409 # Number of idle cycles 195system.cpu0.num_busy_cycles 49482982.333591 # Number of busy cycles 196system.cpu0.not_idle_fraction 0.013235 # Percentage of non-idle cycles 197system.cpu0.idle_fraction 0.986765 # Percentage of idle cycles 198system.cpu0.Branches 7530826 # Number of branches fetched 199system.cpu0.op_class::No_OpClass 2589816 5.23% 5.23% # Class of executed instruction 200system.cpu0.op_class::IntAlu 33436017 67.57% 72.80% # Class of executed instruction 201system.cpu0.op_class::IntMult 50540 0.10% 72.90% # Class of executed instruction 202system.cpu0.op_class::IntDiv 0 0.00% 72.90% # Class of executed instruction 203system.cpu0.op_class::FloatAdd 27840 0.06% 72.96% # Class of executed instruction 204system.cpu0.op_class::FloatCmp 0 0.00% 72.96% # Class of executed instruction 205system.cpu0.op_class::FloatCvt 0 0.00% 72.96% # Class of executed instruction 206system.cpu0.op_class::FloatMult 0 0.00% 72.96% # Class of executed instruction 207system.cpu0.op_class::FloatDiv 2233 0.00% 72.96% # Class of executed instruction 208system.cpu0.op_class::FloatSqrt 0 0.00% 72.96% # Class of executed instruction 209system.cpu0.op_class::SimdAdd 0 0.00% 72.96% # Class of executed instruction 210system.cpu0.op_class::SimdAddAcc 0 0.00% 72.96% # Class of executed instruction 211system.cpu0.op_class::SimdAlu 0 0.00% 72.96% # Class of executed instruction 212system.cpu0.op_class::SimdCmp 0 0.00% 72.96% # Class of executed instruction 213system.cpu0.op_class::SimdCvt 0 0.00% 72.96% # Class of executed instruction 214system.cpu0.op_class::SimdMisc 0 0.00% 72.96% # Class of executed instruction 215system.cpu0.op_class::SimdMult 0 0.00% 72.96% # Class of executed instruction 216system.cpu0.op_class::SimdMultAcc 0 0.00% 72.96% # Class of executed instruction 217system.cpu0.op_class::SimdShift 0 0.00% 72.96% # Class of executed instruction 218system.cpu0.op_class::SimdShiftAcc 0 0.00% 72.96% # Class of executed instruction 219system.cpu0.op_class::SimdSqrt 0 0.00% 72.96% # Class of executed instruction 220system.cpu0.op_class::SimdFloatAdd 0 0.00% 72.96% # Class of executed instruction 221system.cpu0.op_class::SimdFloatAlu 0 0.00% 72.96% # Class of executed instruction 222system.cpu0.op_class::SimdFloatCmp 0 0.00% 72.96% # Class of executed instruction 223system.cpu0.op_class::SimdFloatCvt 0 0.00% 72.96% # Class of executed instruction 224system.cpu0.op_class::SimdFloatDiv 0 0.00% 72.96% # Class of executed instruction 225system.cpu0.op_class::SimdFloatMisc 0 0.00% 72.96% # Class of executed instruction 226system.cpu0.op_class::SimdFloatMult 0 0.00% 72.96% # Class of executed instruction 227system.cpu0.op_class::SimdFloatMultAcc 0 0.00% 72.96% # Class of executed instruction 228system.cpu0.op_class::SimdFloatSqrt 0 0.00% 72.96% # Class of executed instruction 229system.cpu0.op_class::MemRead 7945590 16.06% 89.02% # Class of executed instruction 230system.cpu0.op_class::MemWrite 4758292 9.62% 98.63% # Class of executed instruction 231system.cpu0.op_class::IprAccess 675558 1.37% 100.00% # Class of executed instruction 232system.cpu0.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction 233system.cpu0.op_class::total 49485886 # Class of executed instruction 234system.cpu0.dcache.tags.replacements 1781371 # number of replacements 235system.cpu0.dcache.tags.tagsinuse 506.187328 # Cycle average of tags in use 236system.cpu0.dcache.tags.total_refs 10705763 # Total number of references to valid blocks. 237system.cpu0.dcache.tags.sampled_refs 1781883 # Sample count of references to valid blocks. 238system.cpu0.dcache.tags.avg_refs 6.008118 # Average number of references to valid blocks. 239system.cpu0.dcache.tags.warmup_cycle 10840000 # Cycle when the warmup percentage was hit. 240system.cpu0.dcache.tags.occ_blocks::cpu0.data 506.187328 # Average occupied blocks per requestor 241system.cpu0.dcache.tags.occ_percent::cpu0.data 0.988647 # Average percentage of cache occupancy 242system.cpu0.dcache.tags.occ_percent::total 0.988647 # Average percentage of cache occupancy 243system.cpu0.dcache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id 244system.cpu0.dcache.tags.age_task_id_blocks_1024::0 446 # Occupied blocks per task id 245system.cpu0.dcache.tags.age_task_id_blocks_1024::1 62 # Occupied blocks per task id 246system.cpu0.dcache.tags.age_task_id_blocks_1024::2 4 # Occupied blocks per task id 247system.cpu0.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id 248system.cpu0.dcache.tags.tag_accesses 51822042 # Number of tag accesses 249system.cpu0.dcache.tags.data_accesses 51822042 # Number of data accesses 250system.cpu0.dcache.ReadReq_hits::cpu0.data 6068881 # number of ReadReq hits 251system.cpu0.dcache.ReadReq_hits::total 6068881 # number of ReadReq hits 252system.cpu0.dcache.WriteReq_hits::cpu0.data 4360085 # number of WriteReq hits 253system.cpu0.dcache.WriteReq_hits::total 4360085 # number of WriteReq hits 254system.cpu0.dcache.LoadLockedReq_hits::cpu0.data 127592 # number of LoadLockedReq hits 255system.cpu0.dcache.LoadLockedReq_hits::total 127592 # number of LoadLockedReq hits 256system.cpu0.dcache.StoreCondReq_hits::cpu0.data 132849 # number of StoreCondReq hits 257system.cpu0.dcache.StoreCondReq_hits::total 132849 # number of StoreCondReq hits 258system.cpu0.dcache.demand_hits::cpu0.data 10428966 # number of demand (read+write) hits 259system.cpu0.dcache.demand_hits::total 10428966 # number of demand (read+write) hits 260system.cpu0.dcache.overall_hits::cpu0.data 10428966 # number of overall hits 261system.cpu0.dcache.overall_hits::total 10428966 # number of overall hits 262system.cpu0.dcache.ReadReq_misses::cpu0.data 1560069 # number of ReadReq misses 263system.cpu0.dcache.ReadReq_misses::total 1560069 # number of ReadReq misses 264system.cpu0.dcache.WriteReq_misses::cpu0.data 236538 # number of WriteReq misses 265system.cpu0.dcache.WriteReq_misses::total 236538 # number of WriteReq misses 266system.cpu0.dcache.LoadLockedReq_misses::cpu0.data 12626 # number of LoadLockedReq misses 267system.cpu0.dcache.LoadLockedReq_misses::total 12626 # number of LoadLockedReq misses 268system.cpu0.dcache.StoreCondReq_misses::cpu0.data 6921 # number of StoreCondReq misses 269system.cpu0.dcache.StoreCondReq_misses::total 6921 # number of StoreCondReq misses 270system.cpu0.dcache.demand_misses::cpu0.data 1796607 # number of demand (read+write) misses 271system.cpu0.dcache.demand_misses::total 1796607 # number of demand (read+write) misses 272system.cpu0.dcache.overall_misses::cpu0.data 1796607 # number of overall misses 273system.cpu0.dcache.overall_misses::total 1796607 # number of overall misses 274system.cpu0.dcache.ReadReq_accesses::cpu0.data 7628950 # number of ReadReq accesses(hits+misses) 275system.cpu0.dcache.ReadReq_accesses::total 7628950 # number of ReadReq accesses(hits+misses) 276system.cpu0.dcache.WriteReq_accesses::cpu0.data 4596623 # number of WriteReq accesses(hits+misses) 277system.cpu0.dcache.WriteReq_accesses::total 4596623 # number of WriteReq accesses(hits+misses) 278system.cpu0.dcache.LoadLockedReq_accesses::cpu0.data 140218 # number of LoadLockedReq accesses(hits+misses) 279system.cpu0.dcache.LoadLockedReq_accesses::total 140218 # number of LoadLockedReq accesses(hits+misses) 280system.cpu0.dcache.StoreCondReq_accesses::cpu0.data 139770 # number of StoreCondReq accesses(hits+misses) 281system.cpu0.dcache.StoreCondReq_accesses::total 139770 # number of StoreCondReq accesses(hits+misses) 282system.cpu0.dcache.demand_accesses::cpu0.data 12225573 # number of demand (read+write) accesses 283system.cpu0.dcache.demand_accesses::total 12225573 # number of demand (read+write) accesses 284system.cpu0.dcache.overall_accesses::cpu0.data 12225573 # number of overall (read+write) accesses 285system.cpu0.dcache.overall_accesses::total 12225573 # number of overall (read+write) accesses 286system.cpu0.dcache.ReadReq_miss_rate::cpu0.data 0.204493 # miss rate for ReadReq accesses 287system.cpu0.dcache.ReadReq_miss_rate::total 0.204493 # miss rate for ReadReq accesses 288system.cpu0.dcache.WriteReq_miss_rate::cpu0.data 0.051459 # miss rate for WriteReq accesses 289system.cpu0.dcache.WriteReq_miss_rate::total 0.051459 # miss rate for WriteReq accesses 290system.cpu0.dcache.LoadLockedReq_miss_rate::cpu0.data 0.090046 # miss rate for LoadLockedReq accesses 291system.cpu0.dcache.LoadLockedReq_miss_rate::total 0.090046 # miss rate for LoadLockedReq accesses 292system.cpu0.dcache.StoreCondReq_miss_rate::cpu0.data 0.049517 # miss rate for StoreCondReq accesses 293system.cpu0.dcache.StoreCondReq_miss_rate::total 0.049517 # miss rate for StoreCondReq accesses 294system.cpu0.dcache.demand_miss_rate::cpu0.data 0.146955 # miss rate for demand accesses 295system.cpu0.dcache.demand_miss_rate::total 0.146955 # miss rate for demand accesses 296system.cpu0.dcache.overall_miss_rate::cpu0.data 0.146955 # miss rate for overall accesses 297system.cpu0.dcache.overall_miss_rate::total 0.146955 # miss rate for overall accesses 298system.cpu0.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 299system.cpu0.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 300system.cpu0.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 301system.cpu0.dcache.blocked::no_targets 0 # number of cycles access was blocked 302system.cpu0.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 303system.cpu0.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 304system.cpu0.dcache.writebacks::writebacks 633127 # number of writebacks 305system.cpu0.dcache.writebacks::total 633127 # number of writebacks 306system.cpu0.icache.tags.replacements 618292 # number of replacements 307system.cpu0.icache.tags.tagsinuse 511.240644 # Cycle average of tags in use 308system.cpu0.icache.tags.total_refs 48866947 # Total number of references to valid blocks. 309system.cpu0.icache.tags.sampled_refs 618804 # Sample count of references to valid blocks. 310system.cpu0.icache.tags.avg_refs 78.969992 # Average number of references to valid blocks. 311system.cpu0.icache.tags.warmup_cycle 9786048500 # Cycle when the warmup percentage was hit. 312system.cpu0.icache.tags.occ_blocks::cpu0.inst 511.240644 # Average occupied blocks per requestor 313system.cpu0.icache.tags.occ_percent::cpu0.inst 0.998517 # Average percentage of cache occupancy 314system.cpu0.icache.tags.occ_percent::total 0.998517 # Average percentage of cache occupancy 315system.cpu0.icache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id 316system.cpu0.icache.tags.age_task_id_blocks_1024::0 63 # Occupied blocks per task id 317system.cpu0.icache.tags.age_task_id_blocks_1024::1 116 # Occupied blocks per task id 318system.cpu0.icache.tags.age_task_id_blocks_1024::2 333 # Occupied blocks per task id 319system.cpu0.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id 320system.cpu0.icache.tags.tag_accesses 50104825 # Number of tag accesses 321system.cpu0.icache.tags.data_accesses 50104825 # Number of data accesses 322system.cpu0.icache.ReadReq_hits::cpu0.inst 48866947 # number of ReadReq hits 323system.cpu0.icache.ReadReq_hits::total 48866947 # number of ReadReq hits 324system.cpu0.icache.demand_hits::cpu0.inst 48866947 # number of demand (read+write) hits 325system.cpu0.icache.demand_hits::total 48866947 # number of demand (read+write) hits 326system.cpu0.icache.overall_hits::cpu0.inst 48866947 # number of overall hits 327system.cpu0.icache.overall_hits::total 48866947 # number of overall hits 328system.cpu0.icache.ReadReq_misses::cpu0.inst 618939 # number of ReadReq misses 329system.cpu0.icache.ReadReq_misses::total 618939 # number of ReadReq misses 330system.cpu0.icache.demand_misses::cpu0.inst 618939 # number of demand (read+write) misses 331system.cpu0.icache.demand_misses::total 618939 # number of demand (read+write) misses 332system.cpu0.icache.overall_misses::cpu0.inst 618939 # number of overall misses 333system.cpu0.icache.overall_misses::total 618939 # number of overall misses 334system.cpu0.icache.ReadReq_accesses::cpu0.inst 49485886 # number of ReadReq accesses(hits+misses) 335system.cpu0.icache.ReadReq_accesses::total 49485886 # number of ReadReq accesses(hits+misses) 336system.cpu0.icache.demand_accesses::cpu0.inst 49485886 # number of demand (read+write) accesses 337system.cpu0.icache.demand_accesses::total 49485886 # number of demand (read+write) accesses 338system.cpu0.icache.overall_accesses::cpu0.inst 49485886 # number of overall (read+write) accesses 339system.cpu0.icache.overall_accesses::total 49485886 # number of overall (read+write) accesses 340system.cpu0.icache.ReadReq_miss_rate::cpu0.inst 0.012507 # miss rate for ReadReq accesses 341system.cpu0.icache.ReadReq_miss_rate::total 0.012507 # miss rate for ReadReq accesses 342system.cpu0.icache.demand_miss_rate::cpu0.inst 0.012507 # miss rate for demand accesses 343system.cpu0.icache.demand_miss_rate::total 0.012507 # miss rate for demand accesses 344system.cpu0.icache.overall_miss_rate::cpu0.inst 0.012507 # miss rate for overall accesses 345system.cpu0.icache.overall_miss_rate::total 0.012507 # miss rate for overall accesses 346system.cpu0.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 347system.cpu0.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked 348system.cpu0.icache.blocked::no_mshrs 0 # number of cycles access was blocked 349system.cpu0.icache.blocked::no_targets 0 # number of cycles access was blocked 350system.cpu0.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 351system.cpu0.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 352system.cpu0.icache.writebacks::writebacks 618292 # number of writebacks 353system.cpu0.icache.writebacks::total 618292 # number of writebacks 354system.cpu1.dtb.fetch_hits 0 # ITB hits 355system.cpu1.dtb.fetch_misses 0 # ITB misses 356system.cpu1.dtb.fetch_acv 0 # ITB acv 357system.cpu1.dtb.fetch_accesses 0 # ITB accesses 358system.cpu1.dtb.read_hits 2831559 # DTB read hits 359system.cpu1.dtb.read_misses 3191 # DTB read misses 360system.cpu1.dtb.read_acv 58 # DTB read access violations 361system.cpu1.dtb.read_accesses 198160 # DTB read accesses 362system.cpu1.dtb.write_hits 2101673 # DTB write hits 363system.cpu1.dtb.write_misses 412 # DTB write misses 364system.cpu1.dtb.write_acv 55 # DTB write access violations 365system.cpu1.dtb.write_accesses 90619 # DTB write accesses 366system.cpu1.dtb.data_hits 4933232 # DTB hits 367system.cpu1.dtb.data_misses 3603 # DTB misses 368system.cpu1.dtb.data_acv 113 # DTB access violations 369system.cpu1.dtb.data_accesses 288779 # DTB accesses 370system.cpu1.itb.fetch_hits 1950883 # ITB hits 371system.cpu1.itb.fetch_misses 1451 # ITB misses 372system.cpu1.itb.fetch_acv 57 # ITB acv 373system.cpu1.itb.fetch_accesses 1952334 # ITB accesses 374system.cpu1.itb.read_hits 0 # DTB read hits 375system.cpu1.itb.read_misses 0 # DTB read misses 376system.cpu1.itb.read_acv 0 # DTB read access violations 377system.cpu1.itb.read_accesses 0 # DTB read accesses 378system.cpu1.itb.write_hits 0 # DTB write hits 379system.cpu1.itb.write_misses 0 # DTB write misses 380system.cpu1.itb.write_acv 0 # DTB write access violations 381system.cpu1.itb.write_accesses 0 # DTB write accesses 382system.cpu1.itb.data_hits 0 # DTB hits 383system.cpu1.itb.data_misses 0 # DTB misses 384system.cpu1.itb.data_acv 0 # DTB access violations 385system.cpu1.itb.data_accesses 0 # DTB accesses 386system.cpu1.numCycles 3738296587 # number of cpu cycles simulated 387system.cpu1.numWorkItemsStarted 0 # number of work items this cpu started 388system.cpu1.numWorkItemsCompleted 0 # number of work items this cpu completed 389system.cpu1.kern.inst.arm 0 # number of arm instructions executed 390system.cpu1.kern.inst.quiesce 2704 # number of quiesce instructions executed 391system.cpu1.kern.inst.hwrei 92290 # number of hwrei instructions executed 392system.cpu1.kern.ipl_count::0 31964 39.34% 39.34% # number of times we switched to this ipl 393system.cpu1.kern.ipl_count::22 1906 2.35% 41.68% # number of times we switched to this ipl 394system.cpu1.kern.ipl_count::30 616 0.76% 42.44% # number of times we switched to this ipl 395system.cpu1.kern.ipl_count::31 46769 57.56% 100.00% # number of times we switched to this ipl 396system.cpu1.kern.ipl_count::total 81255 # number of times we switched to this ipl 397system.cpu1.kern.ipl_good::0 30935 48.51% 48.51% # number of times we switched to this ipl from a different ipl 398system.cpu1.kern.ipl_good::22 1906 2.99% 51.49% # number of times we switched to this ipl from a different ipl 399system.cpu1.kern.ipl_good::30 616 0.97% 52.46% # number of times we switched to this ipl from a different ipl 400system.cpu1.kern.ipl_good::31 30319 47.54% 100.00% # number of times we switched to this ipl from a different ipl 401system.cpu1.kern.ipl_good::total 63776 # number of times we switched to this ipl from a different ipl 402system.cpu1.kern.ipl_ticks::0 1856123490500 99.30% 99.30% # number of cycles we spent at this ipl 403system.cpu1.kern.ipl_ticks::22 81958000 0.00% 99.31% # number of cycles we spent at this ipl 404system.cpu1.kern.ipl_ticks::30 70736500 0.00% 99.31% # number of cycles we spent at this ipl 405system.cpu1.kern.ipl_ticks::31 12870743500 0.69% 100.00% # number of cycles we spent at this ipl 406system.cpu1.kern.ipl_ticks::total 1869146928500 # number of cycles we spent at this ipl 407system.cpu1.kern.ipl_used::0 0.967808 # fraction of swpipl calls that actually changed the ipl 408system.cpu1.kern.ipl_used::22 1 # fraction of swpipl calls that actually changed the ipl 409system.cpu1.kern.ipl_used::30 1 # fraction of swpipl calls that actually changed the ipl 410system.cpu1.kern.ipl_used::31 0.648271 # fraction of swpipl calls that actually changed the ipl 411system.cpu1.kern.ipl_used::total 0.784887 # fraction of swpipl calls that actually changed the ipl 412system.cpu1.kern.syscall::2 2 2.04% 2.04% # number of syscalls executed 413system.cpu1.kern.syscall::3 10 10.20% 12.24% # number of syscalls executed 414system.cpu1.kern.syscall::4 2 2.04% 14.29% # number of syscalls executed 415system.cpu1.kern.syscall::6 10 10.20% 24.49% # number of syscalls executed 416system.cpu1.kern.syscall::17 6 6.12% 30.61% # number of syscalls executed 417system.cpu1.kern.syscall::19 2 2.04% 32.65% # number of syscalls executed 418system.cpu1.kern.syscall::23 2 2.04% 34.69% # number of syscalls executed 419system.cpu1.kern.syscall::24 2 2.04% 36.73% # number of syscalls executed 420system.cpu1.kern.syscall::33 4 4.08% 40.82% # number of syscalls executed 421system.cpu1.kern.syscall::45 17 17.35% 58.16% # number of syscalls executed 422system.cpu1.kern.syscall::47 2 2.04% 60.20% # number of syscalls executed 423system.cpu1.kern.syscall::48 2 2.04% 62.24% # number of syscalls executed 424system.cpu1.kern.syscall::59 2 2.04% 64.29% # number of syscalls executed 425system.cpu1.kern.syscall::71 24 24.49% 88.78% # number of syscalls executed 426system.cpu1.kern.syscall::74 8 8.16% 96.94% # number of syscalls executed 427system.cpu1.kern.syscall::90 1 1.02% 97.96% # number of syscalls executed 428system.cpu1.kern.syscall::132 2 2.04% 100.00% # number of syscalls executed 429system.cpu1.kern.syscall::total 98 # number of syscalls executed 430system.cpu1.kern.callpal::cserve 1 0.00% 0.00% # number of callpals executed 431system.cpu1.kern.callpal::wripir 514 0.61% 0.61% # number of callpals executed 432system.cpu1.kern.callpal::wrmces 1 0.00% 0.61% # number of callpals executed 433system.cpu1.kern.callpal::wrfen 1 0.00% 0.61% # number of callpals executed 434system.cpu1.kern.callpal::swpctx 2506 2.96% 3.58% # number of callpals executed 435system.cpu1.kern.callpal::tbi 14 0.02% 3.59% # number of callpals executed 436system.cpu1.kern.callpal::wrent 7 0.01% 3.60% # number of callpals executed 437system.cpu1.kern.callpal::swpipl 74617 88.26% 91.86% # number of callpals executed 438system.cpu1.kern.callpal::rdps 2575 3.05% 94.91% # number of callpals executed 439system.cpu1.kern.callpal::wrkgp 1 0.00% 94.91% # number of callpals executed 440system.cpu1.kern.callpal::wrusp 4 0.00% 94.91% # number of callpals executed 441system.cpu1.kern.callpal::rdusp 2 0.00% 94.91% # number of callpals executed 442system.cpu1.kern.callpal::whami 3 0.00% 94.92% # number of callpals executed 443system.cpu1.kern.callpal::rti 4115 4.87% 99.79% # number of callpals executed 444system.cpu1.kern.callpal::callsys 146 0.17% 99.96% # number of callpals executed 445system.cpu1.kern.callpal::imb 34 0.04% 100.00% # number of callpals executed 446system.cpu1.kern.callpal::rdunique 1 0.00% 100.00% # number of callpals executed 447system.cpu1.kern.callpal::total 84542 # number of callpals executed 448system.cpu1.kern.mode_switch::kernel 2548 # number of protection mode switches 449system.cpu1.kern.mode_switch::user 564 # number of protection mode switches 450system.cpu1.kern.mode_switch::idle 3056 # number of protection mode switches 451system.cpu1.kern.mode_good::kernel 1106 452system.cpu1.kern.mode_good::user 564 453system.cpu1.kern.mode_good::idle 542 454system.cpu1.kern.mode_switch_good::kernel 0.434066 # fraction of useful protection mode switches 455system.cpu1.kern.mode_switch_good::user 1 # fraction of useful protection mode switches 456system.cpu1.kern.mode_switch_good::idle 0.177356 # fraction of useful protection mode switches 457system.cpu1.kern.mode_switch_good::total 0.358625 # fraction of useful protection mode switches 458system.cpu1.kern.mode_ticks::kernel 5986368000 0.32% 0.32% # number of ticks spent at the given mode 459system.cpu1.kern.mode_ticks::user 456602000 0.02% 0.34% # number of ticks spent at the given mode 460system.cpu1.kern.mode_ticks::idle 1862102404500 99.66% 100.00% # number of ticks spent at the given mode 461system.cpu1.kern.swap_context 2507 # number of times the context was actually changed 462system.cpu1.committedInsts 15522159 # Number of instructions committed 463system.cpu1.committedOps 15522159 # Number of ops (including micro ops) committed 464system.cpu1.num_int_alu_accesses 14295544 # Number of integer alu accesses 465system.cpu1.num_fp_alu_accesses 198941 # Number of float alu accesses 466system.cpu1.num_func_calls 493140 # number of times a function call or return occured 467system.cpu1.num_conditional_control_insts 1540068 # number of instructions that are conditional controls 468system.cpu1.num_int_insts 14295544 # number of integer instructions 469system.cpu1.num_fp_insts 198941 # number of float instructions 470system.cpu1.num_int_register_reads 19514289 # number of times the integer registers were read 471system.cpu1.num_int_register_writes 10457600 # number of times the integer registers were written 472system.cpu1.num_fp_register_reads 101734 # number of times the floating registers were read 473system.cpu1.num_fp_register_writes 104129 # number of times the floating registers were written 474system.cpu1.num_mem_refs 4961786 # number of memory refs 475system.cpu1.num_load_insts 2849090 # Number of load instructions 476system.cpu1.num_store_insts 2112696 # Number of store instructions 477system.cpu1.num_idle_cycles 3722773649.474793 # Number of idle cycles 478system.cpu1.num_busy_cycles 15522937.525207 # Number of busy cycles 479system.cpu1.not_idle_fraction 0.004152 # Percentage of non-idle cycles 480system.cpu1.idle_fraction 0.995848 # Percentage of idle cycles 481system.cpu1.Branches 2214163 # Number of branches fetched 482system.cpu1.op_class::No_OpClass 856043 5.51% 5.51% # Class of executed instruction 483system.cpu1.op_class::IntAlu 9156766 58.98% 64.49% # Class of executed instruction 484system.cpu1.op_class::IntMult 25065 0.16% 64.65% # Class of executed instruction 485system.cpu1.op_class::IntDiv 0 0.00% 64.65% # Class of executed instruction 486system.cpu1.op_class::FloatAdd 12426 0.08% 64.73% # Class of executed instruction 487system.cpu1.op_class::FloatCmp 0 0.00% 64.73% # Class of executed instruction 488system.cpu1.op_class::FloatCvt 0 0.00% 64.73% # Class of executed instruction 489system.cpu1.op_class::FloatMult 0 0.00% 64.73% # Class of executed instruction 490system.cpu1.op_class::FloatDiv 1409 0.01% 64.74% # Class of executed instruction 491system.cpu1.op_class::FloatSqrt 0 0.00% 64.74% # Class of executed instruction 492system.cpu1.op_class::SimdAdd 0 0.00% 64.74% # Class of executed instruction 493system.cpu1.op_class::SimdAddAcc 0 0.00% 64.74% # Class of executed instruction 494system.cpu1.op_class::SimdAlu 0 0.00% 64.74% # Class of executed instruction 495system.cpu1.op_class::SimdCmp 0 0.00% 64.74% # Class of executed instruction 496system.cpu1.op_class::SimdCvt 0 0.00% 64.74% # Class of executed instruction 497system.cpu1.op_class::SimdMisc 0 0.00% 64.74% # Class of executed instruction 498system.cpu1.op_class::SimdMult 0 0.00% 64.74% # Class of executed instruction 499system.cpu1.op_class::SimdMultAcc 0 0.00% 64.74% # Class of executed instruction 500system.cpu1.op_class::SimdShift 0 0.00% 64.74% # Class of executed instruction 501system.cpu1.op_class::SimdShiftAcc 0 0.00% 64.74% # Class of executed instruction 502system.cpu1.op_class::SimdSqrt 0 0.00% 64.74% # Class of executed instruction 503system.cpu1.op_class::SimdFloatAdd 0 0.00% 64.74% # Class of executed instruction 504system.cpu1.op_class::SimdFloatAlu 0 0.00% 64.74% # Class of executed instruction 505system.cpu1.op_class::SimdFloatCmp 0 0.00% 64.74% # Class of executed instruction 506system.cpu1.op_class::SimdFloatCvt 0 0.00% 64.74% # Class of executed instruction 507system.cpu1.op_class::SimdFloatDiv 0 0.00% 64.74% # Class of executed instruction 508system.cpu1.op_class::SimdFloatMisc 0 0.00% 64.74% # Class of executed instruction 509system.cpu1.op_class::SimdFloatMult 0 0.00% 64.74% # Class of executed instruction 510system.cpu1.op_class::SimdFloatMultAcc 0 0.00% 64.74% # Class of executed instruction 511system.cpu1.op_class::SimdFloatSqrt 0 0.00% 64.74% # Class of executed instruction 512system.cpu1.op_class::MemRead 2937016 18.92% 83.66% # Class of executed instruction 513system.cpu1.op_class::MemWrite 2113897 13.62% 97.27% # Class of executed instruction 514system.cpu1.op_class::IprAccess 423253 2.73% 100.00% # Class of executed instruction 515system.cpu1.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction 516system.cpu1.op_class::total 15525875 # Class of executed instruction 517system.cpu1.dcache.tags.replacements 201757 # number of replacements 518system.cpu1.dcache.tags.tagsinuse 497.601960 # Cycle average of tags in use 519system.cpu1.dcache.tags.total_refs 4718401 # Total number of references to valid blocks. 520system.cpu1.dcache.tags.sampled_refs 202065 # Sample count of references to valid blocks. 521system.cpu1.dcache.tags.avg_refs 23.350907 # Average number of references to valid blocks. 522system.cpu1.dcache.tags.warmup_cycle 15869420000 # Cycle when the warmup percentage was hit. 523system.cpu1.dcache.tags.occ_blocks::cpu1.data 497.601960 # Average occupied blocks per requestor 524system.cpu1.dcache.tags.occ_percent::cpu1.data 0.971879 # Average percentage of cache occupancy 525system.cpu1.dcache.tags.occ_percent::total 0.971879 # Average percentage of cache occupancy 526system.cpu1.dcache.tags.occ_task_id_blocks::1024 308 # Occupied blocks per task id 527system.cpu1.dcache.tags.age_task_id_blocks_1024::2 306 # Occupied blocks per task id 528system.cpu1.dcache.tags.age_task_id_blocks_1024::3 2 # Occupied blocks per task id 529system.cpu1.dcache.tags.occ_task_id_percent::1024 0.601562 # Percentage of cache occupancy per task id 530system.cpu1.dcache.tags.tag_accesses 20020608 # Number of tag accesses 531system.cpu1.dcache.tags.data_accesses 20020608 # Number of data accesses 532system.cpu1.dcache.ReadReq_hits::cpu1.data 2632688 # number of ReadReq hits 533system.cpu1.dcache.ReadReq_hits::total 2632688 # number of ReadReq hits 534system.cpu1.dcache.WriteReq_hits::cpu1.data 1954643 # number of WriteReq hits 535system.cpu1.dcache.WriteReq_hits::total 1954643 # number of WriteReq hits 536system.cpu1.dcache.LoadLockedReq_hits::cpu1.data 61098 # number of LoadLockedReq hits 537system.cpu1.dcache.LoadLockedReq_hits::total 61098 # number of LoadLockedReq hits 538system.cpu1.dcache.StoreCondReq_hits::cpu1.data 64210 # number of StoreCondReq hits 539system.cpu1.dcache.StoreCondReq_hits::total 64210 # number of StoreCondReq hits 540system.cpu1.dcache.demand_hits::cpu1.data 4587331 # number of demand (read+write) hits 541system.cpu1.dcache.demand_hits::total 4587331 # number of demand (read+write) hits 542system.cpu1.dcache.overall_hits::cpu1.data 4587331 # number of overall hits 543system.cpu1.dcache.overall_hits::total 4587331 # number of overall hits 544system.cpu1.dcache.ReadReq_misses::cpu1.data 140885 # number of ReadReq misses 545system.cpu1.dcache.ReadReq_misses::total 140885 # number of ReadReq misses 546system.cpu1.dcache.WriteReq_misses::cpu1.data 78317 # number of WriteReq misses 547system.cpu1.dcache.WriteReq_misses::total 78317 # number of WriteReq misses 548system.cpu1.dcache.LoadLockedReq_misses::cpu1.data 11000 # number of LoadLockedReq misses 549system.cpu1.dcache.LoadLockedReq_misses::total 11000 # number of LoadLockedReq misses 550system.cpu1.dcache.StoreCondReq_misses::cpu1.data 7305 # number of StoreCondReq misses 551system.cpu1.dcache.StoreCondReq_misses::total 7305 # number of StoreCondReq misses 552system.cpu1.dcache.demand_misses::cpu1.data 219202 # number of demand (read+write) misses 553system.cpu1.dcache.demand_misses::total 219202 # number of demand (read+write) misses 554system.cpu1.dcache.overall_misses::cpu1.data 219202 # number of overall misses 555system.cpu1.dcache.overall_misses::total 219202 # number of overall misses 556system.cpu1.dcache.ReadReq_accesses::cpu1.data 2773573 # number of ReadReq accesses(hits+misses) 557system.cpu1.dcache.ReadReq_accesses::total 2773573 # number of ReadReq accesses(hits+misses) 558system.cpu1.dcache.WriteReq_accesses::cpu1.data 2032960 # number of WriteReq accesses(hits+misses) 559system.cpu1.dcache.WriteReq_accesses::total 2032960 # number of WriteReq accesses(hits+misses) 560system.cpu1.dcache.LoadLockedReq_accesses::cpu1.data 72098 # number of LoadLockedReq accesses(hits+misses) 561system.cpu1.dcache.LoadLockedReq_accesses::total 72098 # number of LoadLockedReq accesses(hits+misses) 562system.cpu1.dcache.StoreCondReq_accesses::cpu1.data 71515 # number of StoreCondReq accesses(hits+misses) 563system.cpu1.dcache.StoreCondReq_accesses::total 71515 # number of StoreCondReq accesses(hits+misses) 564system.cpu1.dcache.demand_accesses::cpu1.data 4806533 # number of demand (read+write) accesses 565system.cpu1.dcache.demand_accesses::total 4806533 # number of demand (read+write) accesses 566system.cpu1.dcache.overall_accesses::cpu1.data 4806533 # number of overall (read+write) accesses 567system.cpu1.dcache.overall_accesses::total 4806533 # number of overall (read+write) accesses 568system.cpu1.dcache.ReadReq_miss_rate::cpu1.data 0.050795 # miss rate for ReadReq accesses 569system.cpu1.dcache.ReadReq_miss_rate::total 0.050795 # miss rate for ReadReq accesses 570system.cpu1.dcache.WriteReq_miss_rate::cpu1.data 0.038524 # miss rate for WriteReq accesses 571system.cpu1.dcache.WriteReq_miss_rate::total 0.038524 # miss rate for WriteReq accesses 572system.cpu1.dcache.LoadLockedReq_miss_rate::cpu1.data 0.152570 # miss rate for LoadLockedReq accesses 573system.cpu1.dcache.LoadLockedReq_miss_rate::total 0.152570 # miss rate for LoadLockedReq accesses 574system.cpu1.dcache.StoreCondReq_miss_rate::cpu1.data 0.102146 # miss rate for StoreCondReq accesses 575system.cpu1.dcache.StoreCondReq_miss_rate::total 0.102146 # miss rate for StoreCondReq accesses 576system.cpu1.dcache.demand_miss_rate::cpu1.data 0.045605 # miss rate for demand accesses 577system.cpu1.dcache.demand_miss_rate::total 0.045605 # miss rate for demand accesses 578system.cpu1.dcache.overall_miss_rate::cpu1.data 0.045605 # miss rate for overall accesses 579system.cpu1.dcache.overall_miss_rate::total 0.045605 # miss rate for overall accesses 580system.cpu1.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 581system.cpu1.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 582system.cpu1.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 583system.cpu1.dcache.blocked::no_targets 0 # number of cycles access was blocked 584system.cpu1.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 585system.cpu1.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 586system.cpu1.dcache.writebacks::writebacks 144536 # number of writebacks 587system.cpu1.dcache.writebacks::total 144536 # number of writebacks 588system.cpu1.icache.tags.replacements 380647 # number of replacements 589system.cpu1.icache.tags.tagsinuse 453.133719 # Cycle average of tags in use 590system.cpu1.icache.tags.total_refs 15144687 # Total number of references to valid blocks. 591system.cpu1.icache.tags.sampled_refs 381159 # Sample count of references to valid blocks. 592system.cpu1.icache.tags.avg_refs 39.733253 # Average number of references to valid blocks. 593system.cpu1.icache.tags.warmup_cycle 1859777157500 # Cycle when the warmup percentage was hit. 594system.cpu1.icache.tags.occ_blocks::cpu1.inst 453.133719 # Average occupied blocks per requestor 595system.cpu1.icache.tags.occ_percent::cpu1.inst 0.885027 # Average percentage of cache occupancy 596system.cpu1.icache.tags.occ_percent::total 0.885027 # Average percentage of cache occupancy 597system.cpu1.icache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id 598system.cpu1.icache.tags.age_task_id_blocks_1024::2 509 # Occupied blocks per task id 599system.cpu1.icache.tags.age_task_id_blocks_1024::3 3 # Occupied blocks per task id 600system.cpu1.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id 601system.cpu1.icache.tags.tag_accesses 15907063 # Number of tag accesses 602system.cpu1.icache.tags.data_accesses 15907063 # Number of data accesses 603system.cpu1.icache.ReadReq_hits::cpu1.inst 15144687 # number of ReadReq hits 604system.cpu1.icache.ReadReq_hits::total 15144687 # number of ReadReq hits 605system.cpu1.icache.demand_hits::cpu1.inst 15144687 # number of demand (read+write) hits 606system.cpu1.icache.demand_hits::total 15144687 # number of demand (read+write) hits 607system.cpu1.icache.overall_hits::cpu1.inst 15144687 # number of overall hits 608system.cpu1.icache.overall_hits::total 15144687 # number of overall hits 609system.cpu1.icache.ReadReq_misses::cpu1.inst 381188 # number of ReadReq misses 610system.cpu1.icache.ReadReq_misses::total 381188 # number of ReadReq misses 611system.cpu1.icache.demand_misses::cpu1.inst 381188 # number of demand (read+write) misses 612system.cpu1.icache.demand_misses::total 381188 # number of demand (read+write) misses 613system.cpu1.icache.overall_misses::cpu1.inst 381188 # number of overall misses 614system.cpu1.icache.overall_misses::total 381188 # number of overall misses 615system.cpu1.icache.ReadReq_accesses::cpu1.inst 15525875 # number of ReadReq accesses(hits+misses) 616system.cpu1.icache.ReadReq_accesses::total 15525875 # number of ReadReq accesses(hits+misses) 617system.cpu1.icache.demand_accesses::cpu1.inst 15525875 # number of demand (read+write) accesses 618system.cpu1.icache.demand_accesses::total 15525875 # number of demand (read+write) accesses 619system.cpu1.icache.overall_accesses::cpu1.inst 15525875 # number of overall (read+write) accesses 620system.cpu1.icache.overall_accesses::total 15525875 # number of overall (read+write) accesses 621system.cpu1.icache.ReadReq_miss_rate::cpu1.inst 0.024552 # miss rate for ReadReq accesses 622system.cpu1.icache.ReadReq_miss_rate::total 0.024552 # miss rate for ReadReq accesses 623system.cpu1.icache.demand_miss_rate::cpu1.inst 0.024552 # miss rate for demand accesses 624system.cpu1.icache.demand_miss_rate::total 0.024552 # miss rate for demand accesses 625system.cpu1.icache.overall_miss_rate::cpu1.inst 0.024552 # miss rate for overall accesses 626system.cpu1.icache.overall_miss_rate::total 0.024552 # miss rate for overall accesses 627system.cpu1.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 628system.cpu1.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked 629system.cpu1.icache.blocked::no_mshrs 0 # number of cycles access was blocked 630system.cpu1.icache.blocked::no_targets 0 # number of cycles access was blocked 631system.cpu1.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 632system.cpu1.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 633system.cpu1.icache.writebacks::writebacks 380647 # number of writebacks 634system.cpu1.icache.writebacks::total 380647 # number of writebacks 635system.disk0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 636system.disk0.dma_read_bytes 1024 # Number of bytes transfered via DMA reads (not PRD). 637system.disk0.dma_read_txs 1 # Number of DMA read transactions (not PRD). 638system.disk0.dma_write_full_pages 298 # Number of full page size DMA writes. 639system.disk0.dma_write_bytes 2651136 # Number of bytes transfered via DMA writes. 640system.disk0.dma_write_txs 395 # Number of DMA write transactions. 641system.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 642system.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). 643system.disk2.dma_read_txs 0 # Number of DMA read transactions (not PRD). 644system.disk2.dma_write_full_pages 1 # Number of full page size DMA writes. 645system.disk2.dma_write_bytes 8192 # Number of bytes transfered via DMA writes. 646system.disk2.dma_write_txs 1 # Number of DMA write transactions. 647system.iobus.trans_dist::ReadReq 7628 # Transaction distribution 648system.iobus.trans_dist::ReadResp 7628 # Transaction distribution 649system.iobus.trans_dist::WriteReq 56140 # Transaction distribution 650system.iobus.trans_dist::WriteResp 56140 # Transaction distribution 651system.iobus.pkt_count_system.bridge.master::system.tsunami.cchip.pio 14686 # Packet count per connected master and slave (bytes) 652system.iobus.pkt_count_system.bridge.master::system.tsunami.pchip.pio 1014 # Packet count per connected master and slave (bytes) 653system.iobus.pkt_count_system.bridge.master::system.tsunami.fake_sm_chip.pio 10 # Packet count per connected master and slave (bytes) 654system.iobus.pkt_count_system.bridge.master::system.tsunami.fake_uart4.pio 10 # Packet count per connected master and slave (bytes) 655system.iobus.pkt_count_system.bridge.master::system.tsunami.io.pio 1076 # Packet count per connected master and slave (bytes) 656system.iobus.pkt_count_system.bridge.master::system.tsunami.uart.pio 18036 # Packet count per connected master and slave (bytes) 657system.iobus.pkt_count_system.bridge.master::system.tsunami.backdoor.pio 2468 # Packet count per connected master and slave (bytes) 658system.iobus.pkt_count_system.bridge.master::system.tsunami.ide.pio 6672 # Packet count per connected master and slave (bytes) 659system.iobus.pkt_count_system.bridge.master::system.tsunami.ethernet.pio 102 # Packet count per connected master and slave (bytes) 660system.iobus.pkt_count_system.bridge.master::total 44074 # Packet count per connected master and slave (bytes) 661system.iobus.pkt_count_system.tsunami.ide.dma::system.iocache.cpu_side 83462 # Packet count per connected master and slave (bytes) 662system.iobus.pkt_count_system.tsunami.ide.dma::total 83462 # Packet count per connected master and slave (bytes) 663system.iobus.pkt_count::total 127536 # Packet count per connected master and slave (bytes) 664system.iobus.pkt_size_system.bridge.master::system.tsunami.cchip.pio 58744 # Cumulative packet size per connected master and slave (bytes) 665system.iobus.pkt_size_system.bridge.master::system.tsunami.pchip.pio 2749 # Cumulative packet size per connected master and slave (bytes) 666system.iobus.pkt_size_system.bridge.master::system.tsunami.fake_sm_chip.pio 5 # Cumulative packet size per connected master and slave (bytes) 667system.iobus.pkt_size_system.bridge.master::system.tsunami.fake_uart4.pio 5 # Cumulative packet size per connected master and slave (bytes) 668system.iobus.pkt_size_system.bridge.master::system.tsunami.io.pio 1392 # Cumulative packet size per connected master and slave (bytes) 669system.iobus.pkt_size_system.bridge.master::system.tsunami.uart.pio 9018 # Cumulative packet size per connected master and slave (bytes) 670system.iobus.pkt_size_system.bridge.master::system.tsunami.backdoor.pio 9852 # Cumulative packet size per connected master and slave (bytes) 671system.iobus.pkt_size_system.bridge.master::system.tsunami.ide.pio 4193 # Cumulative packet size per connected master and slave (bytes) 672system.iobus.pkt_size_system.bridge.master::system.tsunami.ethernet.pio 204 # Cumulative packet size per connected master and slave (bytes) 673system.iobus.pkt_size_system.bridge.master::total 86162 # Cumulative packet size per connected master and slave (bytes) 674system.iobus.pkt_size_system.tsunami.ide.dma::system.iocache.cpu_side 2661656 # Cumulative packet size per connected master and slave (bytes) 675system.iobus.pkt_size_system.tsunami.ide.dma::total 2661656 # Cumulative packet size per connected master and slave (bytes) 676system.iobus.pkt_size::total 2747818 # Cumulative packet size per connected master and slave (bytes) 677system.iocache.tags.replacements 41699 # number of replacements 678system.iocache.tags.tagsinuse 0.434096 # Cycle average of tags in use 679system.iocache.tags.total_refs 0 # Total number of references to valid blocks. 680system.iocache.tags.sampled_refs 41715 # Sample count of references to valid blocks. 681system.iocache.tags.avg_refs 0 # Average number of references to valid blocks. 682system.iocache.tags.warmup_cycle 1685787163517 # Cycle when the warmup percentage was hit. 683system.iocache.tags.occ_blocks::tsunami.ide 0.434096 # Average occupied blocks per requestor 684system.iocache.tags.occ_percent::tsunami.ide 0.027131 # Average percentage of cache occupancy 685system.iocache.tags.occ_percent::total 0.027131 # Average percentage of cache occupancy 686system.iocache.tags.occ_task_id_blocks::1023 16 # Occupied blocks per task id 687system.iocache.tags.age_task_id_blocks_1023::2 16 # Occupied blocks per task id 688system.iocache.tags.occ_task_id_percent::1023 1 # Percentage of cache occupancy per task id 689system.iocache.tags.tag_accesses 375579 # Number of tag accesses 690system.iocache.tags.data_accesses 375579 # Number of data accesses 691system.iocache.ReadReq_misses::tsunami.ide 179 # number of ReadReq misses 692system.iocache.ReadReq_misses::total 179 # number of ReadReq misses 693system.iocache.WriteLineReq_misses::tsunami.ide 41552 # number of WriteLineReq misses 694system.iocache.WriteLineReq_misses::total 41552 # number of WriteLineReq misses 695system.iocache.demand_misses::tsunami.ide 41731 # number of demand (read+write) misses 696system.iocache.demand_misses::total 41731 # number of demand (read+write) misses 697system.iocache.overall_misses::tsunami.ide 41731 # number of overall misses 698system.iocache.overall_misses::total 41731 # number of overall misses 699system.iocache.ReadReq_accesses::tsunami.ide 179 # number of ReadReq accesses(hits+misses) 700system.iocache.ReadReq_accesses::total 179 # number of ReadReq accesses(hits+misses) 701system.iocache.WriteLineReq_accesses::tsunami.ide 41552 # number of WriteLineReq accesses(hits+misses) 702system.iocache.WriteLineReq_accesses::total 41552 # number of WriteLineReq accesses(hits+misses) 703system.iocache.demand_accesses::tsunami.ide 41731 # number of demand (read+write) accesses 704system.iocache.demand_accesses::total 41731 # number of demand (read+write) accesses 705system.iocache.overall_accesses::tsunami.ide 41731 # number of overall (read+write) accesses 706system.iocache.overall_accesses::total 41731 # number of overall (read+write) accesses 707system.iocache.ReadReq_miss_rate::tsunami.ide 1 # miss rate for ReadReq accesses 708system.iocache.ReadReq_miss_rate::total 1 # miss rate for ReadReq accesses 709system.iocache.WriteLineReq_miss_rate::tsunami.ide 1 # miss rate for WriteLineReq accesses 710system.iocache.WriteLineReq_miss_rate::total 1 # miss rate for WriteLineReq accesses 711system.iocache.demand_miss_rate::tsunami.ide 1 # miss rate for demand accesses 712system.iocache.demand_miss_rate::total 1 # miss rate for demand accesses 713system.iocache.overall_miss_rate::tsunami.ide 1 # miss rate for overall accesses 714system.iocache.overall_miss_rate::total 1 # miss rate for overall accesses 715system.iocache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 716system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked 717system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked 718system.iocache.blocked::no_targets 0 # number of cycles access was blocked 719system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 720system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 721system.iocache.writebacks::writebacks 41520 # number of writebacks 722system.iocache.writebacks::total 41520 # number of writebacks 723system.l2c.tags.replacements 999922 # number of replacements 724system.l2c.tags.tagsinuse 65337.856722 # Cycle average of tags in use 725system.l2c.tags.total_refs 4259784 # Total number of references to valid blocks. 726system.l2c.tags.sampled_refs 1064972 # Sample count of references to valid blocks. 727system.l2c.tags.avg_refs 3.999902 # Average number of references to valid blocks. 728system.l2c.tags.warmup_cycle 838081000 # Cycle when the warmup percentage was hit. 729system.l2c.tags.occ_blocks::writebacks 55997.404251 # Average occupied blocks per requestor 730system.l2c.tags.occ_blocks::cpu0.inst 4860.296117 # Average occupied blocks per requestor 731system.l2c.tags.occ_blocks::cpu0.data 4190.275222 # Average occupied blocks per requestor 732system.l2c.tags.occ_blocks::cpu1.inst 175.171528 # Average occupied blocks per requestor 733system.l2c.tags.occ_blocks::cpu1.data 114.709605 # Average occupied blocks per requestor 734system.l2c.tags.occ_percent::writebacks 0.854453 # Average percentage of cache occupancy 735system.l2c.tags.occ_percent::cpu0.inst 0.074162 # Average percentage of cache occupancy 736system.l2c.tags.occ_percent::cpu0.data 0.063939 # Average percentage of cache occupancy 737system.l2c.tags.occ_percent::cpu1.inst 0.002673 # Average percentage of cache occupancy 738system.l2c.tags.occ_percent::cpu1.data 0.001750 # Average percentage of cache occupancy 739system.l2c.tags.occ_percent::total 0.996977 # Average percentage of cache occupancy 740system.l2c.tags.occ_task_id_blocks::1024 65050 # Occupied blocks per task id 741system.l2c.tags.age_task_id_blocks_1024::0 768 # Occupied blocks per task id 742system.l2c.tags.age_task_id_blocks_1024::1 3271 # Occupied blocks per task id 743system.l2c.tags.age_task_id_blocks_1024::2 6047 # Occupied blocks per task id 744system.l2c.tags.age_task_id_blocks_1024::3 5933 # Occupied blocks per task id 745system.l2c.tags.age_task_id_blocks_1024::4 49031 # Occupied blocks per task id 746system.l2c.tags.occ_task_id_percent::1024 0.992584 # Percentage of cache occupancy per task id 747system.l2c.tags.tag_accesses 46377222 # Number of tag accesses 748system.l2c.tags.data_accesses 46377222 # Number of data accesses 749system.l2c.WritebackDirty_hits::writebacks 777663 # number of WritebackDirty hits 750system.l2c.WritebackDirty_hits::total 777663 # number of WritebackDirty hits 751system.l2c.WritebackClean_hits::writebacks 721478 # number of WritebackClean hits 752system.l2c.WritebackClean_hits::total 721478 # number of WritebackClean hits 753system.l2c.UpgradeReq_hits::cpu0.data 130 # number of UpgradeReq hits 754system.l2c.UpgradeReq_hits::cpu1.data 604 # number of UpgradeReq hits 755system.l2c.UpgradeReq_hits::total 734 # number of UpgradeReq hits 756system.l2c.SCUpgradeReq_hits::cpu0.data 44 # number of SCUpgradeReq hits 757system.l2c.SCUpgradeReq_hits::cpu1.data 28 # number of SCUpgradeReq hits 758system.l2c.SCUpgradeReq_hits::total 72 # number of SCUpgradeReq hits 759system.l2c.ReadExReq_hits::cpu0.data 111475 # number of ReadExReq hits 760system.l2c.ReadExReq_hits::cpu1.data 56605 # number of ReadExReq hits 761system.l2c.ReadExReq_hits::total 168080 # number of ReadExReq hits 762system.l2c.ReadCleanReq_hits::cpu0.inst 607070 # number of ReadCleanReq hits 763system.l2c.ReadCleanReq_hits::cpu1.inst 379530 # number of ReadCleanReq hits 764system.l2c.ReadCleanReq_hits::total 986600 # number of ReadCleanReq hits 765system.l2c.ReadSharedReq_hits::cpu0.data 626719 # number of ReadSharedReq hits 766system.l2c.ReadSharedReq_hits::cpu1.data 129011 # number of ReadSharedReq hits 767system.l2c.ReadSharedReq_hits::total 755730 # number of ReadSharedReq hits 768system.l2c.demand_hits::cpu0.inst 607070 # number of demand (read+write) hits 769system.l2c.demand_hits::cpu0.data 738194 # number of demand (read+write) hits 770system.l2c.demand_hits::cpu1.inst 379530 # number of demand (read+write) hits 771system.l2c.demand_hits::cpu1.data 185616 # number of demand (read+write) hits 772system.l2c.demand_hits::total 1910410 # number of demand (read+write) hits 773system.l2c.overall_hits::cpu0.inst 607070 # number of overall hits 774system.l2c.overall_hits::cpu0.data 738194 # number of overall hits 775system.l2c.overall_hits::cpu1.inst 379530 # number of overall hits 776system.l2c.overall_hits::cpu1.data 185616 # number of overall hits 777system.l2c.overall_hits::total 1910410 # number of overall hits 778system.l2c.UpgradeReq_misses::cpu0.data 2989 # number of UpgradeReq misses 779system.l2c.UpgradeReq_misses::cpu1.data 2147 # number of UpgradeReq misses 780system.l2c.UpgradeReq_misses::total 5136 # number of UpgradeReq misses 781system.l2c.SCUpgradeReq_misses::cpu0.data 1165 # number of SCUpgradeReq misses 782system.l2c.SCUpgradeReq_misses::cpu1.data 1095 # number of SCUpgradeReq misses 783system.l2c.SCUpgradeReq_misses::total 2260 # number of SCUpgradeReq misses 784system.l2c.ReadExReq_misses::cpu0.data 113871 # number of ReadExReq misses 785system.l2c.ReadExReq_misses::cpu1.data 11066 # number of ReadExReq misses 786system.l2c.ReadExReq_misses::total 124937 # number of ReadExReq misses 787system.l2c.ReadCleanReq_misses::cpu0.inst 11848 # number of ReadCleanReq misses 788system.l2c.ReadCleanReq_misses::cpu1.inst 1658 # number of ReadCleanReq misses 789system.l2c.ReadCleanReq_misses::total 13506 # number of ReadCleanReq misses 790system.l2c.ReadSharedReq_misses::cpu0.data 926615 # number of ReadSharedReq misses 791system.l2c.ReadSharedReq_misses::cpu1.data 1035 # number of ReadSharedReq misses 792system.l2c.ReadSharedReq_misses::total 927650 # number of ReadSharedReq misses 793system.l2c.demand_misses::cpu0.inst 11848 # number of demand (read+write) misses 794system.l2c.demand_misses::cpu0.data 1040486 # number of demand (read+write) misses 795system.l2c.demand_misses::cpu1.inst 1658 # number of demand (read+write) misses 796system.l2c.demand_misses::cpu1.data 12101 # number of demand (read+write) misses 797system.l2c.demand_misses::total 1066093 # number of demand (read+write) misses 798system.l2c.overall_misses::cpu0.inst 11848 # number of overall misses 799system.l2c.overall_misses::cpu0.data 1040486 # number of overall misses 800system.l2c.overall_misses::cpu1.inst 1658 # number of overall misses 801system.l2c.overall_misses::cpu1.data 12101 # number of overall misses 802system.l2c.overall_misses::total 1066093 # number of overall misses 803system.l2c.WritebackDirty_accesses::writebacks 777663 # number of WritebackDirty accesses(hits+misses) 804system.l2c.WritebackDirty_accesses::total 777663 # number of WritebackDirty accesses(hits+misses) 805system.l2c.WritebackClean_accesses::writebacks 721478 # number of WritebackClean accesses(hits+misses) 806system.l2c.WritebackClean_accesses::total 721478 # number of WritebackClean accesses(hits+misses) 807system.l2c.UpgradeReq_accesses::cpu0.data 3119 # number of UpgradeReq accesses(hits+misses) 808system.l2c.UpgradeReq_accesses::cpu1.data 2751 # number of UpgradeReq accesses(hits+misses) 809system.l2c.UpgradeReq_accesses::total 5870 # number of UpgradeReq accesses(hits+misses) 810system.l2c.SCUpgradeReq_accesses::cpu0.data 1209 # number of SCUpgradeReq accesses(hits+misses) 811system.l2c.SCUpgradeReq_accesses::cpu1.data 1123 # number of SCUpgradeReq accesses(hits+misses) 812system.l2c.SCUpgradeReq_accesses::total 2332 # number of SCUpgradeReq accesses(hits+misses) 813system.l2c.ReadExReq_accesses::cpu0.data 225346 # number of ReadExReq accesses(hits+misses) 814system.l2c.ReadExReq_accesses::cpu1.data 67671 # number of ReadExReq accesses(hits+misses) 815system.l2c.ReadExReq_accesses::total 293017 # number of ReadExReq accesses(hits+misses) 816system.l2c.ReadCleanReq_accesses::cpu0.inst 618918 # number of ReadCleanReq accesses(hits+misses) 817system.l2c.ReadCleanReq_accesses::cpu1.inst 381188 # number of ReadCleanReq accesses(hits+misses) 818system.l2c.ReadCleanReq_accesses::total 1000106 # number of ReadCleanReq accesses(hits+misses) 819system.l2c.ReadSharedReq_accesses::cpu0.data 1553334 # number of ReadSharedReq accesses(hits+misses) 820system.l2c.ReadSharedReq_accesses::cpu1.data 130046 # number of ReadSharedReq accesses(hits+misses) 821system.l2c.ReadSharedReq_accesses::total 1683380 # number of ReadSharedReq accesses(hits+misses) 822system.l2c.demand_accesses::cpu0.inst 618918 # number of demand (read+write) accesses 823system.l2c.demand_accesses::cpu0.data 1778680 # number of demand (read+write) accesses 824system.l2c.demand_accesses::cpu1.inst 381188 # number of demand (read+write) accesses 825system.l2c.demand_accesses::cpu1.data 197717 # number of demand (read+write) accesses 826system.l2c.demand_accesses::total 2976503 # number of demand (read+write) accesses 827system.l2c.overall_accesses::cpu0.inst 618918 # number of overall (read+write) accesses 828system.l2c.overall_accesses::cpu0.data 1778680 # number of overall (read+write) accesses 829system.l2c.overall_accesses::cpu1.inst 381188 # number of overall (read+write) accesses 830system.l2c.overall_accesses::cpu1.data 197717 # number of overall (read+write) accesses 831system.l2c.overall_accesses::total 2976503 # number of overall (read+write) accesses 832system.l2c.UpgradeReq_miss_rate::cpu0.data 0.958320 # miss rate for UpgradeReq accesses 833system.l2c.UpgradeReq_miss_rate::cpu1.data 0.780443 # miss rate for UpgradeReq accesses 834system.l2c.UpgradeReq_miss_rate::total 0.874957 # miss rate for UpgradeReq accesses 835system.l2c.SCUpgradeReq_miss_rate::cpu0.data 0.963606 # miss rate for SCUpgradeReq accesses 836system.l2c.SCUpgradeReq_miss_rate::cpu1.data 0.975067 # miss rate for SCUpgradeReq accesses 837system.l2c.SCUpgradeReq_miss_rate::total 0.969125 # miss rate for SCUpgradeReq accesses 838system.l2c.ReadExReq_miss_rate::cpu0.data 0.505316 # miss rate for ReadExReq accesses 839system.l2c.ReadExReq_miss_rate::cpu1.data 0.163526 # miss rate for ReadExReq accesses 840system.l2c.ReadExReq_miss_rate::total 0.426381 # miss rate for ReadExReq accesses 841system.l2c.ReadCleanReq_miss_rate::cpu0.inst 0.019143 # miss rate for ReadCleanReq accesses 842system.l2c.ReadCleanReq_miss_rate::cpu1.inst 0.004350 # miss rate for ReadCleanReq accesses 843system.l2c.ReadCleanReq_miss_rate::total 0.013505 # miss rate for ReadCleanReq accesses 844system.l2c.ReadSharedReq_miss_rate::cpu0.data 0.596533 # miss rate for ReadSharedReq accesses 845system.l2c.ReadSharedReq_miss_rate::cpu1.data 0.007959 # miss rate for ReadSharedReq accesses 846system.l2c.ReadSharedReq_miss_rate::total 0.551064 # miss rate for ReadSharedReq accesses 847system.l2c.demand_miss_rate::cpu0.inst 0.019143 # miss rate for demand accesses 848system.l2c.demand_miss_rate::cpu0.data 0.584976 # miss rate for demand accesses 849system.l2c.demand_miss_rate::cpu1.inst 0.004350 # miss rate for demand accesses 850system.l2c.demand_miss_rate::cpu1.data 0.061204 # miss rate for demand accesses 851system.l2c.demand_miss_rate::total 0.358170 # miss rate for demand accesses 852system.l2c.overall_miss_rate::cpu0.inst 0.019143 # miss rate for overall accesses 853system.l2c.overall_miss_rate::cpu0.data 0.584976 # miss rate for overall accesses 854system.l2c.overall_miss_rate::cpu1.inst 0.004350 # miss rate for overall accesses 855system.l2c.overall_miss_rate::cpu1.data 0.061204 # miss rate for overall accesses 856system.l2c.overall_miss_rate::total 0.358170 # miss rate for overall accesses 857system.l2c.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 858system.l2c.blocked_cycles::no_targets 0 # number of cycles access was blocked 859system.l2c.blocked::no_mshrs 0 # number of cycles access was blocked 860system.l2c.blocked::no_targets 0 # number of cycles access was blocked 861system.l2c.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 862system.l2c.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 863system.l2c.writebacks::writebacks 80923 # number of writebacks 864system.l2c.writebacks::total 80923 # number of writebacks 865system.membus.trans_dist::ReadReq 7449 # Transaction distribution 866system.membus.trans_dist::ReadResp 948784 # Transaction distribution 867system.membus.trans_dist::WriteReq 14588 # Transaction distribution 868system.membus.trans_dist::WriteResp 14588 # Transaction distribution 869system.membus.trans_dist::WritebackDirty 122443 # Transaction distribution 870system.membus.trans_dist::CleanEvict 918012 # Transaction distribution 871system.membus.trans_dist::UpgradeReq 19594 # Transaction distribution 872system.membus.trans_dist::SCUpgradeReq 14154 # Transaction distribution 873system.membus.trans_dist::UpgradeResp 8111 # Transaction distribution 874system.membus.trans_dist::ReadExReq 125245 # Transaction distribution 875system.membus.trans_dist::ReadExResp 124222 # Transaction distribution 876system.membus.trans_dist::ReadSharedReq 941335 # Transaction distribution 877system.membus.trans_dist::InvalidateReq 41552 # Transaction distribution 878system.membus.trans_dist::InvalidateResp 41552 # Transaction distribution 879system.membus.pkt_count_system.l2c.mem_side::system.bridge.slave 44074 # Packet count per connected master and slave (bytes) 880system.membus.pkt_count_system.l2c.mem_side::system.physmem.port 3172394 # Packet count per connected master and slave (bytes) 881system.membus.pkt_count_system.l2c.mem_side::total 3216468 # Packet count per connected master and slave (bytes) 882system.membus.pkt_count_system.iocache.mem_side::system.physmem.port 125161 # Packet count per connected master and slave (bytes) 883system.membus.pkt_count_system.iocache.mem_side::total 125161 # Packet count per connected master and slave (bytes) 884system.membus.pkt_count::total 3341629 # Packet count per connected master and slave (bytes) 885system.membus.pkt_size_system.l2c.mem_side::system.bridge.slave 86162 # Cumulative packet size per connected master and slave (bytes) 886system.membus.pkt_size_system.l2c.mem_side::system.physmem.port 73363264 # Cumulative packet size per connected master and slave (bytes) 887system.membus.pkt_size_system.l2c.mem_side::total 73449426 # Cumulative packet size per connected master and slave (bytes) 888system.membus.pkt_size_system.iocache.mem_side::system.physmem.port 2668736 # Cumulative packet size per connected master and slave (bytes) 889system.membus.pkt_size_system.iocache.mem_side::total 2668736 # Cumulative packet size per connected master and slave (bytes) 890system.membus.pkt_size::total 76118162 # Cumulative packet size per connected master and slave (bytes) 891system.membus.snoops 0 # Total snoops (count) 892system.membus.snoop_fanout::samples 2204372 # Request fanout histogram 893system.membus.snoop_fanout::mean 1 # Request fanout histogram 894system.membus.snoop_fanout::stdev 0 # Request fanout histogram 895system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram 896system.membus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram 897system.membus.snoop_fanout::1 2204372 100.00% 100.00% # Request fanout histogram 898system.membus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram 899system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 900system.membus.snoop_fanout::min_value 1 # Request fanout histogram 901system.membus.snoop_fanout::max_value 1 # Request fanout histogram 902system.membus.snoop_fanout::total 2204372 # Request fanout histogram 903system.toL2Bus.snoop_filter.tot_requests 6035855 # Total number of requests made to the snoop filter. 904system.toL2Bus.snoop_filter.hit_single_requests 3018704 # Number of requests hitting in the snoop filter with a single holder of the requested data. 905system.toL2Bus.snoop_filter.hit_multi_requests 374458 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. 906system.toL2Bus.snoop_filter.tot_snoops 1611 # Total number of snoops made to the snoop filter. 907system.toL2Bus.snoop_filter.hit_single_snoops 1521 # Number of snoops hitting in the snoop filter with a single holder of the requested data. 908system.toL2Bus.snoop_filter.hit_multi_snoops 90 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. 909system.toL2Bus.trans_dist::ReadReq 7449 # Transaction distribution 910system.toL2Bus.trans_dist::ReadResp 2732156 # Transaction distribution 911system.toL2Bus.trans_dist::WriteReq 14588 # Transaction distribution 912system.toL2Bus.trans_dist::WriteResp 14588 # Transaction distribution 913system.toL2Bus.trans_dist::WritebackDirty 777663 # Transaction distribution 914system.toL2Bus.trans_dist::WritebackClean 998939 # Transaction distribution 915system.toL2Bus.trans_dist::CleanEvict 1205465 # Transaction distribution 916system.toL2Bus.trans_dist::UpgradeReq 19613 # Transaction distribution 917system.toL2Bus.trans_dist::SCUpgradeReq 14226 # Transaction distribution 918system.toL2Bus.trans_dist::UpgradeResp 33839 # Transaction distribution 919system.toL2Bus.trans_dist::ReadExReq 295242 # Transaction distribution 920system.toL2Bus.trans_dist::ReadExResp 295242 # Transaction distribution 921system.toL2Bus.trans_dist::ReadCleanReq 1000127 # Transaction distribution 922system.toL2Bus.trans_dist::ReadSharedReq 1724580 # Transaction distribution 923system.toL2Bus.pkt_count_system.cpu0.icache.mem_side::system.l2c.cpu_side 1856170 # Packet count per connected master and slave (bytes) 924system.toL2Bus.pkt_count_system.cpu0.dcache.mem_side::system.l2c.cpu_side 5450139 # Packet count per connected master and slave (bytes) 925system.toL2Bus.pkt_count_system.cpu1.icache.mem_side::system.l2c.cpu_side 1143023 # Packet count per connected master and slave (bytes) 926system.toL2Bus.pkt_count_system.cpu1.dcache.mem_side::system.l2c.cpu_side 684385 # Packet count per connected master and slave (bytes) 927system.toL2Bus.pkt_count::total 9133717 # Packet count per connected master and slave (bytes) 928system.toL2Bus.pkt_size_system.cpu0.icache.mem_side::system.l2c.cpu_side 79182784 # Cumulative packet size per connected master and slave (bytes) 929system.toL2Bus.pkt_size_system.cpu0.dcache.mem_side::system.l2c.cpu_side 155766779 # Cumulative packet size per connected master and slave (bytes) 930system.toL2Bus.pkt_size_system.cpu1.icache.mem_side::system.l2c.cpu_side 48757440 # Cumulative packet size per connected master and slave (bytes) 931system.toL2Bus.pkt_size_system.cpu1.dcache.mem_side::system.l2c.cpu_side 23358423 # Cumulative packet size per connected master and slave (bytes) 932system.toL2Bus.pkt_size::total 307065426 # Cumulative packet size per connected master and slave (bytes) 933system.toL2Bus.snoops 1083516 # Total snoops (count) 934system.toL2Bus.snoop_fanout::samples 7141244 # Request fanout histogram 935system.toL2Bus.snoop_fanout::mean 0.105534 # Request fanout histogram 936system.toL2Bus.snoop_fanout::stdev 0.307488 # Request fanout histogram 937system.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram 938system.toL2Bus.snoop_fanout::0 6388144 89.45% 89.45% # Request fanout histogram 939system.toL2Bus.snoop_fanout::1 752560 10.54% 99.99% # Request fanout histogram 940system.toL2Bus.snoop_fanout::2 538 0.01% 100.00% # Request fanout histogram 941system.toL2Bus.snoop_fanout::3 2 0.00% 100.00% # Request fanout histogram 942system.toL2Bus.snoop_fanout::4 0 0.00% 100.00% # Request fanout histogram 943system.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 944system.toL2Bus.snoop_fanout::min_value 0 # Request fanout histogram 945system.toL2Bus.snoop_fanout::max_value 3 # Request fanout histogram 946system.toL2Bus.snoop_fanout::total 7141244 # Request fanout histogram 947system.tsunami.ethernet.descDMAReads 0 # Number of descriptors the device read w/ DMA 948system.tsunami.ethernet.descDMAWrites 0 # Number of descriptors the device wrote w/ DMA 949system.tsunami.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA 950system.tsunami.ethernet.descDmaWriteBytes 0 # number of descriptor bytes write w/ DMA 951system.tsunami.ethernet.postedSwi 0 # number of software interrupts posted to CPU 952system.tsunami.ethernet.coalescedSwi nan # average number of Swi's coalesced into each post 953system.tsunami.ethernet.totalSwi 0 # total number of Swi written to ISR 954system.tsunami.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU 955system.tsunami.ethernet.coalescedRxIdle nan # average number of RxIdle's coalesced into each post 956system.tsunami.ethernet.totalRxIdle 0 # total number of RxIdle written to ISR 957system.tsunami.ethernet.postedRxOk 0 # number of RxOk interrupts posted to CPU 958system.tsunami.ethernet.coalescedRxOk nan # average number of RxOk's coalesced into each post 959system.tsunami.ethernet.totalRxOk 0 # total number of RxOk written to ISR 960system.tsunami.ethernet.postedRxDesc 0 # number of RxDesc interrupts posted to CPU 961system.tsunami.ethernet.coalescedRxDesc nan # average number of RxDesc's coalesced into each post 962system.tsunami.ethernet.totalRxDesc 0 # total number of RxDesc written to ISR 963system.tsunami.ethernet.postedTxOk 0 # number of TxOk interrupts posted to CPU 964system.tsunami.ethernet.coalescedTxOk nan # average number of TxOk's coalesced into each post 965system.tsunami.ethernet.totalTxOk 0 # total number of TxOk written to ISR 966system.tsunami.ethernet.postedTxIdle 0 # number of TxIdle interrupts posted to CPU 967system.tsunami.ethernet.coalescedTxIdle nan # average number of TxIdle's coalesced into each post 968system.tsunami.ethernet.totalTxIdle 0 # total number of TxIdle written to ISR 969system.tsunami.ethernet.postedTxDesc 0 # number of TxDesc interrupts posted to CPU 970system.tsunami.ethernet.coalescedTxDesc nan # average number of TxDesc's coalesced into each post 971system.tsunami.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR 972system.tsunami.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU 973system.tsunami.ethernet.coalescedRxOrn nan # average number of RxOrn's coalesced into each post 974system.tsunami.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR 975system.tsunami.ethernet.coalescedTotal nan # average number of interrupts coalesced into each post 976system.tsunami.ethernet.postedInterrupts 0 # number of posts to CPU 977system.tsunami.ethernet.droppedPackets 0 # number of packets dropped 978 979---------- End Simulation Statistics ---------- 980