config.ini revision 11515
12623SN/A[root] 22623SN/Atype=Root 32623SN/Achildren=system 42623SN/Aeventq_index=0 52623SN/Afull_system=false 62623SN/Asim_quantum=0 72623SN/Atime_sync_enable=false 82623SN/Atime_sync_period=100000000000 92623SN/Atime_sync_spin_threshold=100000000 102623SN/A 112623SN/A[system] 122623SN/Atype=System 132623SN/Achildren=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain 142623SN/Aboot_osflags=a 152623SN/Acache_line_size=64 162623SN/Aclk_domain=system.clk_domain 172623SN/Aeventq_index=0 182623SN/Aexit_on_work_items=false 192623SN/Ainit_param=0 202623SN/Akernel= 212623SN/Akernel_addr_check=true 222623SN/Aload_addr_mask=1099511627775 232623SN/Aload_offset=0 242623SN/Amem_mode=timing 252623SN/Amem_ranges= 262623SN/Amemories=system.physmem 272665Ssaidi@eecs.umich.edummap_using_noreserve=false 282665Ssaidi@eecs.umich.edumulti_thread=false 292623SN/Anum_work_ids=16 302623SN/Areadfile= 313170Sstever@eecs.umich.edusymbolfile= 322623SN/Athermal_components= 332623SN/Athermal_model=Null 342623SN/Awork_begin_ckpt_count=0 353348Sbinkertn@umich.eduwork_begin_cpu_id_exit=-1 363348Sbinkertn@umich.eduwork_begin_exit_count=0 372623SN/Awork_cpus_ckpt_count=0 382901Ssaidi@eecs.umich.eduwork_end_ckpt_count=0 392623SN/Awork_end_exit_count=0 402623SN/Awork_item_id=-1 412623SN/Asystem_port=system.membus.slave[0] 422623SN/A 432623SN/A[system.clk_domain] 442623SN/Atype=SrcClockDomain 452623SN/Aclock=1000 462623SN/Adomain_id=-1 472623SN/Aeventq_index=0 482623SN/Ainit_perf_level=0 492623SN/Avoltage_domain=system.voltage_domain 502623SN/A 512623SN/A[system.cpu] 522623SN/Atype=DerivO3CPU 532623SN/Achildren=branchPred dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer workload 542623SN/ALFSTSize=1024 552623SN/ALQEntries=16 562623SN/ALSQCheckLoads=true 572623SN/ALSQDepCheckShift=0 582623SN/ASQEntries=16 592623SN/ASSITSize=1024 602623SN/Aactivity=0 612856Srdreslin@umich.edubackComSize=5 622856Srdreslin@umich.edubranchPred=system.cpu.branchPred 632856Srdreslin@umich.educachePorts=200 642856Srdreslin@umich.educhecker=Null 652856Srdreslin@umich.educlk_domain=system.cpu_clk_domain 662856Srdreslin@umich.educommitToDecodeDelay=1 672856Srdreslin@umich.educommitToFetchDelay=1 682856Srdreslin@umich.educommitToIEWDelay=1 692856Srdreslin@umich.educommitToRenameDelay=1 702856Srdreslin@umich.educommitWidth=8 712623SN/Acpu_id=0 722623SN/AdecodeToFetchDelay=1 732623SN/AdecodeToRenameDelay=2 742623SN/AdecodeWidth=3 752623SN/AdispatchWidth=6 762623SN/Ado_checkpoint_insts=true 772680Sktlim@umich.edudo_quiesce=true 782680Sktlim@umich.edudo_statistics_insts=true 792623SN/Adstage2_mmu=system.cpu.dstage2_mmu 802623SN/Adtb=system.cpu.dtb 812680Sktlim@umich.edueventq_index=0 822623SN/AfetchBufferSize=16 832623SN/AfetchQueueSize=32 842623SN/AfetchToDecodeDelay=3 852623SN/AfetchTrapLatency=1 862623SN/AfetchWidth=3 873349Sbinkertn@umich.eduforwardComSize=5 882623SN/AfuPool=system.cpu.fuPool 893184Srdreslin@umich.edufunction_trace=false 902623SN/Afunction_trace_start=0 912623SN/AiewToCommitDelay=1 922623SN/AiewToDecodeDelay=1 932623SN/AiewToFetchDelay=1 943349Sbinkertn@umich.eduiewToRenameDelay=1 952623SN/Ainterrupts=system.cpu.interrupts 963310Srdreslin@umich.eduisa=system.cpu.isa 972623SN/AissueToExecuteDelay=1 982623SN/AissueWidth=8 992623SN/Aistage2_mmu=system.cpu.istage2_mmu 1002623SN/Aitb=system.cpu.itb 1013349Sbinkertn@umich.edumax_insts_all_threads=0 1022623SN/Amax_insts_any_thread=0 1033184Srdreslin@umich.edumax_loads_all_threads=0 1043184Srdreslin@umich.edumax_loads_any_thread=0 1052623SN/AneedsTSO=false 1062623SN/AnumIQEntries=32 1072623SN/AnumPhysCCRegs=640 1082623SN/AnumPhysFloatRegs=192 1092623SN/AnumPhysIntRegs=128 1103647Srdreslin@umich.edunumROBEntries=40 1113647Srdreslin@umich.edunumRobs=1 1123647Srdreslin@umich.edunumThreads=1 1133647Srdreslin@umich.eduprofile=0 1143647Srdreslin@umich.eduprogress_interval=0 1152626SN/ArenameToDecodeDelay=1 1163647Srdreslin@umich.edurenameToFetchDelay=1 1172626SN/ArenameToIEWDelay=1 1182623SN/ArenameToROBDelay=1 1192623SN/ArenameWidth=3 1202623SN/Asimpoint_start_insts= 1212657Ssaidi@eecs.umich.edusmtCommitPolicy=RoundRobin 1222623SN/AsmtFetchPolicy=SingleThread 1232623SN/AsmtIQPolicy=Partitioned 1242623SN/AsmtIQThreshold=100 1252623SN/AsmtLSQPolicy=Partitioned 1262623SN/AsmtLSQThreshold=100 1272623SN/AsmtNumFetchingThreads=1 1282623SN/AsmtROBPolicy=Partitioned 1292623SN/AsmtROBThreshold=100 1302623SN/Asocket_id=0 1312640Sstever@eecs.umich.edusquashWidth=8 1322623SN/Astore_set_clear_period=250000 1332623SN/Aswitched_out=false 1342623SN/Asystem=system 1353647Srdreslin@umich.edutracer=system.cpu.tracer 1363647Srdreslin@umich.edutrapLatency=13 1373647Srdreslin@umich.eduwbWidth=8 1382663Sstever@eecs.umich.eduworkload=system.cpu.workload 1393170Sstever@eecs.umich.edudcache_port=system.cpu.dcache.cpu_side 1402641Sstever@eecs.umich.eduicache_port=system.cpu.icache.cpu_side 1412623SN/A 1422623SN/A[system.cpu.branchPred] 1432663Sstever@eecs.umich.edutype=BiModeBP 1443170Sstever@eecs.umich.eduBTBEntries=2048 1452641Sstever@eecs.umich.eduBTBTagSize=18 1462641Sstever@eecs.umich.eduRASSize=16 1472623SN/AchoiceCtrBits=2 1482623SN/AchoicePredictorSize=8192 1492663Sstever@eecs.umich.edueventq_index=0 1503170Sstever@eecs.umich.eduglobalCtrBits=2 1512641Sstever@eecs.umich.eduglobalPredictorSize=8192 1522641Sstever@eecs.umich.eduindirectHashGHR=true 1532623SN/AindirectHashTargets=true 1542623SN/AindirectPathLength=3 1552623SN/AindirectSets=256 1562623SN/AindirectTagSize=16 1572623SN/AindirectWays=2 1582623SN/AinstShiftAmt=2 1592623SN/AnumThreads=1 1602623SN/AuseIndirect=true 1612623SN/A 1622623SN/A[system.cpu.dcache] 1632915Sktlim@umich.edutype=Cache 1642915Sktlim@umich.educhildren=tags 1653177Shsul@eecs.umich.eduaddr_ranges=0:18446744073709551615 1663177Shsul@eecs.umich.eduassoc=2 1673145Shsul@eecs.umich.educlk_domain=system.cpu_clk_domain 1682623SN/Aclusivity=mostly_incl 1692623SN/Ademand_mshr_reserve=1 1702623SN/Aeventq_index=0 1712623SN/Ahit_latency=2 1722623SN/Ais_read_only=false 1732623SN/Amax_miss_count=0 1742623SN/Amshrs=6 1752915Sktlim@umich.eduprefetch_on_access=false 1762915Sktlim@umich.eduprefetcher=Null 1773177Shsul@eecs.umich.eduresponse_latency=2 1783145Shsul@eecs.umich.edusequential_access=false 1792915Sktlim@umich.edusize=32768 1802915Sktlim@umich.edusystem=system 1812915Sktlim@umich.edutags=system.cpu.dcache.tags 1822915Sktlim@umich.edutgts_per_mshr=8 1832915Sktlim@umich.eduwrite_buffers=16 1842915Sktlim@umich.eduwriteback_clean=true 1853324Shsul@eecs.umich.educpu_side=system.cpu.dcache_port 1863201Shsul@eecs.umich.edumem_side=system.cpu.toL2Bus.slave[1] 1873324Shsul@eecs.umich.edu 1883324Shsul@eecs.umich.edu[system.cpu.dcache.tags] 1893324Shsul@eecs.umich.edutype=LRU 1903431Sgblack@eecs.umich.eduassoc=2 1913495Sktlim@umich.edublock_size=64 1923431Sgblack@eecs.umich.educlk_domain=system.cpu_clk_domain 1933324Shsul@eecs.umich.edueventq_index=0 1942915Sktlim@umich.eduhit_latency=2 1952623SN/Asequential_access=false 1962623SN/Asize=32768 1972623SN/A 1982798Sktlim@umich.edu[system.cpu.dstage2_mmu] 1992623SN/Atype=ArmStage2MMU 2002798Sktlim@umich.educhildren=stage2_tlb 2012798Sktlim@umich.edueventq_index=0 2022623SN/Astage2_tlb=system.cpu.dstage2_mmu.stage2_tlb 2032798Sktlim@umich.edusys=system 2042623SN/Atlb=system.cpu.dtb 2052623SN/A 2062623SN/A[system.cpu.dstage2_mmu.stage2_tlb] 2072623SN/Atype=ArmTLB 2082623SN/Achildren=walker 2092623SN/Aeventq_index=0 2102623SN/Ais_stage2=true 2112623SN/Asize=32 2122623SN/Awalker=system.cpu.dstage2_mmu.stage2_tlb.walker 2132623SN/A 2142680Sktlim@umich.edu[system.cpu.dstage2_mmu.stage2_tlb.walker] 2152623SN/Atype=ArmTableWalker 2162680Sktlim@umich.educlk_domain=system.cpu_clk_domain 2172680Sktlim@umich.edueventq_index=0 2182680Sktlim@umich.eduis_stage2=true 2192623SN/Anum_squash_per_cycle=2 2203495Sktlim@umich.edusys=system 2212623SN/A 2222623SN/A[system.cpu.dtb] 2232623SN/Atype=ArmTLB 2243512Sktlim@umich.educhildren=walker 2253512Sktlim@umich.edueventq_index=0 2263512Sktlim@umich.eduis_stage2=false 2272623SN/Asize=64 2282623SN/Awalker=system.cpu.dtb.walker 2292623SN/A 2302623SN/A[system.cpu.dtb.walker] 2312623SN/Atype=ArmTableWalker 2322623SN/Aclk_domain=system.cpu_clk_domain 2332623SN/Aeventq_index=0 2342683Sktlim@umich.eduis_stage2=false 2352623SN/Anum_squash_per_cycle=2 2362623SN/Asys=system 2372623SN/Aport=system.cpu.toL2Bus.slave[3] 2382623SN/A 2392623SN/A[system.cpu.fuPool] 2403430Sgblack@eecs.umich.edutype=FUPool 2413495Sktlim@umich.educhildren=FUList0 FUList1 FUList2 FUList3 FUList4 2422623SN/AFUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 2432623SN/Aeventq_index=0 2442623SN/A 2452623SN/A[system.cpu.fuPool.FUList0] 2462623SN/Atype=FUDesc 2472623SN/Achildren=opList 2482623SN/Acount=2 2492623SN/Aeventq_index=0 2502683Sktlim@umich.eduopList=system.cpu.fuPool.FUList0.opList 2512623SN/A 2522623SN/A[system.cpu.fuPool.FUList0.opList] 2532626SN/Atype=OpDesc 2542626SN/Aeventq_index=0 2552626SN/AopClass=IntAlu 2562626SN/AopLat=1 2572626SN/Apipelined=true 2582623SN/A 2592623SN/A[system.cpu.fuPool.FUList1] 2602623SN/Atype=FUDesc 2612623SN/Achildren=opList0 opList1 opList2 2622623SN/Acount=1 2632623SN/Aeventq_index=0 2642623SN/AopList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 system.cpu.fuPool.FUList1.opList2 2652623SN/A 2662623SN/A[system.cpu.fuPool.FUList1.opList0] 2672623SN/Atype=OpDesc 2683169Sstever@eecs.umich.edueventq_index=0 2693169Sstever@eecs.umich.eduopClass=IntMult 2703349Sbinkertn@umich.eduopLat=3 2713169Sstever@eecs.umich.edupipelined=true 2723169Sstever@eecs.umich.edu 2732623SN/A[system.cpu.fuPool.FUList1.opList1] 2742623SN/Atype=OpDesc 2752623SN/Aeventq_index=0 2762623SN/AopClass=IntDiv 2772623SN/AopLat=12 2782623SN/Apipelined=false 2793169Sstever@eecs.umich.edu 2802623SN/A[system.cpu.fuPool.FUList1.opList2] 2812623SN/Atype=OpDesc 2822623SN/Aeventq_index=0 2833169Sstever@eecs.umich.eduopClass=IprAccess 2842623SN/AopLat=3 2853169Sstever@eecs.umich.edupipelined=true 2862623SN/A 2872623SN/A[system.cpu.fuPool.FUList2] 2883169Sstever@eecs.umich.edutype=FUDesc 2893169Sstever@eecs.umich.educhildren=opList 2903170Sstever@eecs.umich.educount=1 2913170Sstever@eecs.umich.edueventq_index=0 2923170Sstever@eecs.umich.eduopList=system.cpu.fuPool.FUList2.opList 2933170Sstever@eecs.umich.edu 2942623SN/A[system.cpu.fuPool.FUList2.opList] 2952623SN/Atype=OpDesc 2962623SN/Aeventq_index=0 2973172Sstever@eecs.umich.eduopClass=MemRead 2982623SN/AopLat=2 2992623SN/Apipelined=true 3002623SN/A 3012623SN/A[system.cpu.fuPool.FUList3] 3022623SN/Atype=FUDesc 3032623SN/Achildren=opList 3042623SN/Acount=1 3052623SN/Aeventq_index=0 3062623SN/AopList=system.cpu.fuPool.FUList3.opList 3072623SN/A 3082623SN/A[system.cpu.fuPool.FUList3.opList] 3092623SN/Atype=OpDesc 3102623SN/Aeventq_index=0 3112623SN/AopClass=MemWrite 3122623SN/AopLat=2 3132623SN/Apipelined=true 3142623SN/A 3152623SN/A[system.cpu.fuPool.FUList4] 3162623SN/Atype=FUDesc 3172623SN/Achildren=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 opList20 opList21 opList22 opList23 opList24 opList25 3182623SN/Acount=2 3192623SN/Aeventq_index=0 3202623SN/AopList=system.cpu.fuPool.FUList4.opList00 system.cpu.fuPool.FUList4.opList01 system.cpu.fuPool.FUList4.opList02 system.cpu.fuPool.FUList4.opList03 system.cpu.fuPool.FUList4.opList04 system.cpu.fuPool.FUList4.opList05 system.cpu.fuPool.FUList4.opList06 system.cpu.fuPool.FUList4.opList07 system.cpu.fuPool.FUList4.opList08 system.cpu.fuPool.FUList4.opList09 system.cpu.fuPool.FUList4.opList10 system.cpu.fuPool.FUList4.opList11 system.cpu.fuPool.FUList4.opList12 system.cpu.fuPool.FUList4.opList13 system.cpu.fuPool.FUList4.opList14 system.cpu.fuPool.FUList4.opList15 system.cpu.fuPool.FUList4.opList16 system.cpu.fuPool.FUList4.opList17 system.cpu.fuPool.FUList4.opList18 system.cpu.fuPool.FUList4.opList19 system.cpu.fuPool.FUList4.opList20 system.cpu.fuPool.FUList4.opList21 system.cpu.fuPool.FUList4.opList22 system.cpu.fuPool.FUList4.opList23 system.cpu.fuPool.FUList4.opList24 system.cpu.fuPool.FUList4.opList25 3212623SN/A 3222623SN/A[system.cpu.fuPool.FUList4.opList00] 3232623SN/Atype=OpDesc 3242623SN/Aeventq_index=0 3252623SN/AopClass=SimdAdd 3262623SN/AopLat=4 3272623SN/Apipelined=true 3282623SN/A 3292623SN/A[system.cpu.fuPool.FUList4.opList01] 3302623SN/Atype=OpDesc 3312623SN/Aeventq_index=0 3322623SN/AopClass=SimdAddAcc 3332623SN/AopLat=4 3342623SN/Apipelined=true 3352623SN/A 3362623SN/A[system.cpu.fuPool.FUList4.opList02] 3372623SN/Atype=OpDesc 3382623SN/Aeventq_index=0 3392623SN/AopClass=SimdAlu 3402623SN/AopLat=4 3412623SN/Apipelined=true 3422623SN/A 3432623SN/A[system.cpu.fuPool.FUList4.opList03] 3442623SN/Atype=OpDesc 3452623SN/Aeventq_index=0 3462623SN/AopClass=SimdCmp 3472623SN/AopLat=4 3482623SN/Apipelined=true 3492623SN/A 3503169Sstever@eecs.umich.edu[system.cpu.fuPool.FUList4.opList04] 3513169Sstever@eecs.umich.edutype=OpDesc 3523349Sbinkertn@umich.edueventq_index=0 3533169Sstever@eecs.umich.eduopClass=SimdCvt 3543169Sstever@eecs.umich.eduopLat=3 3552623SN/Apipelined=true 3562623SN/A 3572623SN/A[system.cpu.fuPool.FUList4.opList05] 3582623SN/Atype=OpDesc 3592623SN/Aeventq_index=0 3602623SN/AopClass=SimdMisc 3613169Sstever@eecs.umich.eduopLat=3 3622623SN/Apipelined=true 3632623SN/A 3642623SN/A[system.cpu.fuPool.FUList4.opList06] 3653170Sstever@eecs.umich.edutype=OpDesc 3662623SN/Aeventq_index=0 3673170Sstever@eecs.umich.eduopClass=SimdMult 3683170Sstever@eecs.umich.eduopLat=5 3693170Sstever@eecs.umich.edupipelined=true 3702623SN/A 3713170Sstever@eecs.umich.edu[system.cpu.fuPool.FUList4.opList07] 3723170Sstever@eecs.umich.edutype=OpDesc 3733170Sstever@eecs.umich.edueventq_index=0 3743170Sstever@eecs.umich.eduopClass=SimdMultAcc 3752631SN/AopLat=5 3763170Sstever@eecs.umich.edupipelined=true 3773170Sstever@eecs.umich.edu 3783170Sstever@eecs.umich.edu[system.cpu.fuPool.FUList4.opList08] 3793170Sstever@eecs.umich.edutype=OpDesc 3803170Sstever@eecs.umich.edueventq_index=0 3813170Sstever@eecs.umich.eduopClass=SimdShift 3823170Sstever@eecs.umich.eduopLat=3 3833170Sstever@eecs.umich.edupipelined=true 3843170Sstever@eecs.umich.edu 3853170Sstever@eecs.umich.edu[system.cpu.fuPool.FUList4.opList09] 3863170Sstever@eecs.umich.edutype=OpDesc 3873170Sstever@eecs.umich.edueventq_index=0 3883170Sstever@eecs.umich.eduopClass=SimdShiftAcc 3893170Sstever@eecs.umich.eduopLat=3 3903170Sstever@eecs.umich.edupipelined=true 3912631SN/A 3922623SN/A[system.cpu.fuPool.FUList4.opList10] 3932623SN/Atype=OpDesc 3942623SN/Aeventq_index=0 3953172Sstever@eecs.umich.eduopClass=SimdSqrt 3962623SN/AopLat=9 3972623SN/Apipelined=true 3982623SN/A 3992623SN/A[system.cpu.fuPool.FUList4.opList11] 4002623SN/Atype=OpDesc 4012623SN/Aeventq_index=0 4022623SN/AopClass=SimdFloatAdd 4032623SN/AopLat=5 4042623SN/Apipelined=true 4052623SN/A 4062623SN/A[system.cpu.fuPool.FUList4.opList12] 4072623SN/Atype=OpDesc 4082623SN/Aeventq_index=0 4092623SN/AopClass=SimdFloatAlu 4102623SN/AopLat=5 4112623SN/Apipelined=true 4122623SN/A 4132623SN/A[system.cpu.fuPool.FUList4.opList13] 4142623SN/Atype=OpDesc 4152623SN/Aeventq_index=0 4162623SN/AopClass=SimdFloatCmp 4172623SN/AopLat=3 4182623SN/Apipelined=true 4192623SN/A 4202623SN/A[system.cpu.fuPool.FUList4.opList14] 4212623SN/Atype=OpDesc 4222623SN/Aeventq_index=0 4232623SN/AopClass=SimdFloatCvt 4242623SN/AopLat=3 4252623SN/Apipelined=true 4262623SN/A 4272623SN/A[system.cpu.fuPool.FUList4.opList15] 4282623SN/Atype=OpDesc 4292623SN/Aeventq_index=0 4302623SN/AopClass=SimdFloatDiv 4312623SN/AopLat=3 4322623SN/Apipelined=true 4332623SN/A 4342623SN/A[system.cpu.fuPool.FUList4.opList16] 4352623SN/Atype=OpDesc 4362623SN/Aeventq_index=0 4372623SN/AopClass=SimdFloatMisc 4382623SN/AopLat=3 4392623SN/Apipelined=true 4402623SN/A 4412623SN/A[system.cpu.fuPool.FUList4.opList17] 4422623SN/Atype=OpDesc 4432623SN/Aeventq_index=0 4442623SN/AopClass=SimdFloatMult 4452623SN/AopLat=3 4462623SN/Apipelined=true 4472623SN/A 4482623SN/A[system.cpu.fuPool.FUList4.opList18] 4492623SN/Atype=OpDesc 4502623SN/Aeventq_index=0 4512623SN/AopClass=SimdFloatMultAcc 4522623SN/AopLat=1 4532623SN/Apipelined=true 4542623SN/A 4552623SN/A[system.cpu.fuPool.FUList4.opList19] 4562623SN/Atype=OpDesc 4572623SN/Aeventq_index=0 4583387Sgblack@eecs.umich.eduopClass=SimdFloatSqrt 4593387Sgblack@eecs.umich.eduopLat=9 4602626SN/Apipelined=true 4612662Sstever@eecs.umich.edu 4622623SN/A[system.cpu.fuPool.FUList4.opList20] 4632623SN/Atype=OpDesc 4642662Sstever@eecs.umich.edueventq_index=0 4652662Sstever@eecs.umich.eduopClass=FloatAdd 4662662Sstever@eecs.umich.eduopLat=5 4672623SN/Apipelined=true 4682623SN/A 4692623SN/A[system.cpu.fuPool.FUList4.opList21] 4702623SN/Atype=OpDesc 4712623SN/Aeventq_index=0 4722623SN/AopClass=FloatCmp 4732623SN/AopLat=5 4742623SN/Apipelined=true 4752623SN/A 4762662Sstever@eecs.umich.edu[system.cpu.fuPool.FUList4.opList22] 4772623SN/Atype=OpDesc 4782662Sstever@eecs.umich.edueventq_index=0 4792803Ssaidi@eecs.umich.eduopClass=FloatCvt 4802803Ssaidi@eecs.umich.eduopLat=5 4812803Ssaidi@eecs.umich.edupipelined=true 4822803Ssaidi@eecs.umich.edu 4832803Ssaidi@eecs.umich.edu[system.cpu.fuPool.FUList4.opList23] 4842623SN/Atype=OpDesc 4852623SN/Aeventq_index=0 4862623SN/AopClass=FloatDiv 4872623SN/AopLat=9 4882623SN/Apipelined=false 4892623SN/A 4902623SN/A[system.cpu.fuPool.FUList4.opList24] 4912626SN/Atype=OpDesc 4922626SN/Aeventq_index=0 4932623SN/AopClass=FloatSqrt 4942623SN/AopLat=33 4952623SN/Apipelined=false 4962623SN/A 4972623SN/A[system.cpu.fuPool.FUList4.opList25] 4982623SN/Atype=OpDesc 4992623SN/Aeventq_index=0 5002623SN/AopClass=FloatMult 5012623SN/AopLat=4 5022623SN/Apipelined=true 5032623SN/A 5042623SN/A[system.cpu.icache] 5052623SN/Atype=Cache 5063119Sktlim@umich.educhildren=tags 5072901Ssaidi@eecs.umich.eduaddr_ranges=0:18446744073709551615 5083170Sstever@eecs.umich.eduassoc=2 5092623SN/Aclk_domain=system.cpu_clk_domain 5102623SN/Aclusivity=mostly_incl 5113453Sgblack@eecs.umich.edudemand_mshr_reserve=1 5123453Sgblack@eecs.umich.edueventq_index=0 5132623SN/Ahit_latency=1 5143617Sbinkertn@umich.eduis_read_only=true 5153617Sbinkertn@umich.edumax_miss_count=0 5163617Sbinkertn@umich.edumshrs=2 5173617Sbinkertn@umich.eduprefetch_on_access=false 5182623SN/Aprefetcher=Null 5192623SN/Aresponse_latency=1 5202623SN/Asequential_access=false 5212623SN/Asize=32768 5222623SN/Asystem=system 5232623SN/Atags=system.cpu.icache.tags 5242623SN/Atgts_per_mshr=8 5252623SN/Awrite_buffers=8 5262623SN/Awriteback_clean=true 5272623SN/Acpu_side=system.cpu.icache_port 5282623SN/Amem_side=system.cpu.toL2Bus.slave[0] 5292623SN/A 5302623SN/A[system.cpu.icache.tags] 5312623SN/Atype=LRU 5322623SN/Aassoc=2 5332623SN/Ablock_size=64 5342623SN/Aclk_domain=system.cpu_clk_domain 5352623SN/Aeventq_index=0 5362623SN/Ahit_latency=1 5372623SN/Asequential_access=false 5382623SN/Asize=32768 5392623SN/A 5402623SN/A[system.cpu.interrupts] 5412623SN/Atype=ArmInterrupts 5423119Sktlim@umich.edueventq_index=0 5432901Ssaidi@eecs.umich.edu 5443170Sstever@eecs.umich.edu[system.cpu.isa] 5452623SN/Atype=ArmISA 5462623SN/AdecoderFlavour=Generic 5472623SN/Aeventq_index=0 5482623SN/Afpsid=1090793632 5492623SN/Aid_aa64afr0_el1=0 5503617Sbinkertn@umich.eduid_aa64afr1_el1=0 5513617Sbinkertn@umich.eduid_aa64dfr0_el1=1052678 5523617Sbinkertn@umich.eduid_aa64dfr1_el1=0 5532623SN/Aid_aa64isar0_el1=0 5542623SN/Aid_aa64isar1_el1=0 5552623SN/Aid_aa64mmfr0_el1=15728642 5562623SN/Aid_aa64mmfr1_el1=0 5572623SN/Aid_aa64pfr0_el1=17 5582623SN/Aid_aa64pfr1_el1=0 5592623SN/Aid_isar0=34607377 5602623SN/Aid_isar1=34677009 5612623SN/Aid_isar2=555950401 5622623SN/Aid_isar3=17899825 5632623SN/Aid_isar4=268501314 5642623SN/Aid_isar5=0 5652623SN/Aid_mmfr0=270536963 5662623SN/Aid_mmfr1=0 5672623SN/Aid_mmfr2=19070976 5682623SN/Aid_mmfr3=34611729 5692623SN/Aid_pfr0=49 5702623SN/Aid_pfr1=4113 5712623SN/Amidr=1091551472 5722623SN/Apmu=Null 5732623SN/Asystem=system 5742623SN/A 5752623SN/A[system.cpu.istage2_mmu] 5763119Sktlim@umich.edutype=ArmStage2MMU 5772623SN/Achildren=stage2_tlb 5782623SN/Aeventq_index=0 5792623SN/Astage2_tlb=system.cpu.istage2_mmu.stage2_tlb 5802623SN/Asys=system 5812623SN/Atlb=system.cpu.itb 5822623SN/A 5832901Ssaidi@eecs.umich.edu[system.cpu.istage2_mmu.stage2_tlb] 5843170Sstever@eecs.umich.edutype=ArmTLB 5852623SN/Achildren=walker 5862623SN/Aeventq_index=0 5872623SN/Ais_stage2=true 5882623SN/Asize=32 5892623SN/Awalker=system.cpu.istage2_mmu.stage2_tlb.walker 5903617Sbinkertn@umich.edu 5913617Sbinkertn@umich.edu[system.cpu.istage2_mmu.stage2_tlb.walker] 5923617Sbinkertn@umich.edutype=ArmTableWalker 5932623SN/Aclk_domain=system.cpu_clk_domain 5942623SN/Aeventq_index=0 5952623SN/Ais_stage2=true 5962623SN/Anum_squash_per_cycle=2 5972623SN/Asys=system 5982623SN/A 5992623SN/A[system.cpu.itb] 6002623SN/Atype=ArmTLB 6012623SN/Achildren=walker 6022623SN/Aeventq_index=0 603is_stage2=false 604size=64 605walker=system.cpu.itb.walker 606 607[system.cpu.itb.walker] 608type=ArmTableWalker 609clk_domain=system.cpu_clk_domain 610eventq_index=0 611is_stage2=false 612num_squash_per_cycle=2 613sys=system 614port=system.cpu.toL2Bus.slave[2] 615 616[system.cpu.l2cache] 617type=Cache 618children=prefetcher tags 619addr_ranges=0:18446744073709551615 620assoc=16 621clk_domain=system.cpu_clk_domain 622clusivity=mostly_excl 623demand_mshr_reserve=1 624eventq_index=0 625hit_latency=12 626is_read_only=false 627max_miss_count=0 628mshrs=16 629prefetch_on_access=true 630prefetcher=system.cpu.l2cache.prefetcher 631response_latency=12 632sequential_access=false 633size=1048576 634system=system 635tags=system.cpu.l2cache.tags 636tgts_per_mshr=8 637write_buffers=8 638writeback_clean=false 639cpu_side=system.cpu.toL2Bus.master[0] 640mem_side=system.membus.slave[1] 641 642[system.cpu.l2cache.prefetcher] 643type=StridePrefetcher 644cache_snoop=false 645clk_domain=system.cpu_clk_domain 646degree=8 647eventq_index=0 648latency=1 649max_conf=7 650min_conf=0 651on_data=true 652on_inst=true 653on_miss=false 654on_read=true 655on_write=true 656queue_filter=true 657queue_size=32 658queue_squash=true 659start_conf=4 660sys=system 661table_assoc=4 662table_sets=16 663tag_prefetch=true 664thresh_conf=4 665use_master_id=true 666 667[system.cpu.l2cache.tags] 668type=RandomRepl 669assoc=16 670block_size=64 671clk_domain=system.cpu_clk_domain 672eventq_index=0 673hit_latency=12 674sequential_access=false 675size=1048576 676 677[system.cpu.toL2Bus] 678type=CoherentXBar 679children=snoop_filter 680clk_domain=system.cpu_clk_domain 681eventq_index=0 682forward_latency=0 683frontend_latency=1 684point_of_coherency=false 685response_latency=1 686snoop_filter=system.cpu.toL2Bus.snoop_filter 687snoop_response_latency=1 688system=system 689use_default_range=false 690width=32 691master=system.cpu.l2cache.cpu_side 692slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port 693 694[system.cpu.toL2Bus.snoop_filter] 695type=SnoopFilter 696eventq_index=0 697lookup_latency=0 698max_capacity=8388608 699system=system 700 701[system.cpu.tracer] 702type=ExeTracer 703eventq_index=0 704 705[system.cpu.workload] 706type=LiveProcess 707cmd=vortex lendian.raw 708cwd=build/ARM/tests/opt/long/se/50.vortex/arm/linux/o3-timing 709drivers= 710egid=100 711env= 712errout=cerr 713euid=100 714eventq_index=0 715executable=/dist/m5/cpu2000/binaries/arm/linux/vortex 716gid=100 717input=cin 718kvmInSE=false 719max_stack_size=67108864 720output=cout 721pid=100 722ppid=99 723simpoint=0 724system=system 725uid=100 726useArchPT=false 727 728[system.cpu_clk_domain] 729type=SrcClockDomain 730clock=500 731domain_id=-1 732eventq_index=0 733init_perf_level=0 734voltage_domain=system.voltage_domain 735 736[system.dvfs_handler] 737type=DVFSHandler 738domains= 739enable=false 740eventq_index=0 741sys_clk_domain=system.clk_domain 742transition_latency=100000000 743 744[system.membus] 745type=CoherentXBar 746clk_domain=system.clk_domain 747eventq_index=0 748forward_latency=4 749frontend_latency=3 750point_of_coherency=true 751response_latency=2 752snoop_filter=Null 753snoop_response_latency=4 754system=system 755use_default_range=false 756width=16 757master=system.physmem.port 758slave=system.system_port system.cpu.l2cache.mem_side 759 760[system.physmem] 761type=DRAMCtrl 762IDD0=0.075000 763IDD02=0.000000 764IDD2N=0.050000 765IDD2N2=0.000000 766IDD2P0=0.000000 767IDD2P02=0.000000 768IDD2P1=0.000000 769IDD2P12=0.000000 770IDD3N=0.057000 771IDD3N2=0.000000 772IDD3P0=0.000000 773IDD3P02=0.000000 774IDD3P1=0.000000 775IDD3P12=0.000000 776IDD4R=0.187000 777IDD4R2=0.000000 778IDD4W=0.165000 779IDD4W2=0.000000 780IDD5=0.220000 781IDD52=0.000000 782IDD6=0.000000 783IDD62=0.000000 784VDD=1.500000 785VDD2=0.000000 786activation_limit=4 787addr_mapping=RoRaBaCoCh 788bank_groups_per_rank=0 789banks_per_rank=8 790burst_length=8 791channels=1 792clk_domain=system.clk_domain 793conf_table_reported=true 794device_bus_width=8 795device_rowbuffer_size=1024 796device_size=536870912 797devices_per_rank=8 798dll=true 799eventq_index=0 800in_addr_map=true 801max_accesses_per_row=16 802mem_sched_policy=frfcfs 803min_writes_per_switch=16 804null=false 805page_policy=open_adaptive 806range=0:134217727 807ranks_per_channel=2 808read_buffer_size=32 809static_backend_latency=10000 810static_frontend_latency=10000 811tBURST=5000 812tCCD_L=0 813tCK=1250 814tCL=13750 815tCS=2500 816tRAS=35000 817tRCD=13750 818tREFI=7800000 819tRFC=260000 820tRP=13750 821tRRD=6000 822tRRD_L=0 823tRTP=7500 824tRTW=2500 825tWR=15000 826tWTR=7500 827tXAW=30000 828tXP=0 829tXPDLL=0 830tXS=0 831tXSDLL=0 832write_buffer_size=64 833write_high_thresh_perc=85 834write_low_thresh_perc=50 835port=system.membus.master[0] 836 837[system.voltage_domain] 838type=VoltageDomain 839eventq_index=0 840voltage=1.000000 841 842