config.ini revision 8210
12847Sksewell@umich.edu[root] 27783SGiacomo.Gabrielli@arm.comtype=Root 39913Ssteve.reinhardt@amd.comchildren=system 47783SGiacomo.Gabrielli@arm.comtime_sync_enable=false 57783SGiacomo.Gabrielli@arm.comtime_sync_period=100000000000 67783SGiacomo.Gabrielli@arm.comtime_sync_spin_threshold=100000000 77783SGiacomo.Gabrielli@arm.com 87783SGiacomo.Gabrielli@arm.com[system] 97783SGiacomo.Gabrielli@arm.comtype=System 107783SGiacomo.Gabrielli@arm.comchildren=cpu membus physmem 117783SGiacomo.Gabrielli@arm.commem_mode=atomic 127783SGiacomo.Gabrielli@arm.comphysmem=system.physmem 137783SGiacomo.Gabrielli@arm.comwork_begin_ckpt_count=0 147783SGiacomo.Gabrielli@arm.comwork_begin_cpu_id_exit=-1 155596Sgblack@eecs.umich.eduwork_begin_exit_count=0 162847Sksewell@umich.eduwork_cpus_ckpt_count=0 172847Sksewell@umich.eduwork_end_ckpt_count=0 182847Sksewell@umich.eduwork_end_exit_count=0 192847Sksewell@umich.eduwork_item_id=-1 202847Sksewell@umich.edu 212847Sksewell@umich.edu[system.cpu] 222847Sksewell@umich.edutype=DerivO3CPU 232847Sksewell@umich.educhildren=dcache dtb fuPool icache itb l2cache toL2Bus tracer workload 242847Sksewell@umich.eduBTBEntries=4096 252847Sksewell@umich.eduBTBTagSize=16 262847Sksewell@umich.eduLFSTSize=1024 272847Sksewell@umich.eduLQEntries=32 282847Sksewell@umich.eduLSQCheckLoads=true 292847Sksewell@umich.eduLSQDepCheckShift=4 302847Sksewell@umich.eduRASSize=16 312847Sksewell@umich.eduSQEntries=32 322847Sksewell@umich.eduSSITSize=1024 332847Sksewell@umich.eduactivity=0 342847Sksewell@umich.edubackComSize=5 352847Sksewell@umich.educachePorts=200 362847Sksewell@umich.educhecker=Null 372847Sksewell@umich.educhoiceCtrBits=2 382847Sksewell@umich.educhoicePredictorSize=8192 392847Sksewell@umich.educlock=500 402847Sksewell@umich.educommitToDecodeDelay=1 415596Sgblack@eecs.umich.educommitToFetchDelay=1 422847Sksewell@umich.educommitToIEWDelay=1 432847Sksewell@umich.educommitToRenameDelay=1 442847Sksewell@umich.educommitWidth=8 452847Sksewell@umich.educpu_id=0 462847Sksewell@umich.edudecodeToFetchDelay=1 4710835Sandreas.hansson@arm.comdecodeToRenameDelay=1 4810835Sandreas.hansson@arm.comdecodeWidth=8 495596Sgblack@eecs.umich.edudefer_registration=false 506658Snate@binkert.orgdispatchWidth=8 518229Snate@binkert.orgdo_checkpoint_insts=true 528229Snate@binkert.orgdo_statistics_insts=true 535596Sgblack@eecs.umich.edudtb=system.cpu.dtb 545596Sgblack@eecs.umich.edufetchToDecodeDelay=1 559913Ssteve.reinhardt@amd.comfetchTrapLatency=1 562847Sksewell@umich.edufetchWidth=8 575596Sgblack@eecs.umich.eduforwardComSize=5 585596Sgblack@eecs.umich.edufuPool=system.cpu.fuPool 595596Sgblack@eecs.umich.edufunction_trace=false 605596Sgblack@eecs.umich.edufunction_trace_start=0 615596Sgblack@eecs.umich.eduglobalCtrBits=2 625596Sgblack@eecs.umich.eduglobalHistoryBits=13 635596Sgblack@eecs.umich.eduglobalPredictorSize=8192 645596Sgblack@eecs.umich.eduiewToCommitDelay=1 655596Sgblack@eecs.umich.eduiewToDecodeDelay=1 665596Sgblack@eecs.umich.eduiewToFetchDelay=1 675596Sgblack@eecs.umich.eduiewToRenameDelay=1 685596Sgblack@eecs.umich.eduinstShiftAmt=2 695596Sgblack@eecs.umich.eduissueToExecuteDelay=1 705596Sgblack@eecs.umich.eduissueWidth=8 715596Sgblack@eecs.umich.eduitb=system.cpu.itb 725596Sgblack@eecs.umich.edulocalCtrBits=2 735596Sgblack@eecs.umich.edulocalHistoryBits=11 745596Sgblack@eecs.umich.edulocalHistoryTableSize=2048 755596Sgblack@eecs.umich.edulocalPredictorSize=2048 769920Syasuko.eckert@amd.commax_insts_all_threads=0 7710319SAndreas.Sandberg@ARM.commax_insts_any_thread=0 785596Sgblack@eecs.umich.edumax_loads_all_threads=0 795596Sgblack@eecs.umich.edumax_loads_any_thread=0 805596Sgblack@eecs.umich.edunumIQEntries=64 815596Sgblack@eecs.umich.edunumPhysFloatRegs=256 825596Sgblack@eecs.umich.edunumPhysIntRegs=256 838902Sandreas.hansson@arm.comnumROBEntries=192 845596Sgblack@eecs.umich.edunumRobs=1 855596Sgblack@eecs.umich.edunumThreads=1 865596Sgblack@eecs.umich.eduphase=0 875596Sgblack@eecs.umich.edupredType=tournament 8810417Sandreas.hansson@arm.comprogress_interval=0 897720Sgblack@eecs.umich.edurenameToDecodeDelay=1 907720Sgblack@eecs.umich.edurenameToFetchDelay=1 915596Sgblack@eecs.umich.edurenameToIEWDelay=2 925596Sgblack@eecs.umich.edurenameToROBDelay=1 9310417Sandreas.hansson@arm.comrenameWidth=8 9410417Sandreas.hansson@arm.comsmtCommitPolicy=RoundRobin 955596Sgblack@eecs.umich.edusmtFetchPolicy=SingleThread 969252Sdjordje.kovacevic@arm.comsmtIQPolicy=Partitioned 979252Sdjordje.kovacevic@arm.comsmtIQThreshold=100 985596Sgblack@eecs.umich.edusmtLSQPolicy=Partitioned 995596Sgblack@eecs.umich.edusmtLSQThreshold=100 1005596Sgblack@eecs.umich.edusmtNumFetchingThreads=1 1015596Sgblack@eecs.umich.edusmtROBPolicy=Partitioned 1025596Sgblack@eecs.umich.edusmtROBThreshold=100 1035596Sgblack@eecs.umich.edusquashWidth=8 1045596Sgblack@eecs.umich.edusystem=system 1055596Sgblack@eecs.umich.edutracer=system.cpu.tracer 1065596Sgblack@eecs.umich.edutrapLatency=13 1075596Sgblack@eecs.umich.eduwbDepth=1 1085596Sgblack@eecs.umich.eduwbWidth=8 1095596Sgblack@eecs.umich.eduworkload=system.cpu.workload 1105596Sgblack@eecs.umich.edudcache_port=system.cpu.dcache.cpu_side 1117783SGiacomo.Gabrielli@arm.comicache_port=system.cpu.icache.cpu_side 1129046SAli.Saidi@ARM.com 11310835Sandreas.hansson@arm.com[system.cpu.dcache] 1149046SAli.Saidi@ARM.comtype=BaseCache 1157783SGiacomo.Gabrielli@arm.comaddr_range=0:18446744073709551615 1167783SGiacomo.Gabrielli@arm.comassoc=2 1177783SGiacomo.Gabrielli@arm.comblock_size=64 1187783SGiacomo.Gabrielli@arm.comforward_snoops=true 11910835Sandreas.hansson@arm.comhash_delay=1 1209046SAli.Saidi@ARM.comis_top_level=true 1217783SGiacomo.Gabrielli@arm.comlatency=1000 1229046SAli.Saidi@ARM.commax_miss_count=0 1239046SAli.Saidi@ARM.commshrs=10 1247783SGiacomo.Gabrielli@arm.comnum_cpus=1 1255596Sgblack@eecs.umich.eduprefetch_data_accesses_only=false 1268471SGiacomo.Gabrielli@arm.comprefetch_degree=1 1278471SGiacomo.Gabrielli@arm.comprefetch_latency=10000 1289252Sdjordje.kovacevic@arm.comprefetch_on_access=false 1299252Sdjordje.kovacevic@arm.comprefetch_past_page=false 1309252Sdjordje.kovacevic@arm.comprefetch_policy=none 1319252Sdjordje.kovacevic@arm.comprefetch_serial_squash=false 1329252Sdjordje.kovacevic@arm.comprefetch_use_cpu_id=true 1339252Sdjordje.kovacevic@arm.comprefetcher_size=100 1349252Sdjordje.kovacevic@arm.comprioritizeRequests=false 1359527SMatt.Horsnell@arm.comrepl=Null 1368471SGiacomo.Gabrielli@arm.comsize=262144 1378471SGiacomo.Gabrielli@arm.comsubblock_size=0 1385596Sgblack@eecs.umich.edutgts_per_mshr=20 1395596Sgblack@eecs.umich.edutrace_addr=0 1405596Sgblack@eecs.umich.edutwo_queue=false 1415596Sgblack@eecs.umich.eduwrite_buffers=8 1425596Sgblack@eecs.umich.educpu_side=system.cpu.dcache_port 1435596Sgblack@eecs.umich.edumem_side=system.cpu.toL2Bus.port[1] 1445596Sgblack@eecs.umich.edu 1455596Sgblack@eecs.umich.edu[system.cpu.dtb] 1465596Sgblack@eecs.umich.edutype=ArmTLB 1475596Sgblack@eecs.umich.edusize=64 1485596Sgblack@eecs.umich.edu 1495596Sgblack@eecs.umich.edu[system.cpu.fuPool] 1505596Sgblack@eecs.umich.edutype=FUPool 1517783SGiacomo.Gabrielli@arm.comchildren=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 1529532Sgeoffrey.blake@arm.comFUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8 1539532Sgeoffrey.blake@arm.com 1549532Sgeoffrey.blake@arm.com[system.cpu.fuPool.FUList0] 1559532Sgeoffrey.blake@arm.comtype=FUDesc 1567783SGiacomo.Gabrielli@arm.comchildren=opList 1579532Sgeoffrey.blake@arm.comcount=6 1589532Sgeoffrey.blake@arm.comopList=system.cpu.fuPool.FUList0.opList 1599532Sgeoffrey.blake@arm.com 1609532Sgeoffrey.blake@arm.com[system.cpu.fuPool.FUList0.opList] 1619532Sgeoffrey.blake@arm.comtype=OpDesc 1629532Sgeoffrey.blake@arm.comissueLat=1 1639532Sgeoffrey.blake@arm.comopClass=IntAlu 1649046SAli.Saidi@ARM.comopLat=1 1657783SGiacomo.Gabrielli@arm.com 1667783SGiacomo.Gabrielli@arm.com[system.cpu.fuPool.FUList1] 1677783SGiacomo.Gabrielli@arm.comtype=FUDesc 1685596Sgblack@eecs.umich.educhildren=opList0 opList1 1695596Sgblack@eecs.umich.educount=2 1705596Sgblack@eecs.umich.eduopList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 1715596Sgblack@eecs.umich.edu 1725596Sgblack@eecs.umich.edu[system.cpu.fuPool.FUList1.opList0] 1735596Sgblack@eecs.umich.edutype=OpDesc 1745596Sgblack@eecs.umich.eduissueLat=1 1755596Sgblack@eecs.umich.eduopClass=IntMult 1769918Ssteve.reinhardt@amd.comopLat=3 1775596Sgblack@eecs.umich.edu 1785596Sgblack@eecs.umich.edu[system.cpu.fuPool.FUList1.opList1] 1795596Sgblack@eecs.umich.edutype=OpDesc 1805596Sgblack@eecs.umich.eduissueLat=19 1815596Sgblack@eecs.umich.eduopClass=IntDiv 1825596Sgblack@eecs.umich.eduopLat=20 1835596Sgblack@eecs.umich.edu 1845596Sgblack@eecs.umich.edu[system.cpu.fuPool.FUList2] 1855596Sgblack@eecs.umich.edutype=FUDesc 1869918Ssteve.reinhardt@amd.comchildren=opList0 opList1 opList2 1877783SGiacomo.Gabrielli@arm.comcount=4 1887783SGiacomo.Gabrielli@arm.comopList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2 1897783SGiacomo.Gabrielli@arm.com 1907783SGiacomo.Gabrielli@arm.com[system.cpu.fuPool.FUList2.opList0] 1917783SGiacomo.Gabrielli@arm.comtype=OpDesc 1927783SGiacomo.Gabrielli@arm.comissueLat=1 1937783SGiacomo.Gabrielli@arm.comopClass=FloatAdd 1947783SGiacomo.Gabrielli@arm.comopLat=2 1957783SGiacomo.Gabrielli@arm.com 1967783SGiacomo.Gabrielli@arm.com[system.cpu.fuPool.FUList2.opList1] 1979382SAli.Saidi@ARM.comtype=OpDesc 1989382SAli.Saidi@ARM.comissueLat=1 1997783SGiacomo.Gabrielli@arm.comopClass=FloatCmp 2007783SGiacomo.Gabrielli@arm.comopLat=2 2017783SGiacomo.Gabrielli@arm.com 2027783SGiacomo.Gabrielli@arm.com[system.cpu.fuPool.FUList2.opList2] 2037783SGiacomo.Gabrielli@arm.comtype=OpDesc 2049382SAli.Saidi@ARM.comissueLat=1 2055596Sgblack@eecs.umich.eduopClass=FloatCvt 2065596Sgblack@eecs.umich.eduopLat=2 2077848SAli.Saidi@ARM.com 2087848SAli.Saidi@ARM.com[system.cpu.fuPool.FUList3] 20910935Snilay@cs.wisc.edutype=FUDesc 2107848SAli.Saidi@ARM.comchildren=opList0 opList1 opList2 2117848SAli.Saidi@ARM.comcount=2 2129913Ssteve.reinhardt@amd.comopList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 2139913Ssteve.reinhardt@amd.com 2149913Ssteve.reinhardt@amd.com[system.cpu.fuPool.FUList3.opList0] 2159913Ssteve.reinhardt@amd.comtype=OpDesc 2169913Ssteve.reinhardt@amd.comissueLat=1 2179913Ssteve.reinhardt@amd.comopClass=FloatMult 2189913Ssteve.reinhardt@amd.comopLat=4 2199913Ssteve.reinhardt@amd.com 2209913Ssteve.reinhardt@amd.com[system.cpu.fuPool.FUList3.opList1] 2219913Ssteve.reinhardt@amd.comtype=OpDesc 2229913Ssteve.reinhardt@amd.comissueLat=12 2239920Syasuko.eckert@amd.comopClass=FloatDiv 2249920Syasuko.eckert@amd.comopLat=12 2259920Syasuko.eckert@amd.com 2269920Syasuko.eckert@amd.com[system.cpu.fuPool.FUList3.opList2] 2279913Ssteve.reinhardt@amd.comtype=OpDesc 2289913Ssteve.reinhardt@amd.comissueLat=24 2299913Ssteve.reinhardt@amd.comopClass=FloatSqrt 2309913Ssteve.reinhardt@amd.comopLat=24 2317848SAli.Saidi@ARM.com 2327848SAli.Saidi@ARM.com[system.cpu.fuPool.FUList4] 2335702Ssaidi@eecs.umich.edutype=FUDesc 2345702Ssaidi@eecs.umich.educhildren=opList 2355596Sgblack@eecs.umich.educount=0 23610379Sandreas.hansson@arm.comopList=system.cpu.fuPool.FUList4.opList 2375702Ssaidi@eecs.umich.edu 2388557Sgblack@eecs.umich.edu[system.cpu.fuPool.FUList4.opList] 2398557Sgblack@eecs.umich.edutype=OpDesc 24011877Sbrandon.potter@amd.comissueLat=1 2412847Sksewell@umich.eduopClass=MemRead 2425596Sgblack@eecs.umich.eduopLat=1 2435596Sgblack@eecs.umich.edu 2445596Sgblack@eecs.umich.edu[system.cpu.fuPool.FUList5] 2455596Sgblack@eecs.umich.edutype=FUDesc 2465596Sgblack@eecs.umich.educhildren=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 2475596Sgblack@eecs.umich.educount=4 2485596Sgblack@eecs.umich.eduopList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19 2495596Sgblack@eecs.umich.edu 2505596Sgblack@eecs.umich.edu[system.cpu.fuPool.FUList5.opList00] 2515596Sgblack@eecs.umich.edutype=OpDesc 2525596Sgblack@eecs.umich.eduissueLat=1 2535596Sgblack@eecs.umich.eduopClass=SimdAdd 2545596Sgblack@eecs.umich.eduopLat=1 25510319SAndreas.Sandberg@ARM.com 2565596Sgblack@eecs.umich.edu[system.cpu.fuPool.FUList5.opList01] 2575596Sgblack@eecs.umich.edutype=OpDesc 2585596Sgblack@eecs.umich.eduissueLat=1 2595596Sgblack@eecs.umich.eduopClass=SimdAddAcc 2605596Sgblack@eecs.umich.eduopLat=1 2615596Sgblack@eecs.umich.edu 2625596Sgblack@eecs.umich.edu[system.cpu.fuPool.FUList5.opList02] 2635596Sgblack@eecs.umich.edutype=OpDesc 2645596Sgblack@eecs.umich.eduissueLat=1 2655596Sgblack@eecs.umich.eduopClass=SimdAlu 2665596Sgblack@eecs.umich.eduopLat=1 2675596Sgblack@eecs.umich.edu 2685596Sgblack@eecs.umich.edu[system.cpu.fuPool.FUList5.opList03] 2695596Sgblack@eecs.umich.edutype=OpDesc 27010319SAndreas.Sandberg@ARM.comissueLat=1 2719920Syasuko.eckert@amd.comopClass=SimdCmp 2729920Syasuko.eckert@amd.comopLat=1 2739920Syasuko.eckert@amd.com 2749920Syasuko.eckert@amd.com[system.cpu.fuPool.FUList5.opList04] 2755596Sgblack@eecs.umich.edutype=OpDesc 2765596Sgblack@eecs.umich.eduissueLat=1 2775596Sgblack@eecs.umich.eduopClass=SimdCvt 27810319SAndreas.Sandberg@ARM.comopLat=1 2795596Sgblack@eecs.umich.edu 2805596Sgblack@eecs.umich.edu[system.cpu.fuPool.FUList5.opList05] 2815596Sgblack@eecs.umich.edutype=OpDesc 2825596Sgblack@eecs.umich.eduissueLat=1 2835596Sgblack@eecs.umich.eduopClass=SimdMisc 2845596Sgblack@eecs.umich.eduopLat=1 2855596Sgblack@eecs.umich.edu 2865596Sgblack@eecs.umich.edu[system.cpu.fuPool.FUList5.opList06] 2875596Sgblack@eecs.umich.edutype=OpDesc 2885596Sgblack@eecs.umich.eduissueLat=1 2895596Sgblack@eecs.umich.eduopClass=SimdMult 2905596Sgblack@eecs.umich.eduopLat=1 2915596Sgblack@eecs.umich.edu 2925596Sgblack@eecs.umich.edu[system.cpu.fuPool.FUList5.opList07] 2935596Sgblack@eecs.umich.edutype=OpDesc 2945596Sgblack@eecs.umich.eduissueLat=1 2955596Sgblack@eecs.umich.eduopClass=SimdMultAcc 2965596Sgblack@eecs.umich.eduopLat=1 29710319SAndreas.Sandberg@ARM.com 2989920Syasuko.eckert@amd.com[system.cpu.fuPool.FUList5.opList08] 2999920Syasuko.eckert@amd.comtype=OpDesc 3009920Syasuko.eckert@amd.comissueLat=1 3019920Syasuko.eckert@amd.comopClass=SimdShift 3029920Syasuko.eckert@amd.comopLat=1 3035596Sgblack@eecs.umich.edu 30410319SAndreas.Sandberg@ARM.com[system.cpu.fuPool.FUList5.opList09] 3055596Sgblack@eecs.umich.edutype=OpDesc 3065596Sgblack@eecs.umich.eduissueLat=1 3075596Sgblack@eecs.umich.eduopClass=SimdShiftAcc 3085596Sgblack@eecs.umich.eduopLat=1 3095596Sgblack@eecs.umich.edu 31010319SAndreas.Sandberg@ARM.com[system.cpu.fuPool.FUList5.opList10] 3115596Sgblack@eecs.umich.edutype=OpDesc 3125596Sgblack@eecs.umich.eduissueLat=1 3135596Sgblack@eecs.umich.eduopClass=SimdSqrt 3145596Sgblack@eecs.umich.eduopLat=1 3155596Sgblack@eecs.umich.edu 3165596Sgblack@eecs.umich.edu[system.cpu.fuPool.FUList5.opList11] 3175596Sgblack@eecs.umich.edutype=OpDesc 3185596Sgblack@eecs.umich.eduissueLat=1 3195596Sgblack@eecs.umich.eduopClass=SimdFloatAdd 3205596Sgblack@eecs.umich.eduopLat=1 3215596Sgblack@eecs.umich.edu 3225596Sgblack@eecs.umich.edu[system.cpu.fuPool.FUList5.opList12] 3235596Sgblack@eecs.umich.edutype=OpDesc 3245596Sgblack@eecs.umich.eduissueLat=1 3255596Sgblack@eecs.umich.eduopClass=SimdFloatAlu 3265596Sgblack@eecs.umich.eduopLat=1 3275596Sgblack@eecs.umich.edu 3285596Sgblack@eecs.umich.edu[system.cpu.fuPool.FUList5.opList13] 3295596Sgblack@eecs.umich.edutype=OpDesc 3305596Sgblack@eecs.umich.eduissueLat=1 3315596Sgblack@eecs.umich.eduopClass=SimdFloatCmp 3325596Sgblack@eecs.umich.eduopLat=1 3335596Sgblack@eecs.umich.edu 3345596Sgblack@eecs.umich.edu[system.cpu.fuPool.FUList5.opList14] 3355596Sgblack@eecs.umich.edutype=OpDesc 3365596Sgblack@eecs.umich.eduissueLat=1 3375596Sgblack@eecs.umich.eduopClass=SimdFloatCvt 338opLat=1 339 340[system.cpu.fuPool.FUList5.opList15] 341type=OpDesc 342issueLat=1 343opClass=SimdFloatDiv 344opLat=1 345 346[system.cpu.fuPool.FUList5.opList16] 347type=OpDesc 348issueLat=1 349opClass=SimdFloatMisc 350opLat=1 351 352[system.cpu.fuPool.FUList5.opList17] 353type=OpDesc 354issueLat=1 355opClass=SimdFloatMult 356opLat=1 357 358[system.cpu.fuPool.FUList5.opList18] 359type=OpDesc 360issueLat=1 361opClass=SimdFloatMultAcc 362opLat=1 363 364[system.cpu.fuPool.FUList5.opList19] 365type=OpDesc 366issueLat=1 367opClass=SimdFloatSqrt 368opLat=1 369 370[system.cpu.fuPool.FUList6] 371type=FUDesc 372children=opList 373count=0 374opList=system.cpu.fuPool.FUList6.opList 375 376[system.cpu.fuPool.FUList6.opList] 377type=OpDesc 378issueLat=1 379opClass=MemWrite 380opLat=1 381 382[system.cpu.fuPool.FUList7] 383type=FUDesc 384children=opList0 opList1 385count=4 386opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1 387 388[system.cpu.fuPool.FUList7.opList0] 389type=OpDesc 390issueLat=1 391opClass=MemRead 392opLat=1 393 394[system.cpu.fuPool.FUList7.opList1] 395type=OpDesc 396issueLat=1 397opClass=MemWrite 398opLat=1 399 400[system.cpu.fuPool.FUList8] 401type=FUDesc 402children=opList 403count=1 404opList=system.cpu.fuPool.FUList8.opList 405 406[system.cpu.fuPool.FUList8.opList] 407type=OpDesc 408issueLat=3 409opClass=IprAccess 410opLat=3 411 412[system.cpu.icache] 413type=BaseCache 414addr_range=0:18446744073709551615 415assoc=2 416block_size=64 417forward_snoops=true 418hash_delay=1 419is_top_level=true 420latency=1000 421max_miss_count=0 422mshrs=10 423num_cpus=1 424prefetch_data_accesses_only=false 425prefetch_degree=1 426prefetch_latency=10000 427prefetch_on_access=false 428prefetch_past_page=false 429prefetch_policy=none 430prefetch_serial_squash=false 431prefetch_use_cpu_id=true 432prefetcher_size=100 433prioritizeRequests=false 434repl=Null 435size=131072 436subblock_size=0 437tgts_per_mshr=20 438trace_addr=0 439two_queue=false 440write_buffers=8 441cpu_side=system.cpu.icache_port 442mem_side=system.cpu.toL2Bus.port[0] 443 444[system.cpu.itb] 445type=ArmTLB 446size=64 447 448[system.cpu.l2cache] 449type=BaseCache 450addr_range=0:18446744073709551615 451assoc=2 452block_size=64 453forward_snoops=true 454hash_delay=1 455is_top_level=false 456latency=1000 457max_miss_count=0 458mshrs=10 459num_cpus=1 460prefetch_data_accesses_only=false 461prefetch_degree=1 462prefetch_latency=10000 463prefetch_on_access=false 464prefetch_past_page=false 465prefetch_policy=none 466prefetch_serial_squash=false 467prefetch_use_cpu_id=true 468prefetcher_size=100 469prioritizeRequests=false 470repl=Null 471size=2097152 472subblock_size=0 473tgts_per_mshr=5 474trace_addr=0 475two_queue=false 476write_buffers=8 477cpu_side=system.cpu.toL2Bus.port[2] 478mem_side=system.membus.port[1] 479 480[system.cpu.toL2Bus] 481type=Bus 482block_size=64 483bus_id=0 484clock=1000 485header_cycles=1 486use_default_range=false 487width=64 488port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side 489 490[system.cpu.tracer] 491type=ExeTracer 492 493[system.cpu.workload] 494type=LiveProcess 495cmd=eon chair.control.cook chair.camera chair.surfaces chair.cook.ppm ppm pixels_out.cook 496cwd=build/ARM_SE/tests/opt/long/30.eon/arm/linux/o3-timing 497egid=100 498env= 499errout=cerr 500euid=100 501executable=/chips/pd/randd/dist/cpu2000/binaries/arm/linux/eon 502gid=100 503input=cin 504max_stack_size=67108864 505output=cout 506pid=100 507ppid=99 508simpoint=0 509system=system 510uid=100 511 512[system.membus] 513type=Bus 514block_size=64 515bus_id=0 516clock=1000 517header_cycles=1 518use_default_range=false 519width=64 520port=system.physmem.port[0] system.cpu.l2cache.mem_side 521 522[system.physmem] 523type=PhysicalMemory 524file= 525latency=30000 526latency_var=0 527null=false 528range=0:134217727 529zero=false 530port=system.membus.port[0] 531 532