config.ini revision 8721
16242Sgblack@eecs.umich.edu[root] 27093Sgblack@eecs.umich.edutype=Root 37093Sgblack@eecs.umich.educhildren=system 47093Sgblack@eecs.umich.edutime_sync_enable=false 57093Sgblack@eecs.umich.edutime_sync_period=100000000000 67093Sgblack@eecs.umich.edutime_sync_spin_threshold=100000000 77093Sgblack@eecs.umich.edu 87093Sgblack@eecs.umich.edu[system] 97093Sgblack@eecs.umich.edutype=System 107093Sgblack@eecs.umich.educhildren=cpu membus physmem 117093Sgblack@eecs.umich.edumem_mode=atomic 127093Sgblack@eecs.umich.edumemories=system.physmem 137093Sgblack@eecs.umich.edunum_work_ids=16 146242Sgblack@eecs.umich.eduphysmem=system.physmem 156242Sgblack@eecs.umich.eduwork_begin_ckpt_count=0 166242Sgblack@eecs.umich.eduwork_begin_cpu_id_exit=-1 176242Sgblack@eecs.umich.eduwork_begin_exit_count=0 186242Sgblack@eecs.umich.eduwork_cpus_ckpt_count=0 196242Sgblack@eecs.umich.eduwork_end_ckpt_count=0 206242Sgblack@eecs.umich.eduwork_end_exit_count=0 216242Sgblack@eecs.umich.eduwork_item_id=-1 226242Sgblack@eecs.umich.edusystem_port=system.membus.port[0] 236242Sgblack@eecs.umich.edu 246242Sgblack@eecs.umich.edu[system.cpu] 256242Sgblack@eecs.umich.edutype=DerivO3CPU 266242Sgblack@eecs.umich.educhildren=dcache dtb fuPool icache itb l2cache toL2Bus tracer workload 276242Sgblack@eecs.umich.eduBTBEntries=4096 286242Sgblack@eecs.umich.eduBTBTagSize=16 296242Sgblack@eecs.umich.eduLFSTSize=1024 306242Sgblack@eecs.umich.eduLQEntries=32 316242Sgblack@eecs.umich.eduLSQCheckLoads=true 326242Sgblack@eecs.umich.eduLSQDepCheckShift=4 336242Sgblack@eecs.umich.eduRASSize=16 346242Sgblack@eecs.umich.eduSQEntries=32 356242Sgblack@eecs.umich.eduSSITSize=1024 366242Sgblack@eecs.umich.eduactivity=0 376242Sgblack@eecs.umich.edubackComSize=5 386242Sgblack@eecs.umich.educachePorts=200 396242Sgblack@eecs.umich.educhecker=Null 406242Sgblack@eecs.umich.educhoiceCtrBits=2 416242Sgblack@eecs.umich.educhoicePredictorSize=8192 426242Sgblack@eecs.umich.educlock=500 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424latency=1000 425max_miss_count=0 426mshrs=10 427num_cpus=1 428prefetch_data_accesses_only=false 429prefetch_degree=1 430prefetch_latency=10000 431prefetch_on_access=false 432prefetch_past_page=false 433prefetch_policy=none 434prefetch_serial_squash=false 435prefetch_use_cpu_id=true 436prefetcher_size=100 437prioritizeRequests=false 438repl=Null 439size=131072 440subblock_size=0 441tgts_per_mshr=20 442trace_addr=0 443two_queue=false 444write_buffers=8 445cpu_side=system.cpu.icache_port 446mem_side=system.cpu.toL2Bus.port[0] 447 448[system.cpu.itb] 449type=ArmTLB 450size=64 451 452[system.cpu.l2cache] 453type=BaseCache 454addr_range=0:18446744073709551615 455assoc=2 456block_size=64 457forward_snoops=true 458hash_delay=1 459is_top_level=false 460latency=1000 461max_miss_count=0 462mshrs=10 463num_cpus=1 464prefetch_data_accesses_only=false 465prefetch_degree=1 466prefetch_latency=10000 467prefetch_on_access=false 468prefetch_past_page=false 469prefetch_policy=none 470prefetch_serial_squash=false 471prefetch_use_cpu_id=true 472prefetcher_size=100 473prioritizeRequests=false 474repl=Null 475size=2097152 476subblock_size=0 477tgts_per_mshr=5 478trace_addr=0 479two_queue=false 480write_buffers=8 481cpu_side=system.cpu.toL2Bus.port[2] 482mem_side=system.membus.port[2] 483 484[system.cpu.toL2Bus] 485type=Bus 486block_size=64 487bus_id=0 488clock=1000 489header_cycles=1 490use_default_range=false 491width=64 492port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side 493 494[system.cpu.tracer] 495type=ExeTracer 496 497[system.cpu.workload] 498type=LiveProcess 499cmd=eon chair.control.cook chair.camera chair.surfaces chair.cook.ppm ppm pixels_out.cook 500cwd=build/ARM_SE/tests/opt/long/30.eon/arm/linux/o3-timing 501egid=100 502env= 503errout=cerr 504euid=100 505executable=/dist/m5/cpu2000/binaries/arm/linux/eon 506gid=100 507input=cin 508max_stack_size=67108864 509output=cout 510pid=100 511ppid=99 512simpoint=0 513system=system 514uid=100 515 516[system.membus] 517type=Bus 518block_size=64 519bus_id=0 520clock=1000 521header_cycles=1 522use_default_range=false 523width=64 524port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side 525 526[system.physmem] 527type=PhysicalMemory 528file= 529latency=30000 530latency_var=0 531null=false 532range=0:134217727 533zero=false 534port=system.membus.port[1] 535 536