config.ini revision 8802:ef66a9083bc4
1[root] 2type=Root 3children=system 4time_sync_enable=false 5time_sync_period=100000000000 6time_sync_spin_threshold=100000000 7 8[system] 9type=System 10children=cpu membus physmem 11mem_mode=atomic 12memories=system.physmem 13num_work_ids=16 14physmem=system.physmem 15work_begin_ckpt_count=0 16work_begin_cpu_id_exit=-1 17work_begin_exit_count=0 18work_cpus_ckpt_count=0 19work_end_ckpt_count=0 20work_end_exit_count=0 21work_item_id=-1 22system_port=system.membus.port[0] 23 24[system.cpu] 25type=TimingSimpleCPU 26children=dcache dtb icache itb l2cache toL2Bus tracer workload 27checker=Null 28clock=500 29cpu_id=0 30defer_registration=false 31do_checkpoint_insts=true 32do_statistics_insts=true 33dtb=system.cpu.dtb 34function_trace=false 35function_trace_start=0 36itb=system.cpu.itb 37max_insts_all_threads=0 38max_insts_any_thread=0 39max_loads_all_threads=0 40max_loads_any_thread=0 41numThreads=1 42phase=0 43progress_interval=0 44system=system 45tracer=system.cpu.tracer 46workload=system.cpu.workload 47dcache_port=system.cpu.dcache.cpu_side 48icache_port=system.cpu.icache.cpu_side 49 50[system.cpu.dcache] 51type=BaseCache 52addr_range=0:18446744073709551615 53assoc=2 54block_size=64 55forward_snoops=true 56hash_delay=1 57is_top_level=true 58latency=1000 59max_miss_count=0 60mshrs=10 61num_cpus=1 62prefetch_data_accesses_only=false 63prefetch_degree=1 64prefetch_latency=10000 65prefetch_on_access=false 66prefetch_past_page=false 67prefetch_policy=none 68prefetch_serial_squash=false 69prefetch_use_cpu_id=true 70prefetcher_size=100 71prioritizeRequests=false 72repl=Null 73size=262144 74subblock_size=0 75tgts_per_mshr=5 76trace_addr=0 77two_queue=false 78write_buffers=8 79cpu_side=system.cpu.dcache_port 80mem_side=system.cpu.toL2Bus.port[1] 81 82[system.cpu.dtb] 83type=SparcTLB 84size=64 85 86[system.cpu.icache] 87type=BaseCache 88addr_range=0:18446744073709551615 89assoc=2 90block_size=64 91forward_snoops=true 92hash_delay=1 93is_top_level=true 94latency=1000 95max_miss_count=0 96mshrs=10 97num_cpus=1 98prefetch_data_accesses_only=false 99prefetch_degree=1 100prefetch_latency=10000 101prefetch_on_access=false 102prefetch_past_page=false 103prefetch_policy=none 104prefetch_serial_squash=false 105prefetch_use_cpu_id=true 106prefetcher_size=100 107prioritizeRequests=false 108repl=Null 109size=131072 110subblock_size=0 111tgts_per_mshr=5 112trace_addr=0 113two_queue=false 114write_buffers=8 115cpu_side=system.cpu.icache_port 116mem_side=system.cpu.toL2Bus.port[0] 117 118[system.cpu.itb] 119type=SparcTLB 120size=64 121 122[system.cpu.l2cache] 123type=BaseCache 124addr_range=0:18446744073709551615 125assoc=2 126block_size=64 127forward_snoops=true 128hash_delay=1 129is_top_level=false 130latency=10000 131max_miss_count=0 132mshrs=10 133num_cpus=1 134prefetch_data_accesses_only=false 135prefetch_degree=1 136prefetch_latency=100000 137prefetch_on_access=false 138prefetch_past_page=false 139prefetch_policy=none 140prefetch_serial_squash=false 141prefetch_use_cpu_id=true 142prefetcher_size=100 143prioritizeRequests=false 144repl=Null 145size=2097152 146subblock_size=0 147tgts_per_mshr=5 148trace_addr=0 149two_queue=false 150write_buffers=8 151cpu_side=system.cpu.toL2Bus.port[2] 152mem_side=system.membus.port[2] 153 154[system.cpu.toL2Bus] 155type=Bus 156block_size=64 157bus_id=0 158clock=1000 159header_cycles=1 160use_default_range=false 161width=64 162port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side 163 164[system.cpu.tracer] 165type=ExeTracer 166 167[system.cpu.workload] 168type=LiveProcess 169cmd=mcf mcf.in 170cwd=build/SPARC_SE/tests/opt/long/10.mcf/sparc/linux/simple-timing 171egid=100 172env= 173errout=cerr 174euid=100 175executable=/dist/m5/cpu2000/binaries/sparc/linux/mcf 176gid=100 177input=/dist/m5/cpu2000/data/mcf/smred/input/mcf.in 178max_stack_size=67108864 179output=cout 180pid=100 181ppid=99 182simpoint=55300000000 183system=system 184uid=100 185 186[system.membus] 187type=Bus 188block_size=64 189bus_id=0 190clock=1000 191header_cycles=1 192use_default_range=false 193width=64 194port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side 195 196[system.physmem] 197type=PhysicalMemory 198file= 199latency=30000 200latency_var=0 201null=false 202range=0:268435455 203zero=false 204port=system.membus.port[1] 205 206