stats.txt revision 10148
18968SN/A 28968SN/A---------- Begin Simulation Statistics ---------- 310091Snilay@cs.wisc.edusim_seconds 5.304497 # Number of seconds simulated 410091Snilay@cs.wisc.edusim_ticks 5304496750000 # Number of ticks simulated 510091Snilay@cs.wisc.edufinal_tick 5304496750000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 68968SN/Asim_freq 1000000000000 # Frequency of simulated ticks 710148Sandreas.hansson@arm.comhost_inst_rate 156851 # Simulator instruction rate (inst/s) 810148Sandreas.hansson@arm.comhost_op_rate 300747 # Simulator op (including micro ops) rate (op/s) 910148Sandreas.hansson@arm.comhost_tick_rate 7785889362 # Simulator tick rate (ticks/s) 1010148Sandreas.hansson@arm.comhost_mem_usage 816820 # Number of bytes of host memory used 1110148Sandreas.hansson@arm.comhost_seconds 681.30 # Real time elapsed on the host 1210091Snilay@cs.wisc.edusim_insts 106862058 # Number of instructions simulated 1310091Snilay@cs.wisc.edusim_ops 204897478 # Number of ops (including micro ops) simulated 1410036SAli.Saidi@ARM.comsystem.voltage_domain.voltage 1 # Voltage in Volts 1510036SAli.Saidi@ARM.comsystem.clk_domain.clock 1000 # Clock period in ticks 1610091Snilay@cs.wisc.edusystem.physmem.bytes_read::pc.south_bridge.ide 35160 # Number of bytes read from this memory 1710091Snilay@cs.wisc.edusystem.physmem.bytes_read::cpu0.dtb.walker 168624 # Number of bytes read from this memory 1810091Snilay@cs.wisc.edusystem.physmem.bytes_read::cpu0.itb.walker 87432 # Number of bytes read from this memory 1910091Snilay@cs.wisc.edusystem.physmem.bytes_read::cpu0.inst 563266144 # Number of bytes read from this memory 2010091Snilay@cs.wisc.edusystem.physmem.bytes_read::cpu0.data 42058413 # Number of bytes read from this memory 2110091Snilay@cs.wisc.edusystem.physmem.bytes_read::cpu1.dtb.walker 54624 # Number of bytes read from this memory 2210091Snilay@cs.wisc.edusystem.physmem.bytes_read::cpu1.itb.walker 20152 # Number of bytes read from this memory 2310091Snilay@cs.wisc.edusystem.physmem.bytes_read::cpu1.inst 449844528 # Number of bytes read from this memory 2410091Snilay@cs.wisc.edusystem.physmem.bytes_read::cpu1.data 51716224 # Number of bytes read from this memory 2510091Snilay@cs.wisc.edusystem.physmem.bytes_read::total 1107251301 # Number of bytes read from this memory 2610091Snilay@cs.wisc.edusystem.physmem.bytes_inst_read::cpu0.inst 563266144 # Number of instructions bytes read from this memory 2710091Snilay@cs.wisc.edusystem.physmem.bytes_inst_read::cpu1.inst 449844528 # Number of instructions bytes read from this memory 2810091Snilay@cs.wisc.edusystem.physmem.bytes_inst_read::total 1013110672 # Number of instructions bytes read from this memory 299055SN/Asystem.physmem.bytes_written::pc.south_bridge.ide 2991104 # Number of bytes written to this memory 309055SN/Asystem.physmem.bytes_written::cpu0.itb.walker 16 # Number of bytes written to this memory 3110091Snilay@cs.wisc.edusystem.physmem.bytes_written::cpu0.data 34107443 # Number of bytes written to this memory 3210091Snilay@cs.wisc.edusystem.physmem.bytes_written::cpu1.data 33949582 # Number of bytes written to this memory 3310091Snilay@cs.wisc.edusystem.physmem.bytes_written::total 71048145 # Number of bytes written to this memory 3410091Snilay@cs.wisc.edusystem.physmem.num_reads::pc.south_bridge.ide 811 # Number of read requests responded to by this memory 3510091Snilay@cs.wisc.edusystem.physmem.num_reads::cpu0.dtb.walker 21078 # Number of read requests responded to by this memory 3610091Snilay@cs.wisc.edusystem.physmem.num_reads::cpu0.itb.walker 10929 # Number of read requests responded to by this memory 3710091Snilay@cs.wisc.edusystem.physmem.num_reads::cpu0.inst 70408268 # Number of read requests responded to by this memory 3810091Snilay@cs.wisc.edusystem.physmem.num_reads::cpu0.data 7008799 # Number of read requests responded to by this memory 3910091Snilay@cs.wisc.edusystem.physmem.num_reads::cpu1.dtb.walker 6828 # Number of read requests responded to by this memory 4010091Snilay@cs.wisc.edusystem.physmem.num_reads::cpu1.itb.walker 2519 # Number of read requests responded to by this memory 4110091Snilay@cs.wisc.edusystem.physmem.num_reads::cpu1.inst 56230566 # Number of read requests responded to by this memory 4210091Snilay@cs.wisc.edusystem.physmem.num_reads::cpu1.data 8723011 # Number of read requests responded to by this memory 4310091Snilay@cs.wisc.edusystem.physmem.num_reads::total 142412809 # Number of read requests responded to by this memory 449055SN/Asystem.physmem.num_writes::pc.south_bridge.ide 46736 # Number of write requests responded to by this memory 459055SN/Asystem.physmem.num_writes::cpu0.itb.walker 2 # Number of write requests responded to by this memory 4610091Snilay@cs.wisc.edusystem.physmem.num_writes::cpu0.data 5095297 # Number of write requests responded to by this memory 4710091Snilay@cs.wisc.edusystem.physmem.num_writes::cpu1.data 4745855 # Number of write requests responded to by this memory 4810091Snilay@cs.wisc.edusystem.physmem.num_writes::total 9887890 # Number of write requests responded to by this memory 4910091Snilay@cs.wisc.edusystem.physmem.bw_read::pc.south_bridge.ide 6628 # Total read bandwidth from this memory (bytes/s) 5010091Snilay@cs.wisc.edusystem.physmem.bw_read::cpu0.dtb.walker 31789 # Total read bandwidth from this memory (bytes/s) 5110091Snilay@cs.wisc.edusystem.physmem.bw_read::cpu0.itb.walker 16483 # Total read bandwidth from this memory (bytes/s) 5210091Snilay@cs.wisc.edusystem.physmem.bw_read::cpu0.inst 106186538 # Total read bandwidth from this memory (bytes/s) 5310091Snilay@cs.wisc.edusystem.physmem.bw_read::cpu0.data 7928822 # Total read bandwidth from this memory (bytes/s) 5410091Snilay@cs.wisc.edusystem.physmem.bw_read::cpu1.dtb.walker 10298 # Total read bandwidth from this memory (bytes/s) 5510091Snilay@cs.wisc.edusystem.physmem.bw_read::cpu1.itb.walker 3799 # Total read bandwidth from this memory (bytes/s) 5610091Snilay@cs.wisc.edusystem.physmem.bw_read::cpu1.inst 84804374 # Total read bandwidth from this memory (bytes/s) 5710091Snilay@cs.wisc.edusystem.physmem.bw_read::cpu1.data 9749506 # Total read bandwidth from this memory (bytes/s) 5810091Snilay@cs.wisc.edusystem.physmem.bw_read::total 208738237 # Total read bandwidth from this memory (bytes/s) 5910091Snilay@cs.wisc.edusystem.physmem.bw_inst_read::cpu0.inst 106186538 # Instruction read bandwidth from this memory (bytes/s) 6010091Snilay@cs.wisc.edusystem.physmem.bw_inst_read::cpu1.inst 84804374 # Instruction read bandwidth from this memory (bytes/s) 6110091Snilay@cs.wisc.edusystem.physmem.bw_inst_read::total 190990912 # Instruction read bandwidth from this memory (bytes/s) 6210091Snilay@cs.wisc.edusystem.physmem.bw_write::pc.south_bridge.ide 563881 # Write bandwidth from this memory (bytes/s) 639055SN/Asystem.physmem.bw_write::cpu0.itb.walker 3 # Write bandwidth from this memory (bytes/s) 6410091Snilay@cs.wisc.edusystem.physmem.bw_write::cpu0.data 6429911 # Write bandwidth from this memory (bytes/s) 6510091Snilay@cs.wisc.edusystem.physmem.bw_write::cpu1.data 6400151 # Write bandwidth from this memory (bytes/s) 6610091Snilay@cs.wisc.edusystem.physmem.bw_write::total 13393946 # Write bandwidth from this memory (bytes/s) 6710091Snilay@cs.wisc.edusystem.physmem.bw_total::pc.south_bridge.ide 570509 # Total bandwidth to/from this memory (bytes/s) 6810091Snilay@cs.wisc.edusystem.physmem.bw_total::cpu0.dtb.walker 31789 # Total bandwidth to/from this memory (bytes/s) 6910091Snilay@cs.wisc.edusystem.physmem.bw_total::cpu0.itb.walker 16486 # Total bandwidth to/from this memory (bytes/s) 7010091Snilay@cs.wisc.edusystem.physmem.bw_total::cpu0.inst 106186538 # Total bandwidth to/from this memory (bytes/s) 7110091Snilay@cs.wisc.edusystem.physmem.bw_total::cpu0.data 14358734 # Total bandwidth to/from this memory (bytes/s) 7210091Snilay@cs.wisc.edusystem.physmem.bw_total::cpu1.dtb.walker 10298 # Total bandwidth to/from this memory (bytes/s) 7310091Snilay@cs.wisc.edusystem.physmem.bw_total::cpu1.itb.walker 3799 # Total bandwidth to/from this memory (bytes/s) 7410091Snilay@cs.wisc.edusystem.physmem.bw_total::cpu1.inst 84804374 # Total bandwidth to/from this memory (bytes/s) 7510091Snilay@cs.wisc.edusystem.physmem.bw_total::cpu1.data 16149658 # Total bandwidth to/from this memory (bytes/s) 7610091Snilay@cs.wisc.edusystem.physmem.bw_total::total 222132184 # Total bandwidth to/from this memory (bytes/s) 779978SN/Asystem.physmem.readReqs 0 # Number of read requests accepted 789978SN/Asystem.physmem.writeReqs 0 # Number of write requests accepted 799978SN/Asystem.physmem.readBursts 0 # Number of DRAM read bursts, including those serviced by the write queue 809978SN/Asystem.physmem.writeBursts 0 # Number of DRAM write bursts, including those merged in the write queue 819978SN/Asystem.physmem.bytesReadDRAM 0 # Total number of bytes read from DRAM 829978SN/Asystem.physmem.bytesReadWrQ 0 # Total number of bytes read from write queue 839978SN/Asystem.physmem.bytesWritten 0 # Total number of bytes written to DRAM 849978SN/Asystem.physmem.bytesReadSys 0 # Total read bytes from the system interface side 859978SN/Asystem.physmem.bytesWrittenSys 0 # Total written bytes from the system interface side 869978SN/Asystem.physmem.servicedByWrQ 0 # Number of DRAM read bursts serviced by the write queue 879978SN/Asystem.physmem.mergedWrBursts 0 # Number of DRAM write bursts merged with an existing one 889978SN/Asystem.physmem.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write 899978SN/Asystem.physmem.perBankRdBursts::0 0 # Per bank write bursts 909978SN/Asystem.physmem.perBankRdBursts::1 0 # Per bank write bursts 919978SN/Asystem.physmem.perBankRdBursts::2 0 # Per bank write bursts 929978SN/Asystem.physmem.perBankRdBursts::3 0 # Per bank write bursts 939978SN/Asystem.physmem.perBankRdBursts::4 0 # Per bank write bursts 949978SN/Asystem.physmem.perBankRdBursts::5 0 # Per bank write bursts 959978SN/Asystem.physmem.perBankRdBursts::6 0 # Per bank write bursts 969978SN/Asystem.physmem.perBankRdBursts::7 0 # Per bank write bursts 979978SN/Asystem.physmem.perBankRdBursts::8 0 # Per bank write bursts 989978SN/Asystem.physmem.perBankRdBursts::9 0 # Per bank write bursts 999978SN/Asystem.physmem.perBankRdBursts::10 0 # Per bank write bursts 1009978SN/Asystem.physmem.perBankRdBursts::11 0 # Per bank write bursts 1019978SN/Asystem.physmem.perBankRdBursts::12 0 # Per bank write bursts 1029978SN/Asystem.physmem.perBankRdBursts::13 0 # Per bank write bursts 1039978SN/Asystem.physmem.perBankRdBursts::14 0 # Per bank write bursts 1049978SN/Asystem.physmem.perBankRdBursts::15 0 # Per bank write bursts 1059978SN/Asystem.physmem.perBankWrBursts::0 0 # Per bank write bursts 1069978SN/Asystem.physmem.perBankWrBursts::1 0 # Per bank write bursts 1079978SN/Asystem.physmem.perBankWrBursts::2 0 # Per bank write bursts 1089978SN/Asystem.physmem.perBankWrBursts::3 0 # Per bank write bursts 1099978SN/Asystem.physmem.perBankWrBursts::4 0 # Per bank write bursts 1109978SN/Asystem.physmem.perBankWrBursts::5 0 # Per bank write bursts 1119978SN/Asystem.physmem.perBankWrBursts::6 0 # Per bank write bursts 1129978SN/Asystem.physmem.perBankWrBursts::7 0 # Per bank write bursts 1139978SN/Asystem.physmem.perBankWrBursts::8 0 # Per bank write bursts 1149978SN/Asystem.physmem.perBankWrBursts::9 0 # Per bank write bursts 1159978SN/Asystem.physmem.perBankWrBursts::10 0 # Per bank write bursts 1169978SN/Asystem.physmem.perBankWrBursts::11 0 # Per bank write bursts 1179978SN/Asystem.physmem.perBankWrBursts::12 0 # Per bank write bursts 1189978SN/Asystem.physmem.perBankWrBursts::13 0 # Per bank write bursts 1199978SN/Asystem.physmem.perBankWrBursts::14 0 # Per bank write bursts 1209978SN/Asystem.physmem.perBankWrBursts::15 0 # Per bank write bursts 1219978SN/Asystem.physmem.numRdRetry 0 # Number of times read queue was full causing retry 1229978SN/Asystem.physmem.numWrRetry 0 # Number of times write queue was full causing retry 1239978SN/Asystem.physmem.totGap 0 # Total gap between requests 1249978SN/Asystem.physmem.readPktSize::0 0 # Read request sizes (log2) 1259978SN/Asystem.physmem.readPktSize::1 0 # Read request sizes (log2) 1269978SN/Asystem.physmem.readPktSize::2 0 # Read request sizes (log2) 1279978SN/Asystem.physmem.readPktSize::3 0 # Read request sizes (log2) 1289978SN/Asystem.physmem.readPktSize::4 0 # Read request sizes (log2) 1299978SN/Asystem.physmem.readPktSize::5 0 # Read request sizes (log2) 1309978SN/Asystem.physmem.readPktSize::6 0 # Read request sizes (log2) 1319978SN/Asystem.physmem.writePktSize::0 0 # Write request sizes (log2) 1329978SN/Asystem.physmem.writePktSize::1 0 # Write request sizes (log2) 1339978SN/Asystem.physmem.writePktSize::2 0 # Write request sizes (log2) 1349978SN/Asystem.physmem.writePktSize::3 0 # Write request sizes (log2) 1359978SN/Asystem.physmem.writePktSize::4 0 # Write request sizes (log2) 1369978SN/Asystem.physmem.writePktSize::5 0 # Write request sizes (log2) 1379978SN/Asystem.physmem.writePktSize::6 0 # Write request sizes (log2) 1389978SN/Asystem.physmem.rdQLenPdf::0 0 # What read queue length does an incoming req see 1399978SN/Asystem.physmem.rdQLenPdf::1 0 # What read queue length does an incoming req see 1409978SN/Asystem.physmem.rdQLenPdf::2 0 # What read queue length does an incoming req see 1419978SN/Asystem.physmem.rdQLenPdf::3 0 # What read queue length does an incoming req see 1429978SN/Asystem.physmem.rdQLenPdf::4 0 # What read queue length does an incoming req see 1439978SN/Asystem.physmem.rdQLenPdf::5 0 # What read queue length does an incoming req see 1449978SN/Asystem.physmem.rdQLenPdf::6 0 # What read queue length does an incoming req see 1459978SN/Asystem.physmem.rdQLenPdf::7 0 # What read queue length does an incoming req see 1469978SN/Asystem.physmem.rdQLenPdf::8 0 # What read queue length does an incoming req see 1479978SN/Asystem.physmem.rdQLenPdf::9 0 # What read queue length does an incoming req see 1489978SN/Asystem.physmem.rdQLenPdf::10 0 # What read queue length does an incoming req see 1499978SN/Asystem.physmem.rdQLenPdf::11 0 # What read queue length does an incoming req see 1509978SN/Asystem.physmem.rdQLenPdf::12 0 # What read queue length does an incoming req see 1519978SN/Asystem.physmem.rdQLenPdf::13 0 # What read queue length does an incoming req see 1529978SN/Asystem.physmem.rdQLenPdf::14 0 # What read queue length does an incoming req see 1539978SN/Asystem.physmem.rdQLenPdf::15 0 # What read queue length does an incoming req see 1549978SN/Asystem.physmem.rdQLenPdf::16 0 # What read queue length does an incoming req see 1559978SN/Asystem.physmem.rdQLenPdf::17 0 # What read queue length does an incoming req see 1569978SN/Asystem.physmem.rdQLenPdf::18 0 # What read queue length does an incoming req see 1579978SN/Asystem.physmem.rdQLenPdf::19 0 # What read queue length does an incoming req see 1589978SN/Asystem.physmem.rdQLenPdf::20 0 # What read queue length does an incoming req see 1599978SN/Asystem.physmem.rdQLenPdf::21 0 # What read queue length does an incoming req see 1609978SN/Asystem.physmem.rdQLenPdf::22 0 # What read queue length does an incoming req see 1619978SN/Asystem.physmem.rdQLenPdf::23 0 # What read queue length does an incoming req see 1629978SN/Asystem.physmem.rdQLenPdf::24 0 # What read queue length does an incoming req see 1639978SN/Asystem.physmem.rdQLenPdf::25 0 # What read queue length does an incoming req see 1649978SN/Asystem.physmem.rdQLenPdf::26 0 # What read queue length does an incoming req see 1659978SN/Asystem.physmem.rdQLenPdf::27 0 # What read queue length does an incoming req see 1669978SN/Asystem.physmem.rdQLenPdf::28 0 # What read queue length does an incoming req see 1679978SN/Asystem.physmem.rdQLenPdf::29 0 # What read queue length does an incoming req see 1689978SN/Asystem.physmem.rdQLenPdf::30 0 # What read queue length does an incoming req see 1699978SN/Asystem.physmem.rdQLenPdf::31 0 # What read queue length does an incoming req see 1709978SN/Asystem.physmem.wrQLenPdf::0 0 # What write queue length does an incoming req see 1719978SN/Asystem.physmem.wrQLenPdf::1 0 # What write queue length does an incoming req see 1729978SN/Asystem.physmem.wrQLenPdf::2 0 # What write queue length does an incoming req see 1739978SN/Asystem.physmem.wrQLenPdf::3 0 # What write queue length does an incoming req see 1749978SN/Asystem.physmem.wrQLenPdf::4 0 # What write queue length does an incoming req see 1759978SN/Asystem.physmem.wrQLenPdf::5 0 # What write queue length does an incoming req see 1769978SN/Asystem.physmem.wrQLenPdf::6 0 # What write queue length does an incoming req see 1779978SN/Asystem.physmem.wrQLenPdf::7 0 # What write queue length does an incoming req see 1789978SN/Asystem.physmem.wrQLenPdf::8 0 # What write queue length does an incoming req see 1799978SN/Asystem.physmem.wrQLenPdf::9 0 # What write queue length does an incoming req see 1809978SN/Asystem.physmem.wrQLenPdf::10 0 # What write queue length does an incoming req see 1819978SN/Asystem.physmem.wrQLenPdf::11 0 # What write queue length does an incoming req see 1829978SN/Asystem.physmem.wrQLenPdf::12 0 # What write queue length does an incoming req see 1839978SN/Asystem.physmem.wrQLenPdf::13 0 # What write queue length does an incoming req see 1849978SN/Asystem.physmem.wrQLenPdf::14 0 # What write queue length does an incoming req see 1859978SN/Asystem.physmem.wrQLenPdf::15 0 # What write queue length does an incoming req see 1869978SN/Asystem.physmem.wrQLenPdf::16 0 # What write queue length does an incoming req see 1879978SN/Asystem.physmem.wrQLenPdf::17 0 # What write queue length does an incoming req see 1889978SN/Asystem.physmem.wrQLenPdf::18 0 # What write queue length does an incoming req see 1899978SN/Asystem.physmem.wrQLenPdf::19 0 # What write queue length does an incoming req see 1909978SN/Asystem.physmem.wrQLenPdf::20 0 # What write queue length does an incoming req see 1919978SN/Asystem.physmem.wrQLenPdf::21 0 # What write queue length does an incoming req see 1929978SN/Asystem.physmem.wrQLenPdf::22 0 # What write queue length does an incoming req see 1939978SN/Asystem.physmem.wrQLenPdf::23 0 # What write queue length does an incoming req see 1949978SN/Asystem.physmem.wrQLenPdf::24 0 # What write queue length does an incoming req see 1959978SN/Asystem.physmem.wrQLenPdf::25 0 # What write queue length does an incoming req see 1969978SN/Asystem.physmem.wrQLenPdf::26 0 # What write queue length does an incoming req see 1979978SN/Asystem.physmem.wrQLenPdf::27 0 # What write queue length does an incoming req see 1989978SN/Asystem.physmem.wrQLenPdf::28 0 # What write queue length does an incoming req see 1999978SN/Asystem.physmem.wrQLenPdf::29 0 # What write queue length does an incoming req see 2009978SN/Asystem.physmem.wrQLenPdf::30 0 # What write queue length does an incoming req see 2019978SN/Asystem.physmem.wrQLenPdf::31 0 # What write queue length does an incoming req see 20210148Sandreas.hansson@arm.comsystem.physmem.wrQLenPdf::32 0 # What write queue length does an incoming req see 20310148Sandreas.hansson@arm.comsystem.physmem.wrQLenPdf::33 0 # What write queue length does an incoming req see 20410148Sandreas.hansson@arm.comsystem.physmem.wrQLenPdf::34 0 # What write queue length does an incoming req see 20510148Sandreas.hansson@arm.comsystem.physmem.wrQLenPdf::35 0 # What write queue length does an incoming req see 20610148Sandreas.hansson@arm.comsystem.physmem.wrQLenPdf::36 0 # What write queue length does an incoming req see 20710148Sandreas.hansson@arm.comsystem.physmem.wrQLenPdf::37 0 # What write queue length does an incoming req see 20810148Sandreas.hansson@arm.comsystem.physmem.wrQLenPdf::38 0 # What write queue length does an incoming req see 20910148Sandreas.hansson@arm.comsystem.physmem.wrQLenPdf::39 0 # What write queue length does an incoming req see 21010148Sandreas.hansson@arm.comsystem.physmem.wrQLenPdf::40 0 # What write queue length does an incoming req see 21110148Sandreas.hansson@arm.comsystem.physmem.wrQLenPdf::41 0 # What write queue length does an incoming req see 21210148Sandreas.hansson@arm.comsystem.physmem.wrQLenPdf::42 0 # What write queue length does an incoming req see 21310148Sandreas.hansson@arm.comsystem.physmem.wrQLenPdf::43 0 # What write queue length does an incoming req see 21410148Sandreas.hansson@arm.comsystem.physmem.wrQLenPdf::44 0 # What write queue length does an incoming req see 21510148Sandreas.hansson@arm.comsystem.physmem.wrQLenPdf::45 0 # What write queue length does an incoming req see 21610148Sandreas.hansson@arm.comsystem.physmem.wrQLenPdf::46 0 # What write queue length does an incoming req see 21710148Sandreas.hansson@arm.comsystem.physmem.wrQLenPdf::47 0 # What write queue length does an incoming req see 21810148Sandreas.hansson@arm.comsystem.physmem.wrQLenPdf::48 0 # What write queue length does an incoming req see 21910148Sandreas.hansson@arm.comsystem.physmem.wrQLenPdf::49 0 # What write queue length does an incoming req see 22010148Sandreas.hansson@arm.comsystem.physmem.wrQLenPdf::50 0 # What write queue length does an incoming req see 22110148Sandreas.hansson@arm.comsystem.physmem.wrQLenPdf::51 0 # What write queue length does an incoming req see 22210148Sandreas.hansson@arm.comsystem.physmem.wrQLenPdf::52 0 # What write queue length does an incoming req see 22310148Sandreas.hansson@arm.comsystem.physmem.wrQLenPdf::53 0 # What write queue length does an incoming req see 22410148Sandreas.hansson@arm.comsystem.physmem.wrQLenPdf::54 0 # What write queue length does an incoming req see 22510148Sandreas.hansson@arm.comsystem.physmem.wrQLenPdf::55 0 # What write queue length does an incoming req see 22610148Sandreas.hansson@arm.comsystem.physmem.wrQLenPdf::56 0 # What write queue length does an incoming req see 22710148Sandreas.hansson@arm.comsystem.physmem.wrQLenPdf::57 0 # What write queue length does an incoming req see 22810148Sandreas.hansson@arm.comsystem.physmem.wrQLenPdf::58 0 # What write queue length does an incoming req see 22910148Sandreas.hansson@arm.comsystem.physmem.wrQLenPdf::59 0 # What write queue length does an incoming req see 23010148Sandreas.hansson@arm.comsystem.physmem.wrQLenPdf::60 0 # What write queue length does an incoming req see 23110148Sandreas.hansson@arm.comsystem.physmem.wrQLenPdf::61 0 # What write queue length does an incoming req see 23210148Sandreas.hansson@arm.comsystem.physmem.wrQLenPdf::62 0 # What write queue length does an incoming req see 23310148Sandreas.hansson@arm.comsystem.physmem.wrQLenPdf::63 0 # What write queue length does an incoming req see 2349978SN/Asystem.physmem.totQLat 0 # Total ticks spent queuing 2359978SN/Asystem.physmem.totMemAccLat 0 # Total ticks spent from burst creation until serviced by the DRAM 2369978SN/Asystem.physmem.totBusLat 0 # Total ticks spent in databus transfers 2379978SN/Asystem.physmem.totBankLat 0 # Total ticks spent accessing banks 2389978SN/Asystem.physmem.avgQLat nan # Average queueing delay per DRAM burst 2399978SN/Asystem.physmem.avgBankLat nan # Average bank access latency per DRAM burst 2409978SN/Asystem.physmem.avgBusLat nan # Average bus latency per DRAM burst 2419978SN/Asystem.physmem.avgMemAccLat nan # Average memory access latency per DRAM burst 2429978SN/Asystem.physmem.avgRdBW 0.00 # Average DRAM read bandwidth in MiByte/s 2439978SN/Asystem.physmem.avgWrBW 0.00 # Average achieved write bandwidth in MiByte/s 2449978SN/Asystem.physmem.avgRdBWSys 0.00 # Average system read bandwidth in MiByte/s 2459978SN/Asystem.physmem.avgWrBWSys 0.00 # Average system write bandwidth in MiByte/s 2469978SN/Asystem.physmem.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s 2479312SN/Asystem.physmem.busUtil 0.00 # Data bus utilization in percentage 2489978SN/Asystem.physmem.busUtilRead 0.00 # Data bus utilization in percentage for reads 2499978SN/Asystem.physmem.busUtilWrite 0.00 # Data bus utilization in percentage for writes 2509978SN/Asystem.physmem.avgRdQLen 0.00 # Average read queue length when enqueuing 2519978SN/Asystem.physmem.avgWrQLen 0.00 # Average write queue length when enqueuing 2529978SN/Asystem.physmem.readRowHits 0 # Number of row buffer hits during reads 2539978SN/Asystem.physmem.writeRowHits 0 # Number of row buffer hits during writes 2549978SN/Asystem.physmem.readRowHitRate nan # Row buffer hit rate for reads 2559978SN/Asystem.physmem.writeRowHitRate nan # Row buffer hit rate for writes 2569978SN/Asystem.physmem.avgGap nan # Average gap between requests 2579978SN/Asystem.physmem.pageHitRate nan # Row buffer hit rate, read and write combined 2589978SN/Asystem.physmem.prechargeAllPercent 0.00 # Percentage of time for which DRAM has all the banks in precharge state 25910124Snilay@cs.wisc.edusystem.iobus.throughput 383259 # Throughput (bytes/s) 26010124Snilay@cs.wisc.edusystem.iobus.trans_dist::ReadReq 858443 # Transaction distribution 26110124Snilay@cs.wisc.edusystem.iobus.trans_dist::ReadResp 858443 # Transaction distribution 26210124Snilay@cs.wisc.edusystem.iobus.trans_dist::WriteReq 37726 # Transaction distribution 26310124Snilay@cs.wisc.edusystem.iobus.trans_dist::WriteResp 37726 # Transaction distribution 26410124Snilay@cs.wisc.edusystem.iobus.trans_dist::MessageReq 1924 # Transaction distribution 26510124Snilay@cs.wisc.edusystem.iobus.trans_dist::MessageResp 1924 # Transaction distribution 26610124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.pc.south_bridge.io_apic.int_master::system.ruby.l1_cntrl0.sequencer.pio-slave-port 1702 # Packet count per connected master and slave (bytes) 26710124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.pc.south_bridge.io_apic.int_master::system.ruby.l1_cntrl1.sequencer.pio-slave-port 1646 # Packet count per connected master and slave (bytes) 26810124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.pc.south_bridge.io_apic.int_master::total 3348 # Packet count per connected master and slave (bytes) 26910124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.cmos.pio 36 # Packet count per connected master and slave (bytes) 27010124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.ide.pio 6438 # Packet count per connected master and slave (bytes) 27110124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.ide-pciconf 88 # Packet count per connected master and slave (bytes) 27210124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.keyboard.pio 956 # Packet count per connected master and slave (bytes) 27310124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.pic1.pio 78 # Packet count per connected master and slave (bytes) 27410124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.pic2.pio 38 # Packet count per connected master and slave (bytes) 27510124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.pit.pio 30 # Packet count per connected master and slave (bytes) 27610124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.speaker.pio 934582 # Packet count per connected master and slave (bytes) 27710124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.io_apic.pio 980 # Packet count per connected master and slave (bytes) 27810124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.i_dont_exist.pio 90 # Packet count per connected master and slave (bytes) 27910124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.behind_pci.pio 2 # Packet count per connected master and slave (bytes) 28010124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.com_1.pio 14492 # Packet count per connected master and slave (bytes) 28110124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.ruby.l1_cntrl0.sequencer.pio-slave-port 743206 # Packet count per connected master and slave (bytes) 28210124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.ruby.l1_cntrl1.sequencer.pio-slave-port 242 # Packet count per connected master and slave (bytes) 28310124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.pciconfig.pio 2126 # Packet count per connected master and slave (bytes) 28410124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::total 1703384 # Packet count per connected master and slave (bytes) 28510124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.cmos.pio 16 # Packet count per connected master and slave (bytes) 28610124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.dma1.pio 6 # Packet count per connected master and slave (bytes) 28710124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.ide.pio 4650 # Packet count per connected master and slave (bytes) 28810124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.ide-pciconf 92 # Packet count per connected master and slave (bytes) 28910124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.keyboard.pio 408 # Packet count per connected master and slave (bytes) 29010124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.pic1.pio 16 # Packet count per connected master and slave (bytes) 29110124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.pic2.pio 16 # Packet count per connected master and slave (bytes) 29210124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.pit.pio 33042 # Packet count per connected master and slave (bytes) 29310124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.io_apic.pio 354 # Packet count per connected master and slave (bytes) 29410124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.i_dont_exist.pio 33130 # Packet count per connected master and slave (bytes) 29510124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.com_1.pio 12176 # Packet count per connected master and slave (bytes) 29610124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.fake_com_2.pio 12 # Packet count per connected master and slave (bytes) 29710124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.fake_com_3.pio 12 # Packet count per connected master and slave (bytes) 29810124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.fake_com_4.pio 12 # Packet count per connected master and slave (bytes) 29910124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.fake_floppy.pio 10 # Packet count per connected master and slave (bytes) 30010124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.ruby.l1_cntrl0.sequencer.pio-slave-port 258 # Packet count per connected master and slave (bytes) 30110124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.ruby.l1_cntrl1.sequencer.pio-slave-port 5244 # Packet count per connected master and slave (bytes) 30210124Snilay@cs.wisc.edusystem.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::total 89454 # Packet count per connected master and slave (bytes) 30310124Snilay@cs.wisc.edusystem.iobus.pkt_count::total 1796186 # Packet count per connected master and slave (bytes) 30410124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.pc.south_bridge.io_apic.int_master::system.ruby.l1_cntrl0.sequencer.pio-slave-port 3404 # Cumulative packet size per connected master and slave (bytes) 30510124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.pc.south_bridge.io_apic.int_master::system.ruby.l1_cntrl1.sequencer.pio-slave-port 3292 # Cumulative packet size per connected master and slave (bytes) 30610124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.pc.south_bridge.io_apic.int_master::total 6696 # Cumulative packet size per connected master and slave (bytes) 30710124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.cmos.pio 18 # Cumulative packet size per connected master and slave (bytes) 30810124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.ide.pio 3666 # Cumulative packet size per connected master and slave (bytes) 30910124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.ide-pciconf 149 # Cumulative packet size per connected master and slave (bytes) 31010124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.keyboard.pio 478 # Cumulative packet size per connected master and slave (bytes) 31110124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.pic1.pio 39 # Cumulative packet size per connected master and slave (bytes) 31210124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.pic2.pio 19 # Cumulative packet size per connected master and slave (bytes) 31310124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.pit.pio 15 # Cumulative packet size per connected master and slave (bytes) 31410124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.speaker.pio 467291 # Cumulative packet size per connected master and slave (bytes) 31510124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.io_apic.pio 1960 # Cumulative packet size per connected master and slave (bytes) 31610124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.i_dont_exist.pio 45 # Cumulative packet size per connected master and slave (bytes) 31710124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.behind_pci.pio 1 # Cumulative packet size per connected master and slave (bytes) 31810124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.com_1.pio 7246 # Cumulative packet size per connected master and slave (bytes) 31910124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.ruby.l1_cntrl0.sequencer.pio-slave-port 1486406 # Cumulative packet size per connected master and slave (bytes) 32010124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.ruby.l1_cntrl1.sequencer.pio-slave-port 484 # Cumulative packet size per connected master and slave (bytes) 32110124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.pciconfig.pio 4252 # Cumulative packet size per connected master and slave (bytes) 32210124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::total 1972069 # Cumulative packet size per connected master and slave (bytes) 32310124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.cmos.pio 8 # Cumulative packet size per connected master and slave (bytes) 32410124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.dma1.pio 3 # Cumulative packet size per connected master and slave (bytes) 32510124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.ide.pio 3020 # Cumulative packet size per connected master and slave (bytes) 32610124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.ide-pciconf 72 # Cumulative packet size per connected master and slave (bytes) 32710124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.keyboard.pio 204 # Cumulative packet size per connected master and slave (bytes) 32810124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.pic1.pio 8 # Cumulative packet size per connected master and slave (bytes) 32910124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.pic2.pio 8 # Cumulative packet size per connected master and slave (bytes) 33010124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.pit.pio 16521 # Cumulative packet size per connected master and slave (bytes) 33110124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.io_apic.pio 708 # Cumulative packet size per connected master and slave (bytes) 33210124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.i_dont_exist.pio 16565 # Cumulative packet size per connected master and slave (bytes) 33310124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.com_1.pio 6088 # Cumulative packet size per connected master and slave (bytes) 33410124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.fake_com_2.pio 6 # Cumulative packet size per connected master and slave (bytes) 33510124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.fake_com_3.pio 6 # Cumulative packet size per connected master and slave (bytes) 33610124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.fake_com_4.pio 6 # Cumulative packet size per connected master and slave (bytes) 33710124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.fake_floppy.pio 5 # Cumulative packet size per connected master and slave (bytes) 33810124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.ruby.l1_cntrl0.sequencer.pio-slave-port 516 # Cumulative packet size per connected master and slave (bytes) 33910124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.ruby.l1_cntrl1.sequencer.pio-slave-port 10485 # Cumulative packet size per connected master and slave (bytes) 34010124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::total 54229 # Cumulative packet size per connected master and slave (bytes) 34110124Snilay@cs.wisc.edusystem.iobus.tot_pkt_size::total 2032994 # Cumulative packet size per connected master and slave (bytes) 34210124Snilay@cs.wisc.edusystem.iobus.data_through_bus 2032994 # Total data (bytes) 34310124Snilay@cs.wisc.edusystem.iobus.reqLayer0.occupancy 45000 # Layer occupancy (ticks) 34410124Snilay@cs.wisc.edusystem.iobus.reqLayer0.utilization 0.0 # Layer utilization (%) 34510124Snilay@cs.wisc.edusystem.iobus.reqLayer1.occupancy 7000 # Layer occupancy (ticks) 34610124Snilay@cs.wisc.edusystem.iobus.reqLayer1.utilization 0.0 # Layer utilization (%) 34710124Snilay@cs.wisc.edusystem.iobus.reqLayer2.occupancy 10111500 # Layer occupancy (ticks) 34810124Snilay@cs.wisc.edusystem.iobus.reqLayer2.utilization 0.0 # Layer utilization (%) 34910124Snilay@cs.wisc.edusystem.iobus.reqLayer3.occupancy 143500 # Layer occupancy (ticks) 35010124Snilay@cs.wisc.edusystem.iobus.reqLayer3.utilization 0.0 # Layer utilization (%) 35110124Snilay@cs.wisc.edusystem.iobus.reqLayer4.occupancy 1076000 # Layer occupancy (ticks) 35210124Snilay@cs.wisc.edusystem.iobus.reqLayer4.utilization 0.0 # Layer utilization (%) 35310124Snilay@cs.wisc.edusystem.iobus.reqLayer5.occupancy 95000 # Layer occupancy (ticks) 35410124Snilay@cs.wisc.edusystem.iobus.reqLayer5.utilization 0.0 # Layer utilization (%) 35510124Snilay@cs.wisc.edusystem.iobus.reqLayer6.occupancy 57500 # Layer occupancy (ticks) 35610124Snilay@cs.wisc.edusystem.iobus.reqLayer6.utilization 0.0 # Layer utilization (%) 35710124Snilay@cs.wisc.edusystem.iobus.reqLayer7.occupancy 30321000 # Layer occupancy (ticks) 35810124Snilay@cs.wisc.edusystem.iobus.reqLayer7.utilization 0.0 # Layer utilization (%) 35910124Snilay@cs.wisc.edusystem.iobus.reqLayer8.occupancy 467293000 # Layer occupancy (ticks) 36010124Snilay@cs.wisc.edusystem.iobus.reqLayer8.utilization 0.0 # Layer utilization (%) 36110124Snilay@cs.wisc.edusystem.iobus.reqLayer9.occupancy 1240500 # Layer occupancy (ticks) 36210124Snilay@cs.wisc.edusystem.iobus.reqLayer9.utilization 0.0 # Layer utilization (%) 36310124Snilay@cs.wisc.edusystem.iobus.reqLayer10.occupancy 41494500 # Layer occupancy (ticks) 36410124Snilay@cs.wisc.edusystem.iobus.reqLayer10.utilization 0.0 # Layer utilization (%) 36510124Snilay@cs.wisc.edusystem.iobus.reqLayer11.occupancy 2000 # Layer occupancy (ticks) 36610124Snilay@cs.wisc.edusystem.iobus.reqLayer11.utilization 0.0 # Layer utilization (%) 36710124Snilay@cs.wisc.edusystem.iobus.reqLayer12.occupancy 23487000 # Layer occupancy (ticks) 36810124Snilay@cs.wisc.edusystem.iobus.reqLayer12.utilization 0.0 # Layer utilization (%) 36910124Snilay@cs.wisc.edusystem.iobus.reqLayer13.occupancy 12000 # Layer occupancy (ticks) 37010124Snilay@cs.wisc.edusystem.iobus.reqLayer13.utilization 0.0 # Layer utilization (%) 37110124Snilay@cs.wisc.edusystem.iobus.reqLayer14.occupancy 9000 # Layer occupancy (ticks) 37210124Snilay@cs.wisc.edusystem.iobus.reqLayer14.utilization 0.0 # Layer utilization (%) 37310124Snilay@cs.wisc.edusystem.iobus.reqLayer15.occupancy 9000 # Layer occupancy (ticks) 37410124Snilay@cs.wisc.edusystem.iobus.reqLayer15.utilization 0.0 # Layer utilization (%) 37510124Snilay@cs.wisc.edusystem.iobus.reqLayer16.occupancy 10500 # Layer occupancy (ticks) 37610124Snilay@cs.wisc.edusystem.iobus.reqLayer16.utilization 0.0 # Layer utilization (%) 37710124Snilay@cs.wisc.edusystem.iobus.reqLayer17.occupancy 469626032 # Layer occupancy (ticks) 37810124Snilay@cs.wisc.edusystem.iobus.reqLayer17.utilization 0.0 # Layer utilization (%) 37910124Snilay@cs.wisc.edusystem.iobus.reqLayer18.occupancy 7795368 # Layer occupancy (ticks) 38010124Snilay@cs.wisc.edusystem.iobus.reqLayer18.utilization 0.0 # Layer utilization (%) 38110124Snilay@cs.wisc.edusystem.iobus.reqLayer20.occupancy 1328500 # Layer occupancy (ticks) 38210124Snilay@cs.wisc.edusystem.iobus.reqLayer20.utilization 0.0 # Layer utilization (%) 38310124Snilay@cs.wisc.edusystem.iobus.respLayer0.occupancy 2413900 # Layer occupancy (ticks) 38410124Snilay@cs.wisc.edusystem.iobus.respLayer0.utilization 0.0 # Layer utilization (%) 38510124Snilay@cs.wisc.edusystem.iobus.respLayer2.occupancy 1790216000 # Layer occupancy (ticks) 38610124Snilay@cs.wisc.edusystem.iobus.respLayer2.utilization 0.0 # Layer utilization (%) 38710124Snilay@cs.wisc.edusystem.iobus.respLayer4.occupancy 80190500 # Layer occupancy (ticks) 38810124Snilay@cs.wisc.edusystem.iobus.respLayer4.utilization 0.0 # Layer utilization (%) 38910036SAli.Saidi@ARM.comsystem.ruby.clk_domain.clock 500 # Clock period in ticks 39010013Snilay@cs.wisc.edusystem.ruby.delayHist::bucket_size 2 # delay histogram for all message 39110013Snilay@cs.wisc.edusystem.ruby.delayHist::max_bucket 19 # delay histogram for all message 39210091Snilay@cs.wisc.edusystem.ruby.delayHist::samples 10864248 # delay histogram for all message 39310091Snilay@cs.wisc.edusystem.ruby.delayHist::mean 0.221600 # delay histogram for all message 39410091Snilay@cs.wisc.edusystem.ruby.delayHist::stdev 0.915697 # delay histogram for all message 39510091Snilay@cs.wisc.edusystem.ruby.delayHist | 10262737 94.46% 94.46% | 1567 0.01% 94.48% | 599477 5.52% 100.00% | 172 0.00% 100.00% | 242 0.00% 100.00% | 9 0.00% 100.00% | 44 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for all message 39610091Snilay@cs.wisc.edusystem.ruby.delayHist::total 10864248 # delay histogram for all message 39710013Snilay@cs.wisc.edusystem.ruby.outstanding_req_hist::bucket_size 1 39810013Snilay@cs.wisc.edusystem.ruby.outstanding_req_hist::max_bucket 9 39910091Snilay@cs.wisc.edusystem.ruby.outstanding_req_hist::samples 152253153 40010013Snilay@cs.wisc.edusystem.ruby.outstanding_req_hist::mean 1.000112 40110013Snilay@cs.wisc.edusystem.ruby.outstanding_req_hist::gmean 1.000078 40210091Snilay@cs.wisc.edusystem.ruby.outstanding_req_hist::stdev 0.010602 40310091Snilay@cs.wisc.edusystem.ruby.outstanding_req_hist | 0 0.00% 0.00% | 152236038 99.99% 99.99% | 17115 0.01% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 40410091Snilay@cs.wisc.edusystem.ruby.outstanding_req_hist::total 152253153 40510013Snilay@cs.wisc.edusystem.ruby.latency_hist::bucket_size 32 40610013Snilay@cs.wisc.edusystem.ruby.latency_hist::max_bucket 319 40710091Snilay@cs.wisc.edusystem.ruby.latency_hist::samples 152253152 40810091Snilay@cs.wisc.edusystem.ruby.latency_hist::mean 3.380085 40910091Snilay@cs.wisc.edusystem.ruby.latency_hist::gmean 3.106154 41010091Snilay@cs.wisc.edusystem.ruby.latency_hist::stdev 3.774249 41110091Snilay@cs.wisc.edusystem.ruby.latency_hist | 152079187 99.89% 99.89% | 156 0.00% 99.89% | 79112 0.05% 99.94% | 93712 0.06% 100.00% | 981 0.00% 100.00% | 4 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 41210091Snilay@cs.wisc.edusystem.ruby.latency_hist::total 152253152 41310013Snilay@cs.wisc.edusystem.ruby.hit_latency_hist::bucket_size 1 41410013Snilay@cs.wisc.edusystem.ruby.hit_latency_hist::max_bucket 9 41510091Snilay@cs.wisc.edusystem.ruby.hit_latency_hist::samples 149594464 41610013Snilay@cs.wisc.edusystem.ruby.hit_latency_hist::mean 3 41710013Snilay@cs.wisc.edusystem.ruby.hit_latency_hist::gmean 3.000000 41810091Snilay@cs.wisc.edusystem.ruby.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 149594464 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 41910091Snilay@cs.wisc.edusystem.ruby.hit_latency_hist::total 149594464 42010013Snilay@cs.wisc.edusystem.ruby.miss_latency_hist::bucket_size 32 42110013Snilay@cs.wisc.edusystem.ruby.miss_latency_hist::max_bucket 319 42210091Snilay@cs.wisc.edusystem.ruby.miss_latency_hist::samples 2658688 42310091Snilay@cs.wisc.edusystem.ruby.miss_latency_hist::mean 24.766053 42410091Snilay@cs.wisc.edusystem.ruby.miss_latency_hist::gmean 21.975430 42510091Snilay@cs.wisc.edusystem.ruby.miss_latency_hist::stdev 18.715437 42610091Snilay@cs.wisc.edusystem.ruby.miss_latency_hist | 2484723 93.46% 93.46% | 156 0.01% 93.46% | 79112 2.98% 96.44% | 93712 3.52% 99.96% | 981 0.04% 100.00% | 4 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 42710091Snilay@cs.wisc.edusystem.ruby.miss_latency_hist::total 2658688 42810091Snilay@cs.wisc.edusystem.ruby.l1_cntrl0.L1Dcache.demand_hits 11564569 # Number of cache demand hits 42910091Snilay@cs.wisc.edusystem.ruby.l1_cntrl0.L1Dcache.demand_misses 571536 # Number of cache demand misses 43010091Snilay@cs.wisc.edusystem.ruby.l1_cntrl0.L1Dcache.demand_accesses 12136105 # Number of cache demand accesses 43110091Snilay@cs.wisc.edusystem.ruby.l1_cntrl0.L1Icache.demand_hits 70049459 # Number of cache demand hits 43210091Snilay@cs.wisc.edusystem.ruby.l1_cntrl0.L1Icache.demand_misses 358809 # Number of cache demand misses 43310091Snilay@cs.wisc.edusystem.ruby.l1_cntrl0.L1Icache.demand_accesses 70408268 # Number of cache demand accesses 4349803SN/Asystem.ruby.l1_cntrl0.prefetcher.miss_observed 0 # number of misses observed 4359803SN/Asystem.ruby.l1_cntrl0.prefetcher.allocated_streams 0 # number of streams allocated for prefetching 4369803SN/Asystem.ruby.l1_cntrl0.prefetcher.prefetches_requested 0 # number of prefetch requests made 4379803SN/Asystem.ruby.l1_cntrl0.prefetcher.prefetches_accepted 0 # number of prefetch requests accepted 4389803SN/Asystem.ruby.l1_cntrl0.prefetcher.dropped_prefetches 0 # number of prefetch requests dropped 4399803SN/Asystem.ruby.l1_cntrl0.prefetcher.hits 0 # number of prefetched blocks accessed 4409803SN/Asystem.ruby.l1_cntrl0.prefetcher.partial_hits 0 # number of misses observed for a block being prefetched 4419803SN/Asystem.ruby.l1_cntrl0.prefetcher.pages_crossed 0 # number of prefetches across pages 4429803SN/Asystem.ruby.l1_cntrl0.prefetcher.misses_on_prefetched_blocks 0 # number of misses for blocks that were prefetched, yet missed 44310091Snilay@cs.wisc.edusystem.ruby.l1_cntrl0.fully_busy_cycles 13 # cycles for which number of transistions == max transitions 44410091Snilay@cs.wisc.edusystem.ruby.l1_cntrl1.L1Dcache.demand_hits 12208458 # Number of cache demand hits 44510091Snilay@cs.wisc.edusystem.ruby.l1_cntrl1.L1Dcache.demand_misses 1269755 # Number of cache demand misses 44610091Snilay@cs.wisc.edusystem.ruby.l1_cntrl1.L1Dcache.demand_accesses 13478213 # Number of cache demand accesses 44710091Snilay@cs.wisc.edusystem.ruby.l1_cntrl1.L1Icache.demand_hits 55771978 # Number of cache demand hits 44810091Snilay@cs.wisc.edusystem.ruby.l1_cntrl1.L1Icache.demand_misses 458588 # Number of cache demand misses 44910091Snilay@cs.wisc.edusystem.ruby.l1_cntrl1.L1Icache.demand_accesses 56230566 # Number of cache demand accesses 4509803SN/Asystem.ruby.l1_cntrl1.prefetcher.miss_observed 0 # number of misses observed 4519803SN/Asystem.ruby.l1_cntrl1.prefetcher.allocated_streams 0 # number of streams allocated for prefetching 4529803SN/Asystem.ruby.l1_cntrl1.prefetcher.prefetches_requested 0 # number of prefetch requests made 4539803SN/Asystem.ruby.l1_cntrl1.prefetcher.prefetches_accepted 0 # number of prefetch requests accepted 4549803SN/Asystem.ruby.l1_cntrl1.prefetcher.dropped_prefetches 0 # number of prefetch requests dropped 4559803SN/Asystem.ruby.l1_cntrl1.prefetcher.hits 0 # number of prefetched blocks accessed 4569803SN/Asystem.ruby.l1_cntrl1.prefetcher.partial_hits 0 # number of misses observed for a block being prefetched 4579803SN/Asystem.ruby.l1_cntrl1.prefetcher.pages_crossed 0 # number of prefetches across pages 4589803SN/Asystem.ruby.l1_cntrl1.prefetcher.misses_on_prefetched_blocks 0 # number of misses for blocks that were prefetched, yet missed 45910091Snilay@cs.wisc.edusystem.ruby.l1_cntrl1.fully_busy_cycles 12 # cycles for which number of transistions == max transitions 46010091Snilay@cs.wisc.edusystem.ruby.l2_cntrl0.L2cache.demand_hits 2436073 # Number of cache demand hits 46110091Snilay@cs.wisc.edusystem.ruby.l2_cntrl0.L2cache.demand_misses 222615 # Number of cache demand misses 46210091Snilay@cs.wisc.edusystem.ruby.l2_cntrl0.L2cache.demand_accesses 2658688 # Number of cache demand accesses 46310091Snilay@cs.wisc.edusystem.ruby.l2_cntrl0.fully_busy_cycles 1 # cycles for which number of transistions == max transitions 46410091Snilay@cs.wisc.edusystem.ruby.network.routers0.percent_links_utilized 0.032337 46510091Snilay@cs.wisc.edusystem.ruby.network.routers0.msg_count.Control::0 930345 46610091Snilay@cs.wisc.edusystem.ruby.network.routers0.msg_count.Request_Control::0 42551 46710091Snilay@cs.wisc.edusystem.ruby.network.routers0.msg_count.Response_Data::1 958526 46810091Snilay@cs.wisc.edusystem.ruby.network.routers0.msg_count.Response_Control::1 545643 46910091Snilay@cs.wisc.edusystem.ruby.network.routers0.msg_count.Response_Control::2 541988 47010091Snilay@cs.wisc.edusystem.ruby.network.routers0.msg_count.Writeback_Data::0 316326 47110091Snilay@cs.wisc.edusystem.ruby.network.routers0.msg_count.Writeback_Data::1 73 47210091Snilay@cs.wisc.edusystem.ruby.network.routers0.msg_count.Writeback_Control::0 187843 47310091Snilay@cs.wisc.edusystem.ruby.network.routers0.msg_bytes.Control::0 7442760 47410091Snilay@cs.wisc.edusystem.ruby.network.routers0.msg_bytes.Request_Control::0 340408 47510091Snilay@cs.wisc.edusystem.ruby.network.routers0.msg_bytes.Response_Data::1 69013872 47610091Snilay@cs.wisc.edusystem.ruby.network.routers0.msg_bytes.Response_Control::1 4365144 47710091Snilay@cs.wisc.edusystem.ruby.network.routers0.msg_bytes.Response_Control::2 4335904 47810091Snilay@cs.wisc.edusystem.ruby.network.routers0.msg_bytes.Writeback_Data::0 22775472 47910091Snilay@cs.wisc.edusystem.ruby.network.routers0.msg_bytes.Writeback_Data::1 5256 48010091Snilay@cs.wisc.edusystem.ruby.network.routers0.msg_bytes.Writeback_Control::0 1502744 48110091Snilay@cs.wisc.edusystem.ruby.network.routers1.percent_links_utilized 0.054685 48210091Snilay@cs.wisc.edusystem.ruby.network.routers1.msg_count.Control::0 1728343 48310091Snilay@cs.wisc.edusystem.ruby.network.routers1.msg_count.Request_Control::0 38847 48410091Snilay@cs.wisc.edusystem.ruby.network.routers1.msg_count.Response_Data::1 1751957 48510091Snilay@cs.wisc.edusystem.ruby.network.routers1.msg_count.Response_Control::1 1215400 48610091Snilay@cs.wisc.edusystem.ruby.network.routers1.msg_count.Response_Control::2 1215698 48710091Snilay@cs.wisc.edusystem.ruby.network.routers1.msg_count.Writeback_Data::0 257501 48810091Snilay@cs.wisc.edusystem.ruby.network.routers1.msg_count.Writeback_Data::1 203 48910091Snilay@cs.wisc.edusystem.ruby.network.routers1.msg_count.Writeback_Control::0 921073 49010091Snilay@cs.wisc.edusystem.ruby.network.routers1.msg_bytes.Control::0 13826744 49110091Snilay@cs.wisc.edusystem.ruby.network.routers1.msg_bytes.Request_Control::0 310776 49210091Snilay@cs.wisc.edusystem.ruby.network.routers1.msg_bytes.Response_Data::1 126140904 49310091Snilay@cs.wisc.edusystem.ruby.network.routers1.msg_bytes.Response_Control::1 9723200 49410091Snilay@cs.wisc.edusystem.ruby.network.routers1.msg_bytes.Response_Control::2 9725584 49510091Snilay@cs.wisc.edusystem.ruby.network.routers1.msg_bytes.Writeback_Data::0 18540072 49610091Snilay@cs.wisc.edusystem.ruby.network.routers1.msg_bytes.Writeback_Data::1 14616 49710091Snilay@cs.wisc.edusystem.ruby.network.routers1.msg_bytes.Writeback_Control::0 7368584 49810091Snilay@cs.wisc.edusystem.ruby.network.routers2.percent_links_utilized 0.091275 49910091Snilay@cs.wisc.edusystem.ruby.network.routers2.msg_count.Control::0 2832497 50010091Snilay@cs.wisc.edusystem.ruby.network.routers2.msg_count.Request_Control::0 79755 50110091Snilay@cs.wisc.edusystem.ruby.network.routers2.msg_count.Response_Data::1 2883501 50210091Snilay@cs.wisc.edusystem.ruby.network.routers2.msg_count.Response_Control::1 1836231 50310091Snilay@cs.wisc.edusystem.ruby.network.routers2.msg_count.Response_Control::2 1757686 50410091Snilay@cs.wisc.edusystem.ruby.network.routers2.msg_count.Writeback_Data::0 573827 50510091Snilay@cs.wisc.edusystem.ruby.network.routers2.msg_count.Writeback_Data::1 276 50610091Snilay@cs.wisc.edusystem.ruby.network.routers2.msg_count.Writeback_Control::0 1108916 50710091Snilay@cs.wisc.edusystem.ruby.network.routers2.msg_bytes.Control::0 22659976 50810091Snilay@cs.wisc.edusystem.ruby.network.routers2.msg_bytes.Request_Control::0 638040 50910091Snilay@cs.wisc.edusystem.ruby.network.routers2.msg_bytes.Response_Data::1 207612072 51010091Snilay@cs.wisc.edusystem.ruby.network.routers2.msg_bytes.Response_Control::1 14689848 51110091Snilay@cs.wisc.edusystem.ruby.network.routers2.msg_bytes.Response_Control::2 14061488 51210091Snilay@cs.wisc.edusystem.ruby.network.routers2.msg_bytes.Writeback_Data::0 41315544 51310091Snilay@cs.wisc.edusystem.ruby.network.routers2.msg_bytes.Writeback_Data::1 19872 51410091Snilay@cs.wisc.edusystem.ruby.network.routers2.msg_bytes.Writeback_Control::0 8871328 51510036SAli.Saidi@ARM.comsystem.ruby.memctrl_clk_domain.clock 1500 # Clock period in ticks 51610091Snilay@cs.wisc.edusystem.ruby.dir_cntrl0.memBuffer.memReq 316330 # Total number of memory requests 51710091Snilay@cs.wisc.edusystem.ruby.dir_cntrl0.memBuffer.memRead 174269 # Number of memory reads 51810091Snilay@cs.wisc.edusystem.ruby.dir_cntrl0.memBuffer.memWrite 142061 # Number of memory writes 51910091Snilay@cs.wisc.edusystem.ruby.dir_cntrl0.memBuffer.memRefresh 708964 # Number of memory refreshes 52010091Snilay@cs.wisc.edusystem.ruby.dir_cntrl0.memBuffer.memWaitCycles 938904 # Delay stalled at the head of the bank queue 52110091Snilay@cs.wisc.edusystem.ruby.dir_cntrl0.memBuffer.memInputQ 51 # Delay in the input queue 52210091Snilay@cs.wisc.edusystem.ruby.dir_cntrl0.memBuffer.memBankQ 6500 # Delay behind the head of the bank queue 52310091Snilay@cs.wisc.edusystem.ruby.dir_cntrl0.memBuffer.totalStalls 945455 # Total number of stall cycles 52410091Snilay@cs.wisc.edusystem.ruby.dir_cntrl0.memBuffer.stallsPerReq 2.988825 # Expected number of stall cycles per request 52510091Snilay@cs.wisc.edusystem.ruby.dir_cntrl0.memBuffer.memBankBusy 927536 # memory stalls due to busy bank 52610091Snilay@cs.wisc.edusystem.ruby.dir_cntrl0.memBuffer.memBusBusy 8164 # memory stalls due to busy bus 52710091Snilay@cs.wisc.edusystem.ruby.dir_cntrl0.memBuffer.memReadWriteBusy 74 # memory stalls due to read write turnaround 52810091Snilay@cs.wisc.edusystem.ruby.dir_cntrl0.memBuffer.memDataBusBusy 11 # memory stalls due to read read turnaround 52910091Snilay@cs.wisc.edusystem.ruby.dir_cntrl0.memBuffer.memArbWait 3119 # memory stalls due to arbitration 53010091Snilay@cs.wisc.edusystem.ruby.dir_cntrl0.memBuffer.memBankCount | 10282 3.25% 3.25% | 9688 3.06% 6.31% | 9618 3.04% 9.35% | 9663 3.05% 12.41% | 10044 3.18% 15.58% | 9949 3.15% 18.73% | 9819 3.10% 21.83% | 9702 3.07% 24.90% | 9851 3.11% 28.01% | 9707 3.07% 31.08% | 9714 3.07% 34.15% | 9748 3.08% 37.23% | 9782 3.09% 40.33% | 9588 3.03% 43.36% | 9583 3.03% 46.39% | 8652 2.74% 49.12% | 10210 3.23% 52.35% | 9818 3.10% 55.45% | 9760 3.09% 58.54% | 9707 3.07% 61.61% | 10012 3.17% 64.77% | 9864 3.12% 67.89% | 9722 3.07% 70.96% | 9786 3.09% 74.06% | 10077 3.19% 77.24% | 9920 3.14% 80.38% | 10087 3.19% 83.57% | 10790 3.41% 86.98% | 10587 3.35% 90.33% | 10505 3.32% 93.65% | 10419 3.29% 96.94% | 9676 3.06% 100.00% # Number of accesses per bank 53110091Snilay@cs.wisc.edusystem.ruby.dir_cntrl0.memBuffer.memBankCount::total 316330 # Number of accesses per bank 53210091Snilay@cs.wisc.edusystem.ruby.network.routers3.percent_links_utilized 0.006678 53310091Snilay@cs.wisc.edusystem.ruby.network.routers3.msg_count.Control::0 173809 53410091Snilay@cs.wisc.edusystem.ruby.network.routers3.msg_count.Response_Data::1 271441 53510091Snilay@cs.wisc.edusystem.ruby.network.routers3.msg_count.Response_Control::1 122868 53610091Snilay@cs.wisc.edusystem.ruby.network.routers3.msg_count.Writeback_Control::0 47547 5379978SN/Asystem.ruby.network.routers3.msg_count.Writeback_Control::1 46736 53810091Snilay@cs.wisc.edusystem.ruby.network.routers3.msg_bytes.Control::0 1390472 53910091Snilay@cs.wisc.edusystem.ruby.network.routers3.msg_bytes.Response_Data::1 19543752 54010091Snilay@cs.wisc.edusystem.ruby.network.routers3.msg_bytes.Response_Control::1 982944 54110091Snilay@cs.wisc.edusystem.ruby.network.routers3.msg_bytes.Writeback_Control::0 380376 5429978SN/Asystem.ruby.network.routers3.msg_bytes.Writeback_Control::1 373888 54310091Snilay@cs.wisc.edusystem.ruby.network.routers4.percent_links_utilized 0.000239 54410091Snilay@cs.wisc.edusystem.ruby.network.routers4.msg_count.Response_Data::1 811 54510091Snilay@cs.wisc.edusystem.ruby.network.routers4.msg_count.Writeback_Control::0 47547 5469978SN/Asystem.ruby.network.routers4.msg_count.Writeback_Control::1 46736 54710091Snilay@cs.wisc.edusystem.ruby.network.routers4.msg_bytes.Response_Data::1 58392 54810091Snilay@cs.wisc.edusystem.ruby.network.routers4.msg_bytes.Writeback_Control::0 380376 5499978SN/Asystem.ruby.network.routers4.msg_bytes.Writeback_Control::1 373888 55010091Snilay@cs.wisc.edusystem.ruby.network.routers5.percent_links_utilized 0.037044 55110091Snilay@cs.wisc.edusystem.ruby.network.routers5.msg_count.Control::0 2832497 55210091Snilay@cs.wisc.edusystem.ruby.network.routers5.msg_count.Request_Control::0 81398 55310091Snilay@cs.wisc.edusystem.ruby.network.routers5.msg_count.Response_Data::1 2933118 55410091Snilay@cs.wisc.edusystem.ruby.network.routers5.msg_count.Response_Control::1 1860071 55510091Snilay@cs.wisc.edusystem.ruby.network.routers5.msg_count.Response_Control::2 1757686 55610091Snilay@cs.wisc.edusystem.ruby.network.routers5.msg_count.Writeback_Data::0 573827 55710091Snilay@cs.wisc.edusystem.ruby.network.routers5.msg_count.Writeback_Data::1 276 55810091Snilay@cs.wisc.edusystem.ruby.network.routers5.msg_count.Writeback_Control::0 1156463 5599978SN/Asystem.ruby.network.routers5.msg_count.Writeback_Control::1 46736 56010091Snilay@cs.wisc.edusystem.ruby.network.routers5.msg_bytes.Control::0 22659976 56110091Snilay@cs.wisc.edusystem.ruby.network.routers5.msg_bytes.Request_Control::0 651184 56210091Snilay@cs.wisc.edusystem.ruby.network.routers5.msg_bytes.Response_Data::1 211184496 56310091Snilay@cs.wisc.edusystem.ruby.network.routers5.msg_bytes.Response_Control::1 14880568 56410091Snilay@cs.wisc.edusystem.ruby.network.routers5.msg_bytes.Response_Control::2 14061488 56510091Snilay@cs.wisc.edusystem.ruby.network.routers5.msg_bytes.Writeback_Data::0 41315544 56610091Snilay@cs.wisc.edusystem.ruby.network.routers5.msg_bytes.Writeback_Data::1 19872 56710091Snilay@cs.wisc.edusystem.ruby.network.routers5.msg_bytes.Writeback_Control::0 9251704 5689978SN/Asystem.ruby.network.routers5.msg_bytes.Writeback_Control::1 373888 56910091Snilay@cs.wisc.edusystem.ruby.network.msg_count.Control 8497491 57010091Snilay@cs.wisc.edusystem.ruby.network.msg_count.Request_Control 242551 57110091Snilay@cs.wisc.edusystem.ruby.network.msg_count.Response_Data 8799354 57210091Snilay@cs.wisc.edusystem.ruby.network.msg_count.Response_Control 10853271 57310091Snilay@cs.wisc.edusystem.ruby.network.msg_count.Writeback_Data 1722309 57410091Snilay@cs.wisc.edusystem.ruby.network.msg_count.Writeback_Control 3609597 57510091Snilay@cs.wisc.edusystem.ruby.network.msg_byte.Control 67979928 57610091Snilay@cs.wisc.edusystem.ruby.network.msg_byte.Request_Control 1940408 57710091Snilay@cs.wisc.edusystem.ruby.network.msg_byte.Response_Data 633553488 57810091Snilay@cs.wisc.edusystem.ruby.network.msg_byte.Response_Control 86826168 57910091Snilay@cs.wisc.edusystem.ruby.network.msg_byte.Writeback_Data 124006248 58010091Snilay@cs.wisc.edusystem.ruby.network.msg_byte.Writeback_Control 28876776 5818968SN/Asystem.pc.south_bridge.ide.disks0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 5828974SN/Asystem.pc.south_bridge.ide.disks0.dma_read_bytes 32768 # Number of bytes transfered via DMA reads (not PRD). 5838974SN/Asystem.pc.south_bridge.ide.disks0.dma_read_txs 30 # Number of DMA read transactions (not PRD). 5848968SN/Asystem.pc.south_bridge.ide.disks0.dma_write_full_pages 693 # Number of full page size DMA writes. 5858974SN/Asystem.pc.south_bridge.ide.disks0.dma_write_bytes 2987008 # Number of bytes transfered via DMA writes. 5869998SN/Asystem.pc.south_bridge.ide.disks0.dma_write_txs 813 # Number of DMA write transactions. 5878968SN/Asystem.pc.south_bridge.ide.disks1.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 5888968SN/Asystem.pc.south_bridge.ide.disks1.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). 5898968SN/Asystem.pc.south_bridge.ide.disks1.dma_read_txs 0 # Number of DMA read transactions (not PRD). 5908968SN/Asystem.pc.south_bridge.ide.disks1.dma_write_full_pages 1 # Number of full page size DMA writes. 5918968SN/Asystem.pc.south_bridge.ide.disks1.dma_write_bytes 4096 # Number of bytes transfered via DMA writes. 5928968SN/Asystem.pc.south_bridge.ide.disks1.dma_write_txs 1 # Number of DMA write transactions. 59310036SAli.Saidi@ARM.comsystem.cpu_clk_domain.clock 500 # Clock period in ticks 59410036SAli.Saidi@ARM.comsystem.cpu0.apic_clk_domain.clock 8000 # Clock period in ticks 59510091Snilay@cs.wisc.edusystem.cpu0.numCycles 10608993500 # number of cpu cycles simulated 5968968SN/Asystem.cpu0.numWorkItemsStarted 0 # number of work items this cpu started 5978968SN/Asystem.cpu0.numWorkItemsCompleted 0 # number of work items this cpu completed 59810091Snilay@cs.wisc.edusystem.cpu0.committedInsts 60258540 # Number of instructions committed 59910091Snilay@cs.wisc.edusystem.cpu0.committedOps 115564120 # Number of ops (including micro ops) committed 60010091Snilay@cs.wisc.edusystem.cpu0.num_int_alu_accesses 108491956 # Number of integer alu accesses 6018968SN/Asystem.cpu0.num_fp_alu_accesses 0 # Number of float alu accesses 60210091Snilay@cs.wisc.edusystem.cpu0.num_func_calls 1055514 # number of times a function call or return occured 60310091Snilay@cs.wisc.edusystem.cpu0.num_conditional_control_insts 10262377 # number of instructions that are conditional controls 60410091Snilay@cs.wisc.edusystem.cpu0.num_int_insts 108491956 # number of integer instructions 6058968SN/Asystem.cpu0.num_fp_insts 0 # number of float instructions 60610091Snilay@cs.wisc.edusystem.cpu0.num_int_register_reads 204960312 # number of times the integer registers were read 60710091Snilay@cs.wisc.edusystem.cpu0.num_int_register_writes 92002723 # number of times the integer registers were written 6088968SN/Asystem.cpu0.num_fp_register_reads 0 # number of times the floating registers were read 6098968SN/Asystem.cpu0.num_fp_register_writes 0 # number of times the floating registers were written 61010091Snilay@cs.wisc.edusystem.cpu0.num_cc_register_reads 62457106 # number of times the CC registers were read 61110091Snilay@cs.wisc.edusystem.cpu0.num_cc_register_writes 44909896 # number of times the CC registers were written 61210091Snilay@cs.wisc.edusystem.cpu0.num_mem_refs 12954199 # number of memory refs 61310091Snilay@cs.wisc.edusystem.cpu0.num_load_insts 7847946 # Number of load instructions 61410091Snilay@cs.wisc.edusystem.cpu0.num_store_insts 5106253 # Number of store instructions 61510091Snilay@cs.wisc.edusystem.cpu0.num_idle_cycles 10082159440.950100 # Number of idle cycles 61610091Snilay@cs.wisc.edusystem.cpu0.num_busy_cycles 526834059.049901 # Number of busy cycles 61710091Snilay@cs.wisc.edusystem.cpu0.not_idle_fraction 0.049659 # Percentage of non-idle cycles 61810091Snilay@cs.wisc.edusystem.cpu0.idle_fraction 0.950341 # Percentage of idle cycles 61910091Snilay@cs.wisc.edusystem.cpu0.Branches 11678784 # Number of branches fetched 6208968SN/Asystem.cpu0.kern.inst.arm 0 # number of arm instructions executed 6218968SN/Asystem.cpu0.kern.inst.quiesce 0 # number of quiesce instructions executed 62210036SAli.Saidi@ARM.comsystem.cpu1.apic_clk_domain.clock 8000 # Clock period in ticks 62310091Snilay@cs.wisc.edusystem.cpu1.numCycles 10606073624 # number of cpu cycles simulated 6248968SN/Asystem.cpu1.numWorkItemsStarted 0 # number of work items this cpu started 6258968SN/Asystem.cpu1.numWorkItemsCompleted 0 # number of work items this cpu completed 62610091Snilay@cs.wisc.edusystem.cpu1.committedInsts 46603518 # Number of instructions committed 62710091Snilay@cs.wisc.edusystem.cpu1.committedOps 89333358 # Number of ops (including micro ops) committed 62810091Snilay@cs.wisc.edusystem.cpu1.num_int_alu_accesses 85695486 # Number of integer alu accesses 6298968SN/Asystem.cpu1.num_fp_alu_accesses 0 # Number of float alu accesses 63010091Snilay@cs.wisc.edusystem.cpu1.num_func_calls 1689173 # number of times a function call or return occured 63110091Snilay@cs.wisc.edusystem.cpu1.num_conditional_control_insts 7994727 # number of instructions that are conditional controls 63210091Snilay@cs.wisc.edusystem.cpu1.num_int_insts 85695486 # number of integer instructions 6338968SN/Asystem.cpu1.num_fp_insts 0 # number of float instructions 63410091Snilay@cs.wisc.edusystem.cpu1.num_int_register_reads 165899619 # number of times the integer registers were read 63510091Snilay@cs.wisc.edusystem.cpu1.num_int_register_writes 70976415 # number of times the integer registers were written 6368968SN/Asystem.cpu1.num_fp_register_reads 0 # number of times the floating registers were read 6378968SN/Asystem.cpu1.num_fp_register_writes 0 # number of times the floating registers were written 63810091Snilay@cs.wisc.edusystem.cpu1.num_cc_register_reads 49188622 # number of times the CC registers were read 63910091Snilay@cs.wisc.edusystem.cpu1.num_cc_register_writes 31805425 # number of times the CC registers were written 64010091Snilay@cs.wisc.edusystem.cpu1.num_mem_refs 13507073 # number of memory refs 64110091Snilay@cs.wisc.edusystem.cpu1.num_load_insts 8734970 # Number of load instructions 64210091Snilay@cs.wisc.edusystem.cpu1.num_store_insts 4772103 # Number of store instructions 64310091Snilay@cs.wisc.edusystem.cpu1.num_idle_cycles 10285699632.922689 # Number of idle cycles 64410091Snilay@cs.wisc.edusystem.cpu1.num_busy_cycles 320373991.077311 # Number of busy cycles 64510091Snilay@cs.wisc.edusystem.cpu1.not_idle_fraction 0.030207 # Percentage of non-idle cycles 64610091Snilay@cs.wisc.edusystem.cpu1.idle_fraction 0.969793 # Percentage of idle cycles 64710091Snilay@cs.wisc.edusystem.cpu1.Branches 10261767 # Number of branches fetched 6488968SN/Asystem.cpu1.kern.inst.arm 0 # number of arm instructions executed 6498968SN/Asystem.cpu1.kern.inst.quiesce 0 # number of quiesce instructions executed 65010091Snilay@cs.wisc.edusystem.ruby.network.routers0.throttle0.link_utilization 0.041639 65110091Snilay@cs.wisc.edusystem.ruby.network.routers0.throttle0.msg_count.Request_Control::0 42551 65210091Snilay@cs.wisc.edusystem.ruby.network.routers0.throttle0.msg_count.Response_Data::1 918114 65310091Snilay@cs.wisc.edusystem.ruby.network.routers0.throttle0.msg_count.Response_Control::1 529410 65410091Snilay@cs.wisc.edusystem.ruby.network.routers0.throttle0.msg_bytes.Request_Control::0 340408 65510091Snilay@cs.wisc.edusystem.ruby.network.routers0.throttle0.msg_bytes.Response_Data::1 66104208 65610091Snilay@cs.wisc.edusystem.ruby.network.routers0.throttle0.msg_bytes.Response_Control::1 4235280 65710091Snilay@cs.wisc.edusystem.ruby.network.routers0.throttle1.link_utilization 0.023036 65810091Snilay@cs.wisc.edusystem.ruby.network.routers0.throttle1.msg_count.Control::0 930345 65910091Snilay@cs.wisc.edusystem.ruby.network.routers0.throttle1.msg_count.Response_Data::1 40412 66010091Snilay@cs.wisc.edusystem.ruby.network.routers0.throttle1.msg_count.Response_Control::1 16233 66110091Snilay@cs.wisc.edusystem.ruby.network.routers0.throttle1.msg_count.Response_Control::2 541988 66210091Snilay@cs.wisc.edusystem.ruby.network.routers0.throttle1.msg_count.Writeback_Data::0 316326 66310091Snilay@cs.wisc.edusystem.ruby.network.routers0.throttle1.msg_count.Writeback_Data::1 73 66410091Snilay@cs.wisc.edusystem.ruby.network.routers0.throttle1.msg_count.Writeback_Control::0 187843 66510091Snilay@cs.wisc.edusystem.ruby.network.routers0.throttle1.msg_bytes.Control::0 7442760 66610091Snilay@cs.wisc.edusystem.ruby.network.routers0.throttle1.msg_bytes.Response_Data::1 2909664 66710091Snilay@cs.wisc.edusystem.ruby.network.routers0.throttle1.msg_bytes.Response_Control::1 129864 66810091Snilay@cs.wisc.edusystem.ruby.network.routers0.throttle1.msg_bytes.Response_Control::2 4335904 66910091Snilay@cs.wisc.edusystem.ruby.network.routers0.throttle1.msg_bytes.Writeback_Data::0 22775472 67010091Snilay@cs.wisc.edusystem.ruby.network.routers0.throttle1.msg_bytes.Writeback_Data::1 5256 67110091Snilay@cs.wisc.edusystem.ruby.network.routers0.throttle1.msg_bytes.Writeback_Control::0 1502744 67210091Snilay@cs.wisc.edusystem.ruby.network.routers1.throttle0.link_utilization 0.078726 67310091Snilay@cs.wisc.edusystem.ruby.network.routers1.throttle0.msg_count.Request_Control::0 38847 67410091Snilay@cs.wisc.edusystem.ruby.network.routers1.throttle0.msg_count.Response_Data::1 1718430 67510091Snilay@cs.wisc.edusystem.ruby.network.routers1.throttle0.msg_count.Response_Control::1 1199317 67610091Snilay@cs.wisc.edusystem.ruby.network.routers1.throttle0.msg_bytes.Request_Control::0 310776 67710091Snilay@cs.wisc.edusystem.ruby.network.routers1.throttle0.msg_bytes.Response_Data::1 123726960 67810091Snilay@cs.wisc.edusystem.ruby.network.routers1.throttle0.msg_bytes.Response_Control::1 9594536 67910091Snilay@cs.wisc.edusystem.ruby.network.routers1.throttle1.link_utilization 0.030645 68010091Snilay@cs.wisc.edusystem.ruby.network.routers1.throttle1.msg_count.Control::0 1728343 68110091Snilay@cs.wisc.edusystem.ruby.network.routers1.throttle1.msg_count.Response_Data::1 33527 68210091Snilay@cs.wisc.edusystem.ruby.network.routers1.throttle1.msg_count.Response_Control::1 16083 68310091Snilay@cs.wisc.edusystem.ruby.network.routers1.throttle1.msg_count.Response_Control::2 1215698 68410091Snilay@cs.wisc.edusystem.ruby.network.routers1.throttle1.msg_count.Writeback_Data::0 257501 68510091Snilay@cs.wisc.edusystem.ruby.network.routers1.throttle1.msg_count.Writeback_Data::1 203 68610091Snilay@cs.wisc.edusystem.ruby.network.routers1.throttle1.msg_count.Writeback_Control::0 921073 68710091Snilay@cs.wisc.edusystem.ruby.network.routers1.throttle1.msg_bytes.Control::0 13826744 68810091Snilay@cs.wisc.edusystem.ruby.network.routers1.throttle1.msg_bytes.Response_Data::1 2413944 68910091Snilay@cs.wisc.edusystem.ruby.network.routers1.throttle1.msg_bytes.Response_Control::1 128664 69010091Snilay@cs.wisc.edusystem.ruby.network.routers1.throttle1.msg_bytes.Response_Control::2 9725584 69110091Snilay@cs.wisc.edusystem.ruby.network.routers1.throttle1.msg_bytes.Writeback_Data::0 18540072 69210091Snilay@cs.wisc.edusystem.ruby.network.routers1.throttle1.msg_bytes.Writeback_Data::1 14616 69310091Snilay@cs.wisc.edusystem.ruby.network.routers1.throttle1.msg_bytes.Writeback_Control::0 7368584 69410091Snilay@cs.wisc.edusystem.ruby.network.routers2.throttle0.link_utilization 0.059393 69510091Snilay@cs.wisc.edusystem.ruby.network.routers2.throttle0.msg_count.Control::0 2658688 69610091Snilay@cs.wisc.edusystem.ruby.network.routers2.throttle0.msg_count.Response_Data::1 198942 69710091Snilay@cs.wisc.edusystem.ruby.network.routers2.throttle0.msg_count.Response_Control::1 119244 69810091Snilay@cs.wisc.edusystem.ruby.network.routers2.throttle0.msg_count.Response_Control::2 1757686 69910091Snilay@cs.wisc.edusystem.ruby.network.routers2.throttle0.msg_count.Writeback_Data::0 573827 70010091Snilay@cs.wisc.edusystem.ruby.network.routers2.throttle0.msg_count.Writeback_Data::1 276 70110091Snilay@cs.wisc.edusystem.ruby.network.routers2.throttle0.msg_count.Writeback_Control::0 1108916 70210091Snilay@cs.wisc.edusystem.ruby.network.routers2.throttle0.msg_bytes.Control::0 21269504 70310091Snilay@cs.wisc.edusystem.ruby.network.routers2.throttle0.msg_bytes.Response_Data::1 14323824 70410091Snilay@cs.wisc.edusystem.ruby.network.routers2.throttle0.msg_bytes.Response_Control::1 953952 70510091Snilay@cs.wisc.edusystem.ruby.network.routers2.throttle0.msg_bytes.Response_Control::2 14061488 70610091Snilay@cs.wisc.edusystem.ruby.network.routers2.throttle0.msg_bytes.Writeback_Data::0 41315544 70710091Snilay@cs.wisc.edusystem.ruby.network.routers2.throttle0.msg_bytes.Writeback_Data::1 19872 70810091Snilay@cs.wisc.edusystem.ruby.network.routers2.throttle0.msg_bytes.Writeback_Control::0 8871328 70910091Snilay@cs.wisc.edusystem.ruby.network.routers2.throttle1.link_utilization 0.123158 71010091Snilay@cs.wisc.edusystem.ruby.network.routers2.throttle1.msg_count.Control::0 173809 71110091Snilay@cs.wisc.edusystem.ruby.network.routers2.throttle1.msg_count.Request_Control::0 79755 71210091Snilay@cs.wisc.edusystem.ruby.network.routers2.throttle1.msg_count.Response_Data::1 2684559 71310091Snilay@cs.wisc.edusystem.ruby.network.routers2.throttle1.msg_count.Response_Control::1 1716987 71410091Snilay@cs.wisc.edusystem.ruby.network.routers2.throttle1.msg_bytes.Control::0 1390472 71510091Snilay@cs.wisc.edusystem.ruby.network.routers2.throttle1.msg_bytes.Request_Control::0 638040 71610091Snilay@cs.wisc.edusystem.ruby.network.routers2.throttle1.msg_bytes.Response_Data::1 193288248 71710091Snilay@cs.wisc.edusystem.ruby.network.routers2.throttle1.msg_bytes.Response_Control::1 13735896 71810091Snilay@cs.wisc.edusystem.ruby.network.routers3.throttle0.link_utilization 0.005207 71910091Snilay@cs.wisc.edusystem.ruby.network.routers3.throttle0.msg_count.Control::0 173809 72010091Snilay@cs.wisc.edusystem.ruby.network.routers3.throttle0.msg_count.Response_Data::1 96821 72110091Snilay@cs.wisc.edusystem.ruby.network.routers3.throttle0.msg_count.Response_Control::1 12100 72210091Snilay@cs.wisc.edusystem.ruby.network.routers3.throttle0.msg_count.Writeback_Control::0 47547 72310091Snilay@cs.wisc.edusystem.ruby.network.routers3.throttle0.msg_bytes.Control::0 1390472 72410091Snilay@cs.wisc.edusystem.ruby.network.routers3.throttle0.msg_bytes.Response_Data::1 6971112 72510091Snilay@cs.wisc.edusystem.ruby.network.routers3.throttle0.msg_bytes.Response_Control::1 96800 72610091Snilay@cs.wisc.edusystem.ruby.network.routers3.throttle0.msg_bytes.Writeback_Control::0 380376 72710091Snilay@cs.wisc.edusystem.ruby.network.routers3.throttle1.link_utilization 0.008149 72810091Snilay@cs.wisc.edusystem.ruby.network.routers3.throttle1.msg_count.Response_Data::1 174620 72910091Snilay@cs.wisc.edusystem.ruby.network.routers3.throttle1.msg_count.Response_Control::1 110768 7309978SN/Asystem.ruby.network.routers3.throttle1.msg_count.Writeback_Control::1 46736 73110091Snilay@cs.wisc.edusystem.ruby.network.routers3.throttle1.msg_bytes.Response_Data::1 12572640 73210091Snilay@cs.wisc.edusystem.ruby.network.routers3.throttle1.msg_bytes.Response_Control::1 886144 7339978SN/Asystem.ruby.network.routers3.throttle1.msg_bytes.Writeback_Control::1 373888 7349978SN/Asystem.ruby.network.routers4.throttle0.link_utilization 0.000255 73510091Snilay@cs.wisc.edusystem.ruby.network.routers4.throttle0.msg_count.Response_Data::1 811 7369978SN/Asystem.ruby.network.routers4.throttle0.msg_count.Writeback_Control::1 46736 73710091Snilay@cs.wisc.edusystem.ruby.network.routers4.throttle0.msg_bytes.Response_Data::1 58392 7389978SN/Asystem.ruby.network.routers4.throttle0.msg_bytes.Writeback_Control::1 373888 7399978SN/Asystem.ruby.network.routers4.throttle1.link_utilization 0.000224 74010091Snilay@cs.wisc.edusystem.ruby.network.routers4.throttle1.msg_count.Writeback_Control::0 47547 74110091Snilay@cs.wisc.edusystem.ruby.network.routers4.throttle1.msg_bytes.Writeback_Control::0 380376 74210091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle0.link_utilization 0.041639 74310091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle0.msg_count.Request_Control::0 42551 74410091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle0.msg_count.Response_Data::1 918114 74510091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle0.msg_count.Response_Control::1 529410 74610091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle0.msg_bytes.Request_Control::0 340408 74710091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle0.msg_bytes.Response_Data::1 66104208 74810091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle0.msg_bytes.Response_Control::1 4235280 74910091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle1.link_utilization 0.078726 75010091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle1.msg_count.Request_Control::0 38847 75110091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle1.msg_count.Response_Data::1 1718430 75210091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle1.msg_count.Response_Control::1 1199317 75310091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle1.msg_bytes.Request_Control::0 310776 75410091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle1.msg_bytes.Response_Data::1 123726960 75510091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle1.msg_bytes.Response_Control::1 9594536 75610091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle2.link_utilization 0.059393 75710091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle2.msg_count.Control::0 2658688 75810091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle2.msg_count.Response_Data::1 198942 75910091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle2.msg_count.Response_Control::1 119244 76010091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle2.msg_count.Response_Control::2 1757686 76110091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle2.msg_count.Writeback_Data::0 573827 76210091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle2.msg_count.Writeback_Data::1 276 76310091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle2.msg_count.Writeback_Control::0 1108916 76410091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle2.msg_bytes.Control::0 21269504 76510091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle2.msg_bytes.Response_Data::1 14323824 76610091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle2.msg_bytes.Response_Control::1 953952 76710091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle2.msg_bytes.Response_Control::2 14061488 76810091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle2.msg_bytes.Writeback_Data::0 41315544 76910091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle2.msg_bytes.Writeback_Data::1 19872 77010091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle2.msg_bytes.Writeback_Control::0 8871328 77110091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle3.link_utilization 0.005207 77210091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle3.msg_count.Control::0 173809 77310091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle3.msg_count.Response_Data::1 96821 77410091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle3.msg_count.Response_Control::1 12100 77510091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle3.msg_count.Writeback_Control::0 47547 77610091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle3.msg_bytes.Control::0 1390472 77710091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle3.msg_bytes.Response_Data::1 6971112 77810091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle3.msg_bytes.Response_Control::1 96800 77910091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle3.msg_bytes.Writeback_Control::0 380376 7809978SN/Asystem.ruby.network.routers5.throttle4.link_utilization 0.000255 78110091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle4.msg_count.Response_Data::1 811 7829978SN/Asystem.ruby.network.routers5.throttle4.msg_count.Writeback_Control::1 46736 78310091Snilay@cs.wisc.edusystem.ruby.network.routers5.throttle4.msg_bytes.Response_Data::1 58392 7849978SN/Asystem.ruby.network.routers5.throttle4.msg_bytes.Writeback_Control::1 373888 78510013Snilay@cs.wisc.edusystem.ruby.delayVCHist.vnet_0::bucket_size 2 # delay histogram for vnet_0 78610013Snilay@cs.wisc.edusystem.ruby.delayVCHist.vnet_0::max_bucket 19 # delay histogram for vnet_0 78710091Snilay@cs.wisc.edusystem.ruby.delayVCHist.vnet_0::samples 6099117 # delay histogram for vnet_0 78810091Snilay@cs.wisc.edusystem.ruby.delayVCHist.vnet_0::mean 0.377316 # delay histogram for vnet_0 78910091Snilay@cs.wisc.edusystem.ruby.delayVCHist.vnet_0::stdev 1.170385 # delay histogram for vnet_0 79010091Snilay@cs.wisc.edusystem.ruby.delayVCHist.vnet_0 | 5524398 90.58% 90.58% | 438 0.01% 90.58% | 573820 9.41% 99.99% | 170 0.00% 100.00% | 238 0.00% 100.00% | 9 0.00% 100.00% | 44 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_0 79110091Snilay@cs.wisc.edusystem.ruby.delayVCHist.vnet_0::total 6099117 # delay histogram for vnet_0 79210013Snilay@cs.wisc.edusystem.ruby.delayVCHist.vnet_1::bucket_size 1 # delay histogram for vnet_1 79310013Snilay@cs.wisc.edusystem.ruby.delayVCHist.vnet_1::max_bucket 9 # delay histogram for vnet_1 79410091Snilay@cs.wisc.edusystem.ruby.delayVCHist.vnet_1::samples 4683733 # delay histogram for vnet_1 79510091Snilay@cs.wisc.edusystem.ruby.delayVCHist.vnet_1::mean 0.022443 # delay histogram for vnet_1 79610091Snilay@cs.wisc.edusystem.ruby.delayVCHist.vnet_1::stdev 0.297350 # delay histogram for vnet_1 79710091Snilay@cs.wisc.edusystem.ruby.delayVCHist.vnet_1 | 4656826 99.43% 99.43% | 417 0.01% 99.43% | 407 0.01% 99.44% | 552 0.01% 99.45% | 25430 0.54% 100.00% | 99 0.00% 100.00% | 0 0.00% 100.00% | 1 0.00% 100.00% | 1 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_1 79810091Snilay@cs.wisc.edusystem.ruby.delayVCHist.vnet_1::total 4683733 # delay histogram for vnet_1 79910013Snilay@cs.wisc.edusystem.ruby.delayVCHist.vnet_2::bucket_size 1 # delay histogram for vnet_2 80010013Snilay@cs.wisc.edusystem.ruby.delayVCHist.vnet_2::max_bucket 9 # delay histogram for vnet_2 80110091Snilay@cs.wisc.edusystem.ruby.delayVCHist.vnet_2::samples 81398 # delay histogram for vnet_2 80210091Snilay@cs.wisc.edusystem.ruby.delayVCHist.vnet_2::mean 0.013600 # delay histogram for vnet_2 80310091Snilay@cs.wisc.edusystem.ruby.delayVCHist.vnet_2::stdev 0.216236 # delay histogram for vnet_2 80410091Snilay@cs.wisc.edusystem.ruby.delayVCHist.vnet_2 | 80998 99.51% 99.51% | 98 0.12% 99.63% | 74 0.09% 99.72% | 96 0.12% 99.84% | 98 0.12% 99.96% | 30 0.04% 100.00% | 1 0.00% 100.00% | 0 0.00% 100.00% | 2 0.00% 100.00% | 1 0.00% 100.00% # delay histogram for vnet_2 80510091Snilay@cs.wisc.edusystem.ruby.delayVCHist.vnet_2::total 81398 # delay histogram for vnet_2 80610013Snilay@cs.wisc.edusystem.ruby.LD.latency_hist::bucket_size 16 80710013Snilay@cs.wisc.edusystem.ruby.LD.latency_hist::max_bucket 159 80810091Snilay@cs.wisc.edusystem.ruby.LD.latency_hist::samples 14938551 80910091Snilay@cs.wisc.edusystem.ruby.LD.latency_hist::mean 4.746751 81010091Snilay@cs.wisc.edusystem.ruby.LD.latency_hist::gmean 3.589398 81110091Snilay@cs.wisc.edusystem.ruby.LD.latency_hist::stdev 6.551138 81210091Snilay@cs.wisc.edusystem.ruby.LD.latency_hist | 13551480 90.71% 90.71% | 1355950 9.08% 99.79% | 110 0.00% 99.79% | 0 0.00% 99.79% | 9645 0.06% 99.86% | 172 0.00% 99.86% | 20174 0.14% 99.99% | 799 0.01% 100.00% | 192 0.00% 100.00% | 29 0.00% 100.00% 81310091Snilay@cs.wisc.edusystem.ruby.LD.latency_hist::total 14938551 81410013Snilay@cs.wisc.edusystem.ruby.LD.hit_latency_hist::bucket_size 1 81510013Snilay@cs.wisc.edusystem.ruby.LD.hit_latency_hist::max_bucket 9 81610091Snilay@cs.wisc.edusystem.ruby.LD.hit_latency_hist::samples 13551480 81710013Snilay@cs.wisc.edusystem.ruby.LD.hit_latency_hist::mean 3 81810013Snilay@cs.wisc.edusystem.ruby.LD.hit_latency_hist::gmean 3.000000 81910091Snilay@cs.wisc.edusystem.ruby.LD.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 13551480 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 82010091Snilay@cs.wisc.edusystem.ruby.LD.hit_latency_hist::total 13551480 82110013Snilay@cs.wisc.edusystem.ruby.LD.miss_latency_hist::bucket_size 16 82210013Snilay@cs.wisc.edusystem.ruby.LD.miss_latency_hist::max_bucket 159 82310091Snilay@cs.wisc.edusystem.ruby.LD.miss_latency_hist::samples 1387071 82410091Snilay@cs.wisc.edusystem.ruby.LD.miss_latency_hist::mean 21.812251 82510091Snilay@cs.wisc.edusystem.ruby.LD.miss_latency_hist::gmean 20.706039 82610091Snilay@cs.wisc.edusystem.ruby.LD.miss_latency_hist::stdev 11.881658 82710091Snilay@cs.wisc.edusystem.ruby.LD.miss_latency_hist | 0 0.00% 0.00% | 1355950 97.76% 97.76% | 110 0.01% 97.76% | 0 0.00% 97.76% | 9645 0.70% 98.46% | 172 0.01% 98.47% | 20174 1.45% 99.93% | 799 0.06% 99.98% | 192 0.01% 100.00% | 29 0.00% 100.00% 82810091Snilay@cs.wisc.edusystem.ruby.LD.miss_latency_hist::total 1387071 82910013Snilay@cs.wisc.edusystem.ruby.ST.latency_hist::bucket_size 32 83010013Snilay@cs.wisc.edusystem.ruby.ST.latency_hist::max_bucket 319 83110091Snilay@cs.wisc.edusystem.ruby.ST.latency_hist::samples 9501513 83210091Snilay@cs.wisc.edusystem.ruby.ST.latency_hist::mean 4.608297 83310091Snilay@cs.wisc.edusystem.ruby.ST.latency_hist::gmean 3.286796 83410091Snilay@cs.wisc.edusystem.ruby.ST.latency_hist::stdev 10.645241 83510091Snilay@cs.wisc.edusystem.ruby.ST.latency_hist | 9375847 98.68% 98.68% | 22 0.00% 98.68% | 64166 0.68% 99.35% | 60838 0.64% 99.99% | 636 0.01% 100.00% | 4 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 83610091Snilay@cs.wisc.edusystem.ruby.ST.latency_hist::total 9501513 83710013Snilay@cs.wisc.edusystem.ruby.ST.hit_latency_hist::bucket_size 1 83810013Snilay@cs.wisc.edusystem.ruby.ST.hit_latency_hist::max_bucket 9 83910091Snilay@cs.wisc.edusystem.ruby.ST.hit_latency_hist::samples 9151298 84010013Snilay@cs.wisc.edusystem.ruby.ST.hit_latency_hist::mean 3 84110013Snilay@cs.wisc.edusystem.ruby.ST.hit_latency_hist::gmean 3.000000 84210091Snilay@cs.wisc.edusystem.ruby.ST.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 9151298 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 84310091Snilay@cs.wisc.edusystem.ruby.ST.hit_latency_hist::total 9151298 84410013Snilay@cs.wisc.edusystem.ruby.ST.miss_latency_hist::bucket_size 32 84510013Snilay@cs.wisc.edusystem.ruby.ST.miss_latency_hist::max_bucket 319 84610091Snilay@cs.wisc.edusystem.ruby.ST.miss_latency_hist::samples 350215 84710091Snilay@cs.wisc.edusystem.ruby.ST.miss_latency_hist::mean 46.633933 84810091Snilay@cs.wisc.edusystem.ruby.ST.miss_latency_hist::gmean 35.718031 84910091Snilay@cs.wisc.edusystem.ruby.ST.miss_latency_hist::stdev 35.223868 85010091Snilay@cs.wisc.edusystem.ruby.ST.miss_latency_hist | 224549 64.12% 64.12% | 22 0.01% 64.12% | 64166 18.32% 82.45% | 60838 17.37% 99.82% | 636 0.18% 100.00% | 4 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 85110091Snilay@cs.wisc.edusystem.ruby.ST.miss_latency_hist::total 350215 85210013Snilay@cs.wisc.edusystem.ruby.IFETCH.latency_hist::bucket_size 16 85310013Snilay@cs.wisc.edusystem.ruby.IFETCH.latency_hist::max_bucket 159 85410091Snilay@cs.wisc.edusystem.ruby.IFETCH.latency_hist::samples 126638834 85510091Snilay@cs.wisc.edusystem.ruby.IFETCH.latency_hist::mean 3.112928 85610091Snilay@cs.wisc.edusystem.ruby.IFETCH.latency_hist::gmean 3.036561 85710091Snilay@cs.wisc.edusystem.ruby.IFETCH.latency_hist::stdev 1.654509 85810091Snilay@cs.wisc.edusystem.ruby.IFETCH.latency_hist | 125821437 99.35% 99.35% | 801961 0.63% 99.99% | 5 0.00% 99.99% | 0 0.00% 99.99% | 3920 0.00% 99.99% | 23 0.00% 99.99% | 11193 0.01% 100.00% | 179 0.00% 100.00% | 116 0.00% 100.00% | 0 0.00% 100.00% 85910091Snilay@cs.wisc.edusystem.ruby.IFETCH.latency_hist::total 126638834 86010013Snilay@cs.wisc.edusystem.ruby.IFETCH.hit_latency_hist::bucket_size 1 86110013Snilay@cs.wisc.edusystem.ruby.IFETCH.hit_latency_hist::max_bucket 9 86210091Snilay@cs.wisc.edusystem.ruby.IFETCH.hit_latency_hist::samples 125821437 86310013Snilay@cs.wisc.edusystem.ruby.IFETCH.hit_latency_hist::mean 3 86410013Snilay@cs.wisc.edusystem.ruby.IFETCH.hit_latency_hist::gmean 3.000000 86510091Snilay@cs.wisc.edusystem.ruby.IFETCH.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 125821437 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 86610091Snilay@cs.wisc.edusystem.ruby.IFETCH.hit_latency_hist::total 125821437 86710013Snilay@cs.wisc.edusystem.ruby.IFETCH.miss_latency_hist::bucket_size 16 86810013Snilay@cs.wisc.edusystem.ruby.IFETCH.miss_latency_hist::max_bucket 159 86910091Snilay@cs.wisc.edusystem.ruby.IFETCH.miss_latency_hist::samples 817397 87010091Snilay@cs.wisc.edusystem.ruby.IFETCH.miss_latency_hist::mean 20.495847 87110091Snilay@cs.wisc.edusystem.ruby.IFETCH.miss_latency_hist::gmean 19.596119 87210091Snilay@cs.wisc.edusystem.ruby.IFETCH.miss_latency_hist::stdev 10.953317 87310091Snilay@cs.wisc.edusystem.ruby.IFETCH.miss_latency_hist | 0 0.00% 0.00% | 801961 98.11% 98.11% | 5 0.00% 98.11% | 0 0.00% 98.11% | 3920 0.48% 98.59% | 23 0.00% 98.59% | 11193 1.37% 99.96% | 179 0.02% 99.99% | 116 0.01% 100.00% | 0 0.00% 100.00% 87410091Snilay@cs.wisc.edusystem.ruby.IFETCH.miss_latency_hist::total 817397 87510013Snilay@cs.wisc.edusystem.ruby.RMW_Read.latency_hist::bucket_size 16 87610013Snilay@cs.wisc.edusystem.ruby.RMW_Read.latency_hist::max_bucket 159 87710091Snilay@cs.wisc.edusystem.ruby.RMW_Read.latency_hist::samples 494972 87810091Snilay@cs.wisc.edusystem.ruby.RMW_Read.latency_hist::mean 5.895354 87910091Snilay@cs.wisc.edusystem.ruby.RMW_Read.latency_hist::gmean 3.951188 88010091Snilay@cs.wisc.edusystem.ruby.RMW_Read.latency_hist::stdev 8.211091 88110091Snilay@cs.wisc.edusystem.ruby.RMW_Read.latency_hist | 429307 86.73% 86.73% | 64259 12.98% 99.72% | 8 0.00% 99.72% | 0 0.00% 99.72% | 988 0.20% 99.92% | 20 0.00% 99.92% | 359 0.07% 99.99% | 26 0.01% 100.00% | 5 0.00% 100.00% | 0 0.00% 100.00% 88210091Snilay@cs.wisc.edusystem.ruby.RMW_Read.latency_hist::total 494972 88310013Snilay@cs.wisc.edusystem.ruby.RMW_Read.hit_latency_hist::bucket_size 1 88410013Snilay@cs.wisc.edusystem.ruby.RMW_Read.hit_latency_hist::max_bucket 9 88510091Snilay@cs.wisc.edusystem.ruby.RMW_Read.hit_latency_hist::samples 429307 88610013Snilay@cs.wisc.edusystem.ruby.RMW_Read.hit_latency_hist::mean 3 88710013Snilay@cs.wisc.edusystem.ruby.RMW_Read.hit_latency_hist::gmean 3.000000 88810091Snilay@cs.wisc.edusystem.ruby.RMW_Read.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 429307 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 88910091Snilay@cs.wisc.edusystem.ruby.RMW_Read.hit_latency_hist::total 429307 89010013Snilay@cs.wisc.edusystem.ruby.RMW_Read.miss_latency_hist::bucket_size 16 89110013Snilay@cs.wisc.edusystem.ruby.RMW_Read.miss_latency_hist::max_bucket 159 89210091Snilay@cs.wisc.edusystem.ruby.RMW_Read.miss_latency_hist::samples 65665 89310091Snilay@cs.wisc.edusystem.ruby.RMW_Read.miss_latency_hist::mean 24.824701 89410091Snilay@cs.wisc.edusystem.ruby.RMW_Read.miss_latency_hist::gmean 23.916335 89510091Snilay@cs.wisc.edusystem.ruby.RMW_Read.miss_latency_hist::stdev 9.751364 89610091Snilay@cs.wisc.edusystem.ruby.RMW_Read.miss_latency_hist | 0 0.00% 0.00% | 64259 97.86% 97.86% | 8 0.01% 97.87% | 0 0.00% 97.87% | 988 1.50% 99.38% | 20 0.03% 99.41% | 359 0.55% 99.95% | 26 0.04% 99.99% | 5 0.01% 100.00% | 0 0.00% 100.00% 89710091Snilay@cs.wisc.edusystem.ruby.RMW_Read.miss_latency_hist::total 65665 89810013Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Read.latency_hist::bucket_size 16 89910013Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Read.latency_hist::max_bucket 159 90010091Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Read.latency_hist::samples 339641 90110091Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Read.latency_hist::mean 5.237030 90210091Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Read.latency_hist::gmean 3.762043 90310091Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Read.latency_hist::stdev 6.719404 90410091Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Read.latency_hist | 301301 88.71% 88.71% | 38004 11.19% 99.90% | 11 0.00% 99.90% | 0 0.00% 99.90% | 174 0.05% 99.96% | 4 0.00% 99.96% | 138 0.04% 100.00% | 6 0.00% 100.00% | 3 0.00% 100.00% | 0 0.00% 100.00% 90510091Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Read.latency_hist::total 339641 90610013Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Read.hit_latency_hist::bucket_size 1 90710013Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Read.hit_latency_hist::max_bucket 9 90810091Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Read.hit_latency_hist::samples 301301 90910013Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Read.hit_latency_hist::mean 3 91010013Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Read.hit_latency_hist::gmean 3.000000 91110091Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Read.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 301301 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 91210091Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Read.hit_latency_hist::total 301301 91310013Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Read.miss_latency_hist::bucket_size 16 91410013Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Read.miss_latency_hist::max_bucket 159 91510091Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Read.miss_latency_hist::samples 38340 91610091Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Read.miss_latency_hist::mean 22.817084 91710091Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Read.miss_latency_hist::gmean 22.281764 91810091Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Read.miss_latency_hist::stdev 7.182388 91910091Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Read.miss_latency_hist | 0 0.00% 0.00% | 38004 99.12% 99.12% | 11 0.03% 99.15% | 0 0.00% 99.15% | 174 0.45% 99.61% | 4 0.01% 99.62% | 138 0.36% 99.98% | 6 0.02% 99.99% | 3 0.01% 100.00% | 0 0.00% 100.00% 92010091Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Read.miss_latency_hist::total 38340 92110013Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Write.latency_hist::bucket_size 1 92210013Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Write.latency_hist::max_bucket 9 92310091Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Write.latency_hist::samples 339641 92410013Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Write.latency_hist::mean 3 92510013Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Write.latency_hist::gmean 3.000000 92610091Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Write.latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 339641 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 92710091Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Write.latency_hist::total 339641 92810013Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Write.hit_latency_hist::bucket_size 1 92910013Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Write.hit_latency_hist::max_bucket 9 93010091Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Write.hit_latency_hist::samples 339641 93110013Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Write.hit_latency_hist::mean 3 93210013Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Write.hit_latency_hist::gmean 3.000000 93310091Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Write.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 339641 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 93410091Snilay@cs.wisc.edusystem.ruby.Locked_RMW_Write.hit_latency_hist::total 339641 93510091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.Load | 6584073 44.07% 44.07% | 8354478 55.93% 100.00% 93610091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.Load::total 14938551 93710091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.Ifetch | 70408272 55.60% 55.60% | 56230567 44.40% 100.00% 93810091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.Ifetch::total 126638839 93910091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.Store | 5552032 52.01% 52.01% | 5123735 47.99% 100.00% 94010091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.Store::total 10675767 94110091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.Inv | 16306 50.03% 50.03% | 16286 49.97% 100.00% 94210091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.Inv::total 32592 94310091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.L1_Replacement | 902872 34.67% 34.67% | 1701108 65.33% 100.00% 94410091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.L1_Replacement::total 2603980 94510091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.Fwd_GETX | 12078 51.02% 51.02% | 11595 48.98% 100.00% 94610091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.Fwd_GETX::total 23673 94710091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.Fwd_GETS | 14163 56.36% 56.36% | 10966 43.64% 100.00% 94810091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.Fwd_GETS::total 25129 94910013Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.Fwd_GET_INSTR | 4 100.00% 100.00% | 0 0.00% 100.00% 95010013Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.Fwd_GET_INSTR::total 4 95110091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.Data | 779 45.93% 45.93% | 917 54.07% 100.00% 95210091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.Data::total 1696 95310091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.Data_Exclusive | 274579 21.48% 21.48% | 1003754 78.52% 100.00% 95410091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.Data_Exclusive::total 1278333 95510091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.DataS_fromL1 | 10966 43.63% 43.63% | 14167 56.37% 100.00% 95610091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.DataS_fromL1::total 25133 95710091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.Data_all_Acks | 631790 47.45% 47.45% | 699592 52.55% 100.00% 95810091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.Data_all_Acks::total 1331382 95910091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.Ack | 12231 55.23% 55.23% | 9913 44.77% 100.00% 96010091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.Ack::total 22144 96110091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.Ack_all | 13010 54.57% 54.57% | 10830 45.43% 100.00% 96210091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.Ack_all::total 23840 96310091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.WB_Ack | 504169 29.96% 29.96% | 1178574 70.04% 100.00% 96410091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.WB_Ack::total 1682743 96510091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.NP.Load | 306633 22.41% 22.41% | 1061529 77.59% 100.00% 96610091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.NP.Load::total 1368162 96710091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.NP.Ifetch | 358703 43.90% 43.90% | 458427 56.10% 100.00% 96810091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.NP.Ifetch::total 817130 96910091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.NP.Store | 238560 56.70% 56.70% | 182176 43.30% 100.00% 97010091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.NP.Store::total 420736 97110091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.NP.Inv | 5463 60.97% 60.97% | 3497 39.03% 100.00% 97210091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.NP.Inv::total 8960 97310091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.I.Load | 8460 44.74% 44.74% | 10449 55.26% 100.00% 97410091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.I.Load::total 18909 97510091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.I.Ifetch | 106 39.70% 39.70% | 161 60.30% 100.00% 97610091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.I.Ifetch::total 267 97710091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.I.Store | 5652 49.84% 49.84% | 5688 50.16% 100.00% 97810091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.I.Store::total 11340 97910091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.I.L1_Replacement | 8703 52.17% 52.17% | 7980 47.83% 100.00% 98010091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.I.L1_Replacement::total 16683 98110091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.S.Load | 576678 53.66% 53.66% | 497974 46.34% 100.00% 98210091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.S.Load::total 1074652 98310091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.S.Ifetch | 70049459 55.67% 55.67% | 55771978 44.33% 100.00% 98410091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.S.Ifetch::total 125821437 98510091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.S.Store | 12231 55.23% 55.23% | 9913 44.77% 100.00% 98610091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.S.Store::total 22144 98710091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.S.Inv | 10716 46.02% 46.02% | 12567 53.98% 100.00% 98810091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.S.Inv::total 23283 98910091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.S.L1_Replacement | 390000 43.12% 43.12% | 514554 56.88% 100.00% 99010091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.S.L1_Replacement::total 904554 99110091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.E.Load | 1291164 33.50% 33.50% | 2563076 66.50% 100.00% 99210091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.E.Load::total 3854240 99310091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.E.Store | 85252 51.15% 51.15% | 81434 48.85% 100.00% 99410091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.E.Store::total 166686 99510091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.E.Inv | 54 73.97% 73.97% | 19 26.03% 100.00% 99610091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.E.Inv::total 73 99710091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.E.L1_Replacement | 187843 16.94% 16.94% | 921073 83.06% 100.00% 99810091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.E.L1_Replacement::total 1108916 99910091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.E.Fwd_GETX | 212 75.18% 75.18% | 70 24.82% 100.00% 100010091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.E.Fwd_GETX::total 282 100110091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.E.Fwd_GETS | 1012 47.62% 47.62% | 1113 52.38% 100.00% 100210091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.E.Fwd_GETS::total 2125 100310091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.M.Load | 4401138 51.04% 51.04% | 4221450 48.96% 100.00% 100410091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.M.Load::total 8622588 100510091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.M.Store | 5210337 51.82% 51.82% | 4844524 48.18% 100.00% 100610091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.M.Store::total 10054861 100710091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.M.Inv | 73 26.45% 26.45% | 203 73.55% 100.00% 100810091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.M.Inv::total 276 100910091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.M.L1_Replacement | 316326 55.13% 55.13% | 257501 44.87% 100.00% 101010091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.M.L1_Replacement::total 573827 101110091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.M.Fwd_GETX | 11866 50.73% 50.73% | 11525 49.27% 100.00% 101210091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.M.Fwd_GETX::total 23391 101310091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.M.Fwd_GETS | 13151 57.17% 57.17% | 9853 42.83% 100.00% 101410091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.M.Fwd_GETS::total 23004 101510013Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.M.Fwd_GET_INSTR | 4 100.00% 100.00% | 0 0.00% 100.00% 101610013Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.M.Fwd_GET_INSTR::total 4 101710091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.IS.Data_Exclusive | 274579 21.48% 21.48% | 1003754 78.52% 100.00% 101810091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.IS.Data_Exclusive::total 1278333 101910091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.IS.DataS_fromL1 | 10966 43.63% 43.63% | 14167 56.37% 100.00% 102010091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.IS.DataS_fromL1::total 25133 102110091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.IS.Data_all_Acks | 388357 43.10% 43.10% | 512645 56.90% 100.00% 102210091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.IS.Data_all_Acks::total 901002 102310091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.IM.Data | 779 45.93% 45.93% | 917 54.07% 100.00% 102410091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.IM.Data::total 1696 102510091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.IM.Data_all_Acks | 243433 56.56% 56.56% | 186947 43.44% 100.00% 102610091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.IM.Data_all_Acks::total 430380 102710091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.SM.Ack | 12231 55.23% 55.23% | 9913 44.77% 100.00% 102810091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.SM.Ack::total 22144 102910091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.SM.Ack_all | 13010 54.57% 54.57% | 10830 45.43% 100.00% 103010091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.SM.Ack_all::total 23840 103110091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.M_I.Ifetch | 4 80.00% 80.00% | 1 20.00% 100.00% 103210091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.M_I.Ifetch::total 5 103310091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.M_I.WB_Ack | 504169 29.96% 29.96% | 1178574 70.04% 100.00% 103410091Snilay@cs.wisc.edusystem.ruby.L1Cache_Controller.M_I.WB_Ack::total 1682743 103510091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.L1_GET_INSTR 817397 0.00% 0.00% 103610091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.L1_GETS 1387278 0.00% 0.00% 103710091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.L1_GETX 432076 0.00% 0.00% 103810091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.L1_UPGRADE 22144 0.00% 0.00% 103910091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.L1_PUTX 1682743 0.00% 0.00% 104010091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.L2_Replacement 94885 0.00% 0.00% 104110091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.L2_Replacement_clean 12189 0.00% 0.00% 104210091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.Mem_Data 173809 0.00% 0.00% 104310091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.Mem_Ack 108921 0.00% 0.00% 104410091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.WB_Data 23284 0.00% 0.00% 104510091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.WB_Data_clean 2125 0.00% 0.00% 104610091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.Ack 1643 0.00% 0.00% 104710091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.Ack_all 6833 0.00% 0.00% 104810091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.Unblock 25133 0.00% 0.00% 104910091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.Exclusive_Unblock 1732553 0.00% 0.00% 105010091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.MEM_Inv 3694 0.00% 0.00% 105110091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.NP.L1_GET_INSTR 15431 0.00% 0.00% 105210091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.NP.L1_GETS 31011 0.00% 0.00% 105310091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.NP.L1_GETX 127367 0.00% 0.00% 105410091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.SS.L1_GET_INSTR 801934 0.00% 0.00% 105510091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.SS.L1_GETS 83609 0.00% 0.00% 105610091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.SS.L1_GETX 1731 0.00% 0.00% 105710091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.SS.L1_UPGRADE 22144 0.00% 0.00% 105810091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.SS.L2_Replacement 253 0.00% 0.00% 105910091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.SS.L2_Replacement_clean 6503 0.00% 0.00% 106010091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.SS.MEM_Inv 4 0.00% 0.00% 106110013Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.M.L1_GET_INSTR 28 0.00% 0.00% 106210091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.M.L1_GETS 1247322 0.00% 0.00% 106310091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.M.L1_GETX 279305 0.00% 0.00% 106410091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.M.L2_Replacement 94479 0.00% 0.00% 106510091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.M.L2_Replacement_clean 5571 0.00% 0.00% 106610091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.M.MEM_Inv 1762 0.00% 0.00% 106710013Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.MT.L1_GET_INSTR 4 0.00% 0.00% 106810091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.MT.L1_GETS 25129 0.00% 0.00% 106910091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.MT.L1_GETX 23673 0.00% 0.00% 107010091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.MT.L1_PUTX 1682743 0.00% 0.00% 107110091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.MT.L2_Replacement 153 0.00% 0.00% 107210091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.MT.L2_Replacement_clean 115 0.00% 0.00% 107310091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.MT.MEM_Inv 81 0.00% 0.00% 107410091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.M_I.Mem_Ack 108921 0.00% 0.00% 107510091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.M_I.MEM_Inv 1762 0.00% 0.00% 107610091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.MT_I.WB_Data 187 0.00% 0.00% 107710091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.MT_I.Ack_all 47 0.00% 0.00% 107810091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.MT_I.MEM_Inv 81 0.00% 0.00% 107910091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.MCT_I.WB_Data 89 0.00% 0.00% 108010091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.MCT_I.Ack_all 26 0.00% 0.00% 108110091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.I_I.Ack 1386 0.00% 0.00% 108210091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.I_I.Ack_all 6503 0.00% 0.00% 108310091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.S_I.Ack 257 0.00% 0.00% 108410091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.S_I.Ack_all 257 0.00% 0.00% 108510091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.S_I.MEM_Inv 4 0.00% 0.00% 108610091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.ISS.Mem_Data 31011 0.00% 0.00% 108710091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.IS.Mem_Data 15431 0.00% 0.00% 108810091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.IM.Mem_Data 127367 0.00% 0.00% 108910091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.SS_MB.L1_GETS 165 0.00% 0.00% 109010091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.SS_MB.Exclusive_Unblock 23875 0.00% 0.00% 109110091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.MT_MB.L1_GETS 42 0.00% 0.00% 109210091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.MT_MB.Exclusive_Unblock 1708678 0.00% 0.00% 109310091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.MT_IIB.WB_Data 23006 0.00% 0.00% 109410091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.MT_IIB.WB_Data_clean 2125 0.00% 0.00% 109510091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.MT_IIB.Unblock 2 0.00% 0.00% 109610091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.MT_IB.WB_Data 2 0.00% 0.00% 109710091Snilay@cs.wisc.edusystem.ruby.L2Cache_Controller.MT_SB.Unblock 25131 0.00% 0.00% 109810091Snilay@cs.wisc.edusystem.ruby.DMA_Controller.ReadRequest 811 0.00% 0.00% 109910013Snilay@cs.wisc.edusystem.ruby.DMA_Controller.WriteRequest 46736 0.00% 0.00% 110010091Snilay@cs.wisc.edusystem.ruby.DMA_Controller.Data 811 0.00% 0.00% 110110013Snilay@cs.wisc.edusystem.ruby.DMA_Controller.Ack 46736 0.00% 0.00% 110210091Snilay@cs.wisc.edusystem.ruby.DMA_Controller.READY.ReadRequest 811 0.00% 0.00% 110310013Snilay@cs.wisc.edusystem.ruby.DMA_Controller.READY.WriteRequest 46736 0.00% 0.00% 110410091Snilay@cs.wisc.edusystem.ruby.DMA_Controller.BUSY_RD.Data 811 0.00% 0.00% 110510013Snilay@cs.wisc.edusystem.ruby.DMA_Controller.BUSY_WR.Ack 46736 0.00% 0.00% 110610091Snilay@cs.wisc.edusystem.ruby.Directory_Controller.Fetch 173809 0.00% 0.00% 110710091Snilay@cs.wisc.edusystem.ruby.Directory_Controller.Data 96821 0.00% 0.00% 110810091Snilay@cs.wisc.edusystem.ruby.Directory_Controller.Memory_Data 174269 0.00% 0.00% 110910091Snilay@cs.wisc.edusystem.ruby.Directory_Controller.Memory_Ack 142061 0.00% 0.00% 111010091Snilay@cs.wisc.edusystem.ruby.Directory_Controller.DMA_READ 811 0.00% 0.00% 111110013Snilay@cs.wisc.edusystem.ruby.Directory_Controller.DMA_WRITE 46736 0.00% 0.00% 111210091Snilay@cs.wisc.edusystem.ruby.Directory_Controller.CleanReplacement 12100 0.00% 0.00% 111310091Snilay@cs.wisc.edusystem.ruby.Directory_Controller.I.Fetch 173809 0.00% 0.00% 111410091Snilay@cs.wisc.edusystem.ruby.Directory_Controller.I.DMA_READ 460 0.00% 0.00% 111510091Snilay@cs.wisc.edusystem.ruby.Directory_Controller.I.DMA_WRITE 45240 0.00% 0.00% 111610091Snilay@cs.wisc.edusystem.ruby.Directory_Controller.ID.Memory_Data 460 0.00% 0.00% 111710091Snilay@cs.wisc.edusystem.ruby.Directory_Controller.ID_W.Memory_Ack 45240 0.00% 0.00% 111810091Snilay@cs.wisc.edusystem.ruby.Directory_Controller.M.Data 94974 0.00% 0.00% 111910013Snilay@cs.wisc.edusystem.ruby.Directory_Controller.M.DMA_READ 351 0.00% 0.00% 112010091Snilay@cs.wisc.edusystem.ruby.Directory_Controller.M.DMA_WRITE 1496 0.00% 0.00% 112110091Snilay@cs.wisc.edusystem.ruby.Directory_Controller.M.CleanReplacement 12100 0.00% 0.00% 112210091Snilay@cs.wisc.edusystem.ruby.Directory_Controller.IM.Memory_Data 173809 0.00% 0.00% 112310091Snilay@cs.wisc.edusystem.ruby.Directory_Controller.MI.Memory_Ack 94974 0.00% 0.00% 112410013Snilay@cs.wisc.edusystem.ruby.Directory_Controller.M_DRD.Data 351 0.00% 0.00% 112510013Snilay@cs.wisc.edusystem.ruby.Directory_Controller.M_DRDI.Memory_Ack 351 0.00% 0.00% 112610091Snilay@cs.wisc.edusystem.ruby.Directory_Controller.M_DWR.Data 1496 0.00% 0.00% 112710091Snilay@cs.wisc.edusystem.ruby.Directory_Controller.M_DWRI.Memory_Ack 1496 0.00% 0.00% 11288968SN/A 11298968SN/A---------- End Simulation Statistics ---------- 1130