config.ini revision 10242:cb4e86c17767
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxArmSystem 13children=bridge cf0 clk_domain cpu cpu_clk_domain intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain 14atags_addr=256 15boot_loader=/home/stever/m5/m5_system_2.0b3/binaries/boot.arm 16boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1 17boot_release_addr=65528 18cache_line_size=64 19clk_domain=system.clk_domain 20dtb_filename= 21early_kernel_symbols=false 22enable_context_switch_stats_dump=false 23eventq_index=0 24flags_addr=268435504 25gic_cpu_addr=520093952 26have_generic_timer=false 27have_large_asid_64=false 28have_lpae=false 29have_security=false 30have_virtualization=false 31highest_el_is_64=false 32init_param=0 33kernel=/home/stever/m5/m5_system_2.0b3/binaries/vmlinux.arm.smp.fb.2.6.38.8 34load_addr_mask=268435455 35load_offset=0 36machine_type=RealView_PBX 37mem_mode=timing 38mem_ranges=0:134217727 39memories=system.physmem system.realview.nvmem 40multi_proc=true 41num_work_ids=16 42panic_on_oops=true 43panic_on_panic=true 44phys_addr_range_64=40 45readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh 46reset_addr_64=0 47symbolfile= 48work_begin_ckpt_count=0 49work_begin_cpu_id_exit=-1 50work_begin_exit_count=0 51work_cpus_ckpt_count=0 52work_end_ckpt_count=0 53work_end_exit_count=0 54work_item_id=-1 55system_port=system.membus.slave[0] 56 57[system.bridge] 58type=Bridge 59clk_domain=system.clk_domain 60delay=50000 61eventq_index=0 62ranges=268435456:520093695 1073741824:1610612735 63req_size=16 64resp_size=16 65master=system.iobus.slave[0] 66slave=system.membus.master[0] 67 68[system.cf0] 69type=IdeDisk 70children=image 71delay=1000000 72driveID=master 73eventq_index=0 74image=system.cf0.image 75 76[system.cf0.image] 77type=CowDiskImage 78children=child 79child=system.cf0.image.child 80eventq_index=0 81image_file= 82read_only=false 83table_size=65536 84 85[system.cf0.image.child] 86type=RawDiskImage 87eventq_index=0 88image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-arm-ael.img 89read_only=true 90 91[system.clk_domain] 92type=SrcClockDomain 93clock=1000 94eventq_index=0 95voltage_domain=system.voltage_domain 96 97[system.cpu] 98type=DerivO3CPU 99children=branchPred dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer 100LFSTSize=1024 101LQEntries=32 102LSQCheckLoads=true 103LSQDepCheckShift=4 104SQEntries=32 105SSITSize=1024 106activity=0 107backComSize=5 108branchPred=system.cpu.branchPred 109cachePorts=200 110checker=Null 111clk_domain=system.cpu_clk_domain 112commitToDecodeDelay=1 113commitToFetchDelay=1 114commitToIEWDelay=1 115commitToRenameDelay=1 116commitWidth=8 117cpu_id=0 118decodeToFetchDelay=1 119decodeToRenameDelay=1 120decodeWidth=8 121dispatchWidth=8 122do_checkpoint_insts=true 123do_quiesce=true 124do_statistics_insts=true 125dstage2_mmu=system.cpu.dstage2_mmu 126dtb=system.cpu.dtb 127eventq_index=0 128fetchBufferSize=64 129fetchToDecodeDelay=1 130fetchTrapLatency=1 131fetchWidth=8 132forwardComSize=5 133fuPool=system.cpu.fuPool 134function_trace=false 135function_trace_start=0 136iewToCommitDelay=1 137iewToDecodeDelay=1 138iewToFetchDelay=1 139iewToRenameDelay=1 140interrupts=system.cpu.interrupts 141isa=system.cpu.isa 142issueToExecuteDelay=1 143issueWidth=8 144istage2_mmu=system.cpu.istage2_mmu 145itb=system.cpu.itb 146max_insts_all_threads=0 147max_insts_any_thread=0 148max_loads_all_threads=0 149max_loads_any_thread=0 150needsTSO=false 151numIQEntries=64 152numPhysCCRegs=0 153numPhysFloatRegs=256 154numPhysIntRegs=256 155numROBEntries=192 156numRobs=1 157numThreads=1 158profile=0 159progress_interval=0 160renameToDecodeDelay=1 161renameToFetchDelay=1 162renameToIEWDelay=2 163renameToROBDelay=1 164renameWidth=8 165simpoint_start_insts= 166smtCommitPolicy=RoundRobin 167smtFetchPolicy=SingleThread 168smtIQPolicy=Partitioned 169smtIQThreshold=100 170smtLSQPolicy=Partitioned 171smtLSQThreshold=100 172smtNumFetchingThreads=1 173smtROBPolicy=Partitioned 174smtROBThreshold=100 175socket_id=0 176squashWidth=8 177store_set_clear_period=250000 178switched_out=false 179system=system 180tracer=system.cpu.tracer 181trapLatency=13 182wbDepth=1 183wbWidth=8 184workload= 185dcache_port=system.cpu.dcache.cpu_side 186icache_port=system.cpu.icache.cpu_side 187 188[system.cpu.branchPred] 189type=BranchPredictor 190BTBEntries=4096 191BTBTagSize=16 192RASSize=16 193choiceCtrBits=2 194choicePredictorSize=8192 195eventq_index=0 196globalCtrBits=2 197globalPredictorSize=8192 198instShiftAmt=2 199localCtrBits=2 200localHistoryTableSize=2048 201localPredictorSize=2048 202numThreads=1 203predType=tournament 204 205[system.cpu.dcache] 206type=BaseCache 207children=tags 208addr_ranges=0:18446744073709551615 209assoc=4 210clk_domain=system.cpu_clk_domain 211eventq_index=0 212forward_snoops=true 213hit_latency=2 214is_top_level=true 215max_miss_count=0 216mshrs=4 217prefetch_on_access=false 218prefetcher=Null 219response_latency=2 220sequential_access=false 221size=32768 222system=system 223tags=system.cpu.dcache.tags 224tgts_per_mshr=20 225two_queue=false 226write_buffers=8 227cpu_side=system.cpu.dcache_port 228mem_side=system.cpu.toL2Bus.slave[1] 229 230[system.cpu.dcache.tags] 231type=LRU 232assoc=4 233block_size=64 234clk_domain=system.cpu_clk_domain 235eventq_index=0 236hit_latency=2 237sequential_access=false 238size=32768 239 240[system.cpu.dstage2_mmu] 241type=ArmStage2MMU 242children=stage2_tlb 243eventq_index=0 244stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb 245tlb=system.cpu.dtb 246 247[system.cpu.dstage2_mmu.stage2_tlb] 248type=ArmTLB 249children=walker 250eventq_index=0 251is_stage2=true 252size=32 253walker=system.cpu.dstage2_mmu.stage2_tlb.walker 254 255[system.cpu.dstage2_mmu.stage2_tlb.walker] 256type=ArmTableWalker 257clk_domain=system.cpu_clk_domain 258eventq_index=0 259is_stage2=true 260num_squash_per_cycle=2 261sys=system 262port=system.cpu.toL2Bus.slave[5] 263 264[system.cpu.dtb] 265type=ArmTLB 266children=walker 267eventq_index=0 268is_stage2=false 269size=64 270walker=system.cpu.dtb.walker 271 272[system.cpu.dtb.walker] 273type=ArmTableWalker 274clk_domain=system.cpu_clk_domain 275eventq_index=0 276is_stage2=false 277num_squash_per_cycle=2 278sys=system 279port=system.cpu.toL2Bus.slave[3] 280 281[system.cpu.fuPool] 282type=FUPool 283children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 284FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8 285eventq_index=0 286 287[system.cpu.fuPool.FUList0] 288type=FUDesc 289children=opList 290count=6 291eventq_index=0 292opList=system.cpu.fuPool.FUList0.opList 293 294[system.cpu.fuPool.FUList0.opList] 295type=OpDesc 296eventq_index=0 297issueLat=1 298opClass=IntAlu 299opLat=1 300 301[system.cpu.fuPool.FUList1] 302type=FUDesc 303children=opList0 opList1 304count=2 305eventq_index=0 306opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 307 308[system.cpu.fuPool.FUList1.opList0] 309type=OpDesc 310eventq_index=0 311issueLat=1 312opClass=IntMult 313opLat=3 314 315[system.cpu.fuPool.FUList1.opList1] 316type=OpDesc 317eventq_index=0 318issueLat=19 319opClass=IntDiv 320opLat=20 321 322[system.cpu.fuPool.FUList2] 323type=FUDesc 324children=opList0 opList1 opList2 325count=4 326eventq_index=0 327opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2 328 329[system.cpu.fuPool.FUList2.opList0] 330type=OpDesc 331eventq_index=0 332issueLat=1 333opClass=FloatAdd 334opLat=2 335 336[system.cpu.fuPool.FUList2.opList1] 337type=OpDesc 338eventq_index=0 339issueLat=1 340opClass=FloatCmp 341opLat=2 342 343[system.cpu.fuPool.FUList2.opList2] 344type=OpDesc 345eventq_index=0 346issueLat=1 347opClass=FloatCvt 348opLat=2 349 350[system.cpu.fuPool.FUList3] 351type=FUDesc 352children=opList0 opList1 opList2 353count=2 354eventq_index=0 355opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 356 357[system.cpu.fuPool.FUList3.opList0] 358type=OpDesc 359eventq_index=0 360issueLat=1 361opClass=FloatMult 362opLat=4 363 364[system.cpu.fuPool.FUList3.opList1] 365type=OpDesc 366eventq_index=0 367issueLat=12 368opClass=FloatDiv 369opLat=12 370 371[system.cpu.fuPool.FUList3.opList2] 372type=OpDesc 373eventq_index=0 374issueLat=24 375opClass=FloatSqrt 376opLat=24 377 378[system.cpu.fuPool.FUList4] 379type=FUDesc 380children=opList 381count=0 382eventq_index=0 383opList=system.cpu.fuPool.FUList4.opList 384 385[system.cpu.fuPool.FUList4.opList] 386type=OpDesc 387eventq_index=0 388issueLat=1 389opClass=MemRead 390opLat=1 391 392[system.cpu.fuPool.FUList5] 393type=FUDesc 394children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 395count=4 396eventq_index=0 397opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19 398 399[system.cpu.fuPool.FUList5.opList00] 400type=OpDesc 401eventq_index=0 402issueLat=1 403opClass=SimdAdd 404opLat=1 405 406[system.cpu.fuPool.FUList5.opList01] 407type=OpDesc 408eventq_index=0 409issueLat=1 410opClass=SimdAddAcc 411opLat=1 412 413[system.cpu.fuPool.FUList5.opList02] 414type=OpDesc 415eventq_index=0 416issueLat=1 417opClass=SimdAlu 418opLat=1 419 420[system.cpu.fuPool.FUList5.opList03] 421type=OpDesc 422eventq_index=0 423issueLat=1 424opClass=SimdCmp 425opLat=1 426 427[system.cpu.fuPool.FUList5.opList04] 428type=OpDesc 429eventq_index=0 430issueLat=1 431opClass=SimdCvt 432opLat=1 433 434[system.cpu.fuPool.FUList5.opList05] 435type=OpDesc 436eventq_index=0 437issueLat=1 438opClass=SimdMisc 439opLat=1 440 441[system.cpu.fuPool.FUList5.opList06] 442type=OpDesc 443eventq_index=0 444issueLat=1 445opClass=SimdMult 446opLat=1 447 448[system.cpu.fuPool.FUList5.opList07] 449type=OpDesc 450eventq_index=0 451issueLat=1 452opClass=SimdMultAcc 453opLat=1 454 455[system.cpu.fuPool.FUList5.opList08] 456type=OpDesc 457eventq_index=0 458issueLat=1 459opClass=SimdShift 460opLat=1 461 462[system.cpu.fuPool.FUList5.opList09] 463type=OpDesc 464eventq_index=0 465issueLat=1 466opClass=SimdShiftAcc 467opLat=1 468 469[system.cpu.fuPool.FUList5.opList10] 470type=OpDesc 471eventq_index=0 472issueLat=1 473opClass=SimdSqrt 474opLat=1 475 476[system.cpu.fuPool.FUList5.opList11] 477type=OpDesc 478eventq_index=0 479issueLat=1 480opClass=SimdFloatAdd 481opLat=1 482 483[system.cpu.fuPool.FUList5.opList12] 484type=OpDesc 485eventq_index=0 486issueLat=1 487opClass=SimdFloatAlu 488opLat=1 489 490[system.cpu.fuPool.FUList5.opList13] 491type=OpDesc 492eventq_index=0 493issueLat=1 494opClass=SimdFloatCmp 495opLat=1 496 497[system.cpu.fuPool.FUList5.opList14] 498type=OpDesc 499eventq_index=0 500issueLat=1 501opClass=SimdFloatCvt 502opLat=1 503 504[system.cpu.fuPool.FUList5.opList15] 505type=OpDesc 506eventq_index=0 507issueLat=1 508opClass=SimdFloatDiv 509opLat=1 510 511[system.cpu.fuPool.FUList5.opList16] 512type=OpDesc 513eventq_index=0 514issueLat=1 515opClass=SimdFloatMisc 516opLat=1 517 518[system.cpu.fuPool.FUList5.opList17] 519type=OpDesc 520eventq_index=0 521issueLat=1 522opClass=SimdFloatMult 523opLat=1 524 525[system.cpu.fuPool.FUList5.opList18] 526type=OpDesc 527eventq_index=0 528issueLat=1 529opClass=SimdFloatMultAcc 530opLat=1 531 532[system.cpu.fuPool.FUList5.opList19] 533type=OpDesc 534eventq_index=0 535issueLat=1 536opClass=SimdFloatSqrt 537opLat=1 538 539[system.cpu.fuPool.FUList6] 540type=FUDesc 541children=opList 542count=0 543eventq_index=0 544opList=system.cpu.fuPool.FUList6.opList 545 546[system.cpu.fuPool.FUList6.opList] 547type=OpDesc 548eventq_index=0 549issueLat=1 550opClass=MemWrite 551opLat=1 552 553[system.cpu.fuPool.FUList7] 554type=FUDesc 555children=opList0 opList1 556count=4 557eventq_index=0 558opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1 559 560[system.cpu.fuPool.FUList7.opList0] 561type=OpDesc 562eventq_index=0 563issueLat=1 564opClass=MemRead 565opLat=1 566 567[system.cpu.fuPool.FUList7.opList1] 568type=OpDesc 569eventq_index=0 570issueLat=1 571opClass=MemWrite 572opLat=1 573 574[system.cpu.fuPool.FUList8] 575type=FUDesc 576children=opList 577count=1 578eventq_index=0 579opList=system.cpu.fuPool.FUList8.opList 580 581[system.cpu.fuPool.FUList8.opList] 582type=OpDesc 583eventq_index=0 584issueLat=3 585opClass=IprAccess 586opLat=3 587 588[system.cpu.icache] 589type=BaseCache 590children=tags 591addr_ranges=0:18446744073709551615 592assoc=1 593clk_domain=system.cpu_clk_domain 594eventq_index=0 595forward_snoops=true 596hit_latency=2 597is_top_level=true 598max_miss_count=0 599mshrs=4 600prefetch_on_access=false 601prefetcher=Null 602response_latency=2 603sequential_access=false 604size=32768 605system=system 606tags=system.cpu.icache.tags 607tgts_per_mshr=20 608two_queue=false 609write_buffers=8 610cpu_side=system.cpu.icache_port 611mem_side=system.cpu.toL2Bus.slave[0] 612 613[system.cpu.icache.tags] 614type=LRU 615assoc=1 616block_size=64 617clk_domain=system.cpu_clk_domain 618eventq_index=0 619hit_latency=2 620sequential_access=false 621size=32768 622 623[system.cpu.interrupts] 624type=ArmInterrupts 625eventq_index=0 626 627[system.cpu.isa] 628type=ArmISA 629eventq_index=0 630fpsid=1090793632 631id_aa64afr0_el1=0 632id_aa64afr1_el1=0 633id_aa64dfr0_el1=1052678 634id_aa64dfr1_el1=0 635id_aa64isar0_el1=0 636id_aa64isar1_el1=0 637id_aa64mmfr0_el1=15728642 638id_aa64mmfr1_el1=0 639id_aa64pfr0_el1=17 640id_aa64pfr1_el1=0 641id_isar0=34607377 642id_isar1=34677009 643id_isar2=555950401 644id_isar3=17899825 645id_isar4=268501314 646id_isar5=0 647id_mmfr0=270536963 648id_mmfr1=0 649id_mmfr2=19070976 650id_mmfr3=34611729 651id_pfr0=49 652id_pfr1=4113 653midr=1091551472 654system=system 655 656[system.cpu.istage2_mmu] 657type=ArmStage2MMU 658children=stage2_tlb 659eventq_index=0 660stage2_tlb=system.cpu.istage2_mmu.stage2_tlb 661tlb=system.cpu.itb 662 663[system.cpu.istage2_mmu.stage2_tlb] 664type=ArmTLB 665children=walker 666eventq_index=0 667is_stage2=true 668size=32 669walker=system.cpu.istage2_mmu.stage2_tlb.walker 670 671[system.cpu.istage2_mmu.stage2_tlb.walker] 672type=ArmTableWalker 673clk_domain=system.cpu_clk_domain 674eventq_index=0 675is_stage2=true 676num_squash_per_cycle=2 677sys=system 678port=system.cpu.toL2Bus.slave[4] 679 680[system.cpu.itb] 681type=ArmTLB 682children=walker 683eventq_index=0 684is_stage2=false 685size=64 686walker=system.cpu.itb.walker 687 688[system.cpu.itb.walker] 689type=ArmTableWalker 690clk_domain=system.cpu_clk_domain 691eventq_index=0 692is_stage2=false 693num_squash_per_cycle=2 694sys=system 695port=system.cpu.toL2Bus.slave[2] 696 697[system.cpu.l2cache] 698type=BaseCache 699children=tags 700addr_ranges=0:18446744073709551615 701assoc=8 702clk_domain=system.cpu_clk_domain 703eventq_index=0 704forward_snoops=true 705hit_latency=20 706is_top_level=false 707max_miss_count=0 708mshrs=20 709prefetch_on_access=false 710prefetcher=Null 711response_latency=20 712sequential_access=false 713size=4194304 714system=system 715tags=system.cpu.l2cache.tags 716tgts_per_mshr=12 717two_queue=false 718write_buffers=8 719cpu_side=system.cpu.toL2Bus.master[0] 720mem_side=system.membus.slave[1] 721 722[system.cpu.l2cache.tags] 723type=LRU 724assoc=8 725block_size=64 726clk_domain=system.cpu_clk_domain 727eventq_index=0 728hit_latency=20 729sequential_access=false 730size=4194304 731 732[system.cpu.toL2Bus] 733type=CoherentBus 734clk_domain=system.cpu_clk_domain 735eventq_index=0 736header_cycles=1 737system=system 738use_default_range=false 739width=32 740master=system.cpu.l2cache.cpu_side 741slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port 742 743[system.cpu.tracer] 744type=ExeTracer 745eventq_index=0 746 747[system.cpu_clk_domain] 748type=SrcClockDomain 749clock=500 750eventq_index=0 751voltage_domain=system.voltage_domain 752 753[system.intrctrl] 754type=IntrControl 755eventq_index=0 756sys=system 757 758[system.iobus] 759type=NoncoherentBus 760clk_domain=system.clk_domain 761eventq_index=0 762header_cycles=1 763use_default_range=false 764width=8 765master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc.pio system.realview.flash_fake.pio system.iocache.cpu_side 766slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma 767 768[system.iocache] 769type=BaseCache 770children=tags 771addr_ranges=0:134217727 772assoc=8 773clk_domain=system.clk_domain 774eventq_index=0 775forward_snoops=false 776hit_latency=50 777is_top_level=true 778max_miss_count=0 779mshrs=20 780prefetch_on_access=false 781prefetcher=Null 782response_latency=50 783sequential_access=false 784size=1024 785system=system 786tags=system.iocache.tags 787tgts_per_mshr=12 788two_queue=false 789write_buffers=8 790cpu_side=system.iobus.master[25] 791mem_side=system.membus.slave[2] 792 793[system.iocache.tags] 794type=LRU 795assoc=8 796block_size=64 797clk_domain=system.clk_domain 798eventq_index=0 799hit_latency=50 800sequential_access=false 801size=1024 802 803[system.membus] 804type=CoherentBus 805children=badaddr_responder 806clk_domain=system.clk_domain 807eventq_index=0 808header_cycles=1 809system=system 810use_default_range=false 811width=8 812default=system.membus.badaddr_responder.pio 813master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio system.physmem.port 814slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side 815 816[system.membus.badaddr_responder] 817type=IsaFake 818clk_domain=system.clk_domain 819eventq_index=0 820fake_mem=false 821pio_addr=0 822pio_latency=100000 823pio_size=8 824ret_bad_addr=true 825ret_data16=65535 826ret_data32=4294967295 827ret_data64=18446744073709551615 828ret_data8=255 829system=system 830update_data=false 831warn_access=warn 832pio=system.membus.default 833 834[system.physmem] 835type=DRAMCtrl 836activation_limit=4 837addr_mapping=RoRaBaChCo 838banks_per_rank=8 839burst_length=8 840channels=1 841clk_domain=system.clk_domain 842conf_table_reported=true 843device_bus_width=8 844device_rowbuffer_size=1024 845devices_per_rank=8 846eventq_index=0 847in_addr_map=true 848max_accesses_per_row=16 849mem_sched_policy=frfcfs 850min_writes_per_switch=16 851null=false 852page_policy=open_adaptive 853range=0:134217727 854ranks_per_channel=2 855read_buffer_size=32 856static_backend_latency=10000 857static_frontend_latency=10000 858tBURST=5000 859tCK=1250 860tCL=13750 861tRAS=35000 862tRCD=13750 863tREFI=7800000 864tRFC=260000 865tRP=13750 866tRRD=6000 867tRTP=7500 868tRTW=2500 869tWR=15000 870tWTR=7500 871tXAW=30000 872write_buffer_size=64 873write_high_thresh_perc=85 874write_low_thresh_perc=50 875port=system.membus.master[6] 876 877[system.realview] 878type=RealView 879children=a9scu aaci_fake cf_ctrl clcd dmac_fake flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake 880eventq_index=0 881intrctrl=system.intrctrl 882max_mem_size=268435456 883mem_start_addr=0 884pci_cfg_base=0 885system=system 886 887[system.realview.a9scu] 888type=A9SCU 889clk_domain=system.clk_domain 890eventq_index=0 891pio_addr=520093696 892pio_latency=100000 893system=system 894pio=system.membus.master[4] 895 896[system.realview.aaci_fake] 897type=AmbaFake 898amba_id=0 899clk_domain=system.clk_domain 900eventq_index=0 901ignore_access=false 902pio_addr=268451840 903pio_latency=100000 904system=system 905pio=system.iobus.master[21] 906 907[system.realview.cf_ctrl] 908type=IdeController 909BAR0=402653184 910BAR0LegacyIO=true 911BAR0Size=16 912BAR1=402653440 913BAR1LegacyIO=true 914BAR1Size=1 915BAR2=1 916BAR2LegacyIO=false 917BAR2Size=8 918BAR3=1 919BAR3LegacyIO=false 920BAR3Size=4 921BAR4=1 922BAR4LegacyIO=false 923BAR4Size=16 924BAR5=1 925BAR5LegacyIO=false 926BAR5Size=0 927BIST=0 928CacheLineSize=0 929CapabilityPtr=0 930CardbusCIS=0 931ClassCode=1 932Command=1 933DeviceID=28945 934ExpansionROM=0 935HeaderType=0 936InterruptLine=31 937InterruptPin=1 938LatencyTimer=0 939MSICAPBaseOffset=0 940MSICAPCapId=0 941MSICAPMaskBits=0 942MSICAPMsgAddr=0 943MSICAPMsgCtrl=0 944MSICAPMsgData=0 945MSICAPMsgUpperAddr=0 946MSICAPNextCapability=0 947MSICAPPendingBits=0 948MSIXCAPBaseOffset=0 949MSIXCAPCapId=0 950MSIXCAPNextCapability=0 951MSIXMsgCtrl=0 952MSIXPbaOffset=0 953MSIXTableOffset=0 954MaximumLatency=0 955MinimumGrant=0 956PMCAPBaseOffset=0 957PMCAPCapId=0 958PMCAPCapabilities=0 959PMCAPCtrlStatus=0 960PMCAPNextCapability=0 961PXCAPBaseOffset=0 962PXCAPCapId=0 963PXCAPCapabilities=0 964PXCAPDevCap2=0 965PXCAPDevCapabilities=0 966PXCAPDevCtrl=0 967PXCAPDevCtrl2=0 968PXCAPDevStatus=0 969PXCAPLinkCap=0 970PXCAPLinkCtrl=0 971PXCAPLinkStatus=0 972PXCAPNextCapability=0 973ProgIF=133 974Revision=0 975Status=640 976SubClassCode=1 977SubsystemID=0 978SubsystemVendorID=0 979VendorID=32902 980clk_domain=system.clk_domain 981config_latency=20000 982ctrl_offset=2 983disks=system.cf0 984eventq_index=0 985io_shift=1 986pci_bus=2 987pci_dev=7 988pci_func=0 989pio_latency=30000 990platform=system.realview 991system=system 992config=system.iobus.master[8] 993dma=system.iobus.slave[2] 994pio=system.iobus.master[7] 995 996[system.realview.clcd] 997type=Pl111 998amba_id=1315089 999clk_domain=system.clk_domain 1000enable_capture=true 1001eventq_index=0 1002gic=system.realview.gic 1003int_num=55 1004pio_addr=268566528 1005pio_latency=10000 1006pixel_clock=41667 1007system=system 1008vnc=system.vncserver 1009dma=system.iobus.slave[1] 1010pio=system.iobus.master[4] 1011 1012[system.realview.dmac_fake] 1013type=AmbaFake 1014amba_id=0 1015clk_domain=system.clk_domain 1016eventq_index=0 1017ignore_access=false 1018pio_addr=268632064 1019pio_latency=100000 1020system=system 1021pio=system.iobus.master[9] 1022 1023[system.realview.flash_fake] 1024type=IsaFake 1025clk_domain=system.clk_domain 1026eventq_index=0 1027fake_mem=true 1028pio_addr=1073741824 1029pio_latency=100000 1030pio_size=536870912 1031ret_bad_addr=false 1032ret_data16=65535 1033ret_data32=4294967295 1034ret_data64=18446744073709551615 1035ret_data8=255 1036system=system 1037update_data=false 1038warn_access= 1039pio=system.iobus.master[24] 1040 1041[system.realview.gic] 1042type=Pl390 1043clk_domain=system.clk_domain 1044cpu_addr=520093952 1045cpu_pio_delay=10000 1046dist_addr=520097792 1047dist_pio_delay=10000 1048eventq_index=0 1049int_latency=10000 1050it_lines=128 1051msix_addr=0 1052platform=system.realview 1053system=system 1054pio=system.membus.master[2] 1055 1056[system.realview.gpio0_fake] 1057type=AmbaFake 1058amba_id=0 1059clk_domain=system.clk_domain 1060eventq_index=0 1061ignore_access=false 1062pio_addr=268513280 1063pio_latency=100000 1064system=system 1065pio=system.iobus.master[16] 1066 1067[system.realview.gpio1_fake] 1068type=AmbaFake 1069amba_id=0 1070clk_domain=system.clk_domain 1071eventq_index=0 1072ignore_access=false 1073pio_addr=268517376 1074pio_latency=100000 1075system=system 1076pio=system.iobus.master[17] 1077 1078[system.realview.gpio2_fake] 1079type=AmbaFake 1080amba_id=0 1081clk_domain=system.clk_domain 1082eventq_index=0 1083ignore_access=false 1084pio_addr=268521472 1085pio_latency=100000 1086system=system 1087pio=system.iobus.master[18] 1088 1089[system.realview.kmi0] 1090type=Pl050 1091amba_id=1314896 1092clk_domain=system.clk_domain 1093eventq_index=0 1094gic=system.realview.gic 1095int_delay=1000000 1096int_num=52 1097is_mouse=false 1098pio_addr=268460032 1099pio_latency=100000 1100system=system 1101vnc=system.vncserver 1102pio=system.iobus.master[5] 1103 1104[system.realview.kmi1] 1105type=Pl050 1106amba_id=1314896 1107clk_domain=system.clk_domain 1108eventq_index=0 1109gic=system.realview.gic 1110int_delay=1000000 1111int_num=53 1112is_mouse=true 1113pio_addr=268464128 1114pio_latency=100000 1115system=system 1116vnc=system.vncserver 1117pio=system.iobus.master[6] 1118 1119[system.realview.l2x0_fake] 1120type=IsaFake 1121clk_domain=system.clk_domain 1122eventq_index=0 1123fake_mem=false 1124pio_addr=520101888 1125pio_latency=100000 1126pio_size=4095 1127ret_bad_addr=false 1128ret_data16=65535 1129ret_data32=4294967295 1130ret_data64=18446744073709551615 1131ret_data8=255 1132system=system 1133update_data=false 1134warn_access= 1135pio=system.membus.master[3] 1136 1137[system.realview.local_cpu_timer] 1138type=CpuLocalTimer 1139clk_domain=system.clk_domain 1140eventq_index=0 1141gic=system.realview.gic 1142int_num_timer=29 1143int_num_watchdog=30 1144pio_addr=520095232 1145pio_latency=100000 1146system=system 1147pio=system.membus.master[5] 1148 1149[system.realview.mmc_fake] 1150type=AmbaFake 1151amba_id=0 1152clk_domain=system.clk_domain 1153eventq_index=0 1154ignore_access=false 1155pio_addr=268455936 1156pio_latency=100000 1157system=system 1158pio=system.iobus.master[22] 1159 1160[system.realview.nvmem] 1161type=SimpleMemory 1162bandwidth=73.000000 1163clk_domain=system.clk_domain 1164conf_table_reported=false 1165eventq_index=0 1166in_addr_map=true 1167latency=30000 1168latency_var=0 1169null=false 1170range=2147483648:2214592511 1171port=system.membus.master[1] 1172 1173[system.realview.realview_io] 1174type=RealViewCtrl 1175clk_domain=system.clk_domain 1176eventq_index=0 1177idreg=0 1178pio_addr=268435456 1179pio_latency=100000 1180proc_id0=201326592 1181proc_id1=201327138 1182system=system 1183pio=system.iobus.master[1] 1184 1185[system.realview.rtc] 1186type=PL031 1187amba_id=3412017 1188clk_domain=system.clk_domain 1189eventq_index=0 1190gic=system.realview.gic 1191int_delay=100000 1192int_num=42 1193pio_addr=268529664 1194pio_latency=100000 1195system=system 1196time=Thu Jan 1 00:00:00 2009 1197pio=system.iobus.master[23] 1198 1199[system.realview.sci_fake] 1200type=AmbaFake 1201amba_id=0 1202clk_domain=system.clk_domain 1203eventq_index=0 1204ignore_access=false 1205pio_addr=268492800 1206pio_latency=100000 1207system=system 1208pio=system.iobus.master[20] 1209 1210[system.realview.smc_fake] 1211type=AmbaFake 1212amba_id=0 1213clk_domain=system.clk_domain 1214eventq_index=0 1215ignore_access=false 1216pio_addr=269357056 1217pio_latency=100000 1218system=system 1219pio=system.iobus.master[13] 1220 1221[system.realview.sp810_fake] 1222type=AmbaFake 1223amba_id=0 1224clk_domain=system.clk_domain 1225eventq_index=0 1226ignore_access=true 1227pio_addr=268439552 1228pio_latency=100000 1229system=system 1230pio=system.iobus.master[14] 1231 1232[system.realview.ssp_fake] 1233type=AmbaFake 1234amba_id=0 1235clk_domain=system.clk_domain 1236eventq_index=0 1237ignore_access=false 1238pio_addr=268488704 1239pio_latency=100000 1240system=system 1241pio=system.iobus.master[19] 1242 1243[system.realview.timer0] 1244type=Sp804 1245amba_id=1316868 1246clk_domain=system.clk_domain 1247clock0=1000000 1248clock1=1000000 1249eventq_index=0 1250gic=system.realview.gic 1251int_num0=36 1252int_num1=36 1253pio_addr=268505088 1254pio_latency=100000 1255system=system 1256pio=system.iobus.master[2] 1257 1258[system.realview.timer1] 1259type=Sp804 1260amba_id=1316868 1261clk_domain=system.clk_domain 1262clock0=1000000 1263clock1=1000000 1264eventq_index=0 1265gic=system.realview.gic 1266int_num0=37 1267int_num1=37 1268pio_addr=268509184 1269pio_latency=100000 1270system=system 1271pio=system.iobus.master[3] 1272 1273[system.realview.uart] 1274type=Pl011 1275clk_domain=system.clk_domain 1276end_on_eot=false 1277eventq_index=0 1278gic=system.realview.gic 1279int_delay=100000 1280int_num=44 1281pio_addr=268472320 1282pio_latency=100000 1283platform=system.realview 1284system=system 1285terminal=system.terminal 1286pio=system.iobus.master[0] 1287 1288[system.realview.uart1_fake] 1289type=AmbaFake 1290amba_id=0 1291clk_domain=system.clk_domain 1292eventq_index=0 1293ignore_access=false 1294pio_addr=268476416 1295pio_latency=100000 1296system=system 1297pio=system.iobus.master[10] 1298 1299[system.realview.uart2_fake] 1300type=AmbaFake 1301amba_id=0 1302clk_domain=system.clk_domain 1303eventq_index=0 1304ignore_access=false 1305pio_addr=268480512 1306pio_latency=100000 1307system=system 1308pio=system.iobus.master[11] 1309 1310[system.realview.uart3_fake] 1311type=AmbaFake 1312amba_id=0 1313clk_domain=system.clk_domain 1314eventq_index=0 1315ignore_access=false 1316pio_addr=268484608 1317pio_latency=100000 1318system=system 1319pio=system.iobus.master[12] 1320 1321[system.realview.watchdog_fake] 1322type=AmbaFake 1323amba_id=0 1324clk_domain=system.clk_domain 1325eventq_index=0 1326ignore_access=false 1327pio_addr=268500992 1328pio_latency=100000 1329system=system 1330pio=system.iobus.master[15] 1331 1332[system.terminal] 1333type=Terminal 1334eventq_index=0 1335intr_control=system.intrctrl 1336number=0 1337output=true 1338port=3456 1339 1340[system.vncserver] 1341type=VncServer 1342eventq_index=0 1343frame_capture=false 1344number=0 1345port=5900 1346 1347[system.voltage_domain] 1348type=VoltageDomain 1349eventq_index=0 1350voltage=1.000000 1351 1352