config.ini revision 8802:ef66a9083bc4
1[root] 2type=Root 3children=system 4time_sync_enable=false 5time_sync_period=100000000000 6time_sync_spin_threshold=100000000 7 8[system] 9type=LinuxArmSystem 10children=bridge cf0 cpu0 cpu1 intrctrl iobus iocache l2c membus nvmem physmem realview terminal toL2Bus vncserver 11boot_cpu_frequency=500 12boot_loader=/dist/m5/system/binaries/boot.arm 13boot_loader_mem=system.nvmem 14boot_osflags=earlyprintk console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1 15flags_addr=268435504 16gic_cpu_addr=520093952 17init_param=0 18kernel=/dist/m5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8 19load_addr_mask=268435455 20machine_type=RealView_PBX 21mem_mode=timing 22memories=system.nvmem system.physmem 23midr_regval=890224640 24num_work_ids=16 25physmem=system.physmem 26readfile=tests/halt.sh 27symbolfile= 28work_begin_ckpt_count=0 29work_begin_cpu_id_exit=-1 30work_begin_exit_count=0 31work_cpus_ckpt_count=0 32work_end_ckpt_count=0 33work_end_exit_count=0 34work_item_id=-1 35system_port=system.membus.port[7] 36 37[system.bridge] 38type=Bridge 39delay=50000 40nack_delay=4000 41ranges=268435456:520093695 1073741824:18446744073709551615 42req_size=16 43resp_size=16 44write_ack=false 45master=system.iobus.port[0] 46slave=system.membus.port[0] 47 48[system.cf0] 49type=IdeDisk 50children=image 51delay=1000000 52driveID=master 53image=system.cf0.image 54 55[system.cf0.image] 56type=CowDiskImage 57children=child 58child=system.cf0.image.child 59image_file= 60read_only=false 61table_size=65536 62 63[system.cf0.image.child] 64type=RawDiskImage 65image_file=/dist/m5/system/disks/linux-arm-ael.img 66read_only=true 67 68[system.cpu0] 69type=DerivO3CPU 70children=dcache dtb fuPool icache interrupts itb tracer 71BTBEntries=4096 72BTBTagSize=16 73LFSTSize=1024 74LQEntries=32 75LSQCheckLoads=true 76LSQDepCheckShift=4 77RASSize=16 78SQEntries=32 79SSITSize=1024 80activity=0 81backComSize=5 82cachePorts=200 83checker=Null 84choiceCtrBits=2 85choicePredictorSize=8192 86clock=500 87commitToDecodeDelay=1 88commitToFetchDelay=1 89commitToIEWDelay=1 90commitToRenameDelay=1 91commitWidth=8 92cpu_id=0 93decodeToFetchDelay=1 94decodeToRenameDelay=1 95decodeWidth=8 96defer_registration=false 97dispatchWidth=8 98do_checkpoint_insts=true 99do_quiesce=true 100do_statistics_insts=true 101dtb=system.cpu0.dtb 102fetchToDecodeDelay=1 103fetchTrapLatency=1 104fetchWidth=8 105forwardComSize=5 106fuPool=system.cpu0.fuPool 107function_trace=false 108function_trace_start=0 109globalCtrBits=2 110globalHistoryBits=13 111globalPredictorSize=8192 112iewToCommitDelay=1 113iewToDecodeDelay=1 114iewToFetchDelay=1 115iewToRenameDelay=1 116instShiftAmt=2 117interrupts=system.cpu0.interrupts 118issueToExecuteDelay=1 119issueWidth=8 120itb=system.cpu0.itb 121localCtrBits=2 122localHistoryBits=11 123localHistoryTableSize=2048 124localPredictorSize=2048 125max_insts_all_threads=0 126max_insts_any_thread=0 127max_loads_all_threads=0 128max_loads_any_thread=0 129numIQEntries=64 130numPhysFloatRegs=256 131numPhysIntRegs=256 132numROBEntries=192 133numRobs=1 134numThreads=1 135phase=0 136predType=tournament 137profile=0 138progress_interval=0 139renameToDecodeDelay=1 140renameToFetchDelay=1 141renameToIEWDelay=2 142renameToROBDelay=1 143renameWidth=8 144smtCommitPolicy=RoundRobin 145smtFetchPolicy=SingleThread 146smtIQPolicy=Partitioned 147smtIQThreshold=100 148smtLSQPolicy=Partitioned 149smtLSQThreshold=100 150smtNumFetchingThreads=1 151smtROBPolicy=Partitioned 152smtROBThreshold=100 153squashWidth=8 154store_set_clear_period=250000 155system=system 156tracer=system.cpu0.tracer 157trapLatency=13 158wbDepth=1 159wbWidth=8 160dcache_port=system.cpu0.dcache.cpu_side 161icache_port=system.cpu0.icache.cpu_side 162 163[system.cpu0.dcache] 164type=BaseCache 165addr_range=0:18446744073709551615 166assoc=4 167block_size=64 168forward_snoops=true 169hash_delay=1 170is_top_level=true 171latency=1000 172max_miss_count=0 173mshrs=4 174num_cpus=1 175prefetch_data_accesses_only=false 176prefetch_degree=1 177prefetch_latency=10000 178prefetch_on_access=false 179prefetch_past_page=false 180prefetch_policy=none 181prefetch_serial_squash=false 182prefetch_use_cpu_id=true 183prefetcher_size=100 184prioritizeRequests=false 185repl=Null 186size=32768 187subblock_size=0 188tgts_per_mshr=20 189trace_addr=0 190two_queue=false 191write_buffers=8 192cpu_side=system.cpu0.dcache_port 193mem_side=system.toL2Bus.port[2] 194 195[system.cpu0.dtb] 196type=ArmTLB 197children=walker 198size=64 199walker=system.cpu0.dtb.walker 200 201[system.cpu0.dtb.walker] 202type=ArmTableWalker 203max_backoff=100000 204min_backoff=0 205sys=system 206port=system.toL2Bus.port[4] 207 208[system.cpu0.fuPool] 209type=FUPool 210children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 211FUList=system.cpu0.fuPool.FUList0 system.cpu0.fuPool.FUList1 system.cpu0.fuPool.FUList2 system.cpu0.fuPool.FUList3 system.cpu0.fuPool.FUList4 system.cpu0.fuPool.FUList5 system.cpu0.fuPool.FUList6 system.cpu0.fuPool.FUList7 system.cpu0.fuPool.FUList8 212 213[system.cpu0.fuPool.FUList0] 214type=FUDesc 215children=opList 216count=6 217opList=system.cpu0.fuPool.FUList0.opList 218 219[system.cpu0.fuPool.FUList0.opList] 220type=OpDesc 221issueLat=1 222opClass=IntAlu 223opLat=1 224 225[system.cpu0.fuPool.FUList1] 226type=FUDesc 227children=opList0 opList1 228count=2 229opList=system.cpu0.fuPool.FUList1.opList0 system.cpu0.fuPool.FUList1.opList1 230 231[system.cpu0.fuPool.FUList1.opList0] 232type=OpDesc 233issueLat=1 234opClass=IntMult 235opLat=3 236 237[system.cpu0.fuPool.FUList1.opList1] 238type=OpDesc 239issueLat=19 240opClass=IntDiv 241opLat=20 242 243[system.cpu0.fuPool.FUList2] 244type=FUDesc 245children=opList0 opList1 opList2 246count=4 247opList=system.cpu0.fuPool.FUList2.opList0 system.cpu0.fuPool.FUList2.opList1 system.cpu0.fuPool.FUList2.opList2 248 249[system.cpu0.fuPool.FUList2.opList0] 250type=OpDesc 251issueLat=1 252opClass=FloatAdd 253opLat=2 254 255[system.cpu0.fuPool.FUList2.opList1] 256type=OpDesc 257issueLat=1 258opClass=FloatCmp 259opLat=2 260 261[system.cpu0.fuPool.FUList2.opList2] 262type=OpDesc 263issueLat=1 264opClass=FloatCvt 265opLat=2 266 267[system.cpu0.fuPool.FUList3] 268type=FUDesc 269children=opList0 opList1 opList2 270count=2 271opList=system.cpu0.fuPool.FUList3.opList0 system.cpu0.fuPool.FUList3.opList1 system.cpu0.fuPool.FUList3.opList2 272 273[system.cpu0.fuPool.FUList3.opList0] 274type=OpDesc 275issueLat=1 276opClass=FloatMult 277opLat=4 278 279[system.cpu0.fuPool.FUList3.opList1] 280type=OpDesc 281issueLat=12 282opClass=FloatDiv 283opLat=12 284 285[system.cpu0.fuPool.FUList3.opList2] 286type=OpDesc 287issueLat=24 288opClass=FloatSqrt 289opLat=24 290 291[system.cpu0.fuPool.FUList4] 292type=FUDesc 293children=opList 294count=0 295opList=system.cpu0.fuPool.FUList4.opList 296 297[system.cpu0.fuPool.FUList4.opList] 298type=OpDesc 299issueLat=1 300opClass=MemRead 301opLat=1 302 303[system.cpu0.fuPool.FUList5] 304type=FUDesc 305children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 306count=4 307opList=system.cpu0.fuPool.FUList5.opList00 system.cpu0.fuPool.FUList5.opList01 system.cpu0.fuPool.FUList5.opList02 system.cpu0.fuPool.FUList5.opList03 system.cpu0.fuPool.FUList5.opList04 system.cpu0.fuPool.FUList5.opList05 system.cpu0.fuPool.FUList5.opList06 system.cpu0.fuPool.FUList5.opList07 system.cpu0.fuPool.FUList5.opList08 system.cpu0.fuPool.FUList5.opList09 system.cpu0.fuPool.FUList5.opList10 system.cpu0.fuPool.FUList5.opList11 system.cpu0.fuPool.FUList5.opList12 system.cpu0.fuPool.FUList5.opList13 system.cpu0.fuPool.FUList5.opList14 system.cpu0.fuPool.FUList5.opList15 system.cpu0.fuPool.FUList5.opList16 system.cpu0.fuPool.FUList5.opList17 system.cpu0.fuPool.FUList5.opList18 system.cpu0.fuPool.FUList5.opList19 308 309[system.cpu0.fuPool.FUList5.opList00] 310type=OpDesc 311issueLat=1 312opClass=SimdAdd 313opLat=1 314 315[system.cpu0.fuPool.FUList5.opList01] 316type=OpDesc 317issueLat=1 318opClass=SimdAddAcc 319opLat=1 320 321[system.cpu0.fuPool.FUList5.opList02] 322type=OpDesc 323issueLat=1 324opClass=SimdAlu 325opLat=1 326 327[system.cpu0.fuPool.FUList5.opList03] 328type=OpDesc 329issueLat=1 330opClass=SimdCmp 331opLat=1 332 333[system.cpu0.fuPool.FUList5.opList04] 334type=OpDesc 335issueLat=1 336opClass=SimdCvt 337opLat=1 338 339[system.cpu0.fuPool.FUList5.opList05] 340type=OpDesc 341issueLat=1 342opClass=SimdMisc 343opLat=1 344 345[system.cpu0.fuPool.FUList5.opList06] 346type=OpDesc 347issueLat=1 348opClass=SimdMult 349opLat=1 350 351[system.cpu0.fuPool.FUList5.opList07] 352type=OpDesc 353issueLat=1 354opClass=SimdMultAcc 355opLat=1 356 357[system.cpu0.fuPool.FUList5.opList08] 358type=OpDesc 359issueLat=1 360opClass=SimdShift 361opLat=1 362 363[system.cpu0.fuPool.FUList5.opList09] 364type=OpDesc 365issueLat=1 366opClass=SimdShiftAcc 367opLat=1 368 369[system.cpu0.fuPool.FUList5.opList10] 370type=OpDesc 371issueLat=1 372opClass=SimdSqrt 373opLat=1 374 375[system.cpu0.fuPool.FUList5.opList11] 376type=OpDesc 377issueLat=1 378opClass=SimdFloatAdd 379opLat=1 380 381[system.cpu0.fuPool.FUList5.opList12] 382type=OpDesc 383issueLat=1 384opClass=SimdFloatAlu 385opLat=1 386 387[system.cpu0.fuPool.FUList5.opList13] 388type=OpDesc 389issueLat=1 390opClass=SimdFloatCmp 391opLat=1 392 393[system.cpu0.fuPool.FUList5.opList14] 394type=OpDesc 395issueLat=1 396opClass=SimdFloatCvt 397opLat=1 398 399[system.cpu0.fuPool.FUList5.opList15] 400type=OpDesc 401issueLat=1 402opClass=SimdFloatDiv 403opLat=1 404 405[system.cpu0.fuPool.FUList5.opList16] 406type=OpDesc 407issueLat=1 408opClass=SimdFloatMisc 409opLat=1 410 411[system.cpu0.fuPool.FUList5.opList17] 412type=OpDesc 413issueLat=1 414opClass=SimdFloatMult 415opLat=1 416 417[system.cpu0.fuPool.FUList5.opList18] 418type=OpDesc 419issueLat=1 420opClass=SimdFloatMultAcc 421opLat=1 422 423[system.cpu0.fuPool.FUList5.opList19] 424type=OpDesc 425issueLat=1 426opClass=SimdFloatSqrt 427opLat=1 428 429[system.cpu0.fuPool.FUList6] 430type=FUDesc 431children=opList 432count=0 433opList=system.cpu0.fuPool.FUList6.opList 434 435[system.cpu0.fuPool.FUList6.opList] 436type=OpDesc 437issueLat=1 438opClass=MemWrite 439opLat=1 440 441[system.cpu0.fuPool.FUList7] 442type=FUDesc 443children=opList0 opList1 444count=4 445opList=system.cpu0.fuPool.FUList7.opList0 system.cpu0.fuPool.FUList7.opList1 446 447[system.cpu0.fuPool.FUList7.opList0] 448type=OpDesc 449issueLat=1 450opClass=MemRead 451opLat=1 452 453[system.cpu0.fuPool.FUList7.opList1] 454type=OpDesc 455issueLat=1 456opClass=MemWrite 457opLat=1 458 459[system.cpu0.fuPool.FUList8] 460type=FUDesc 461children=opList 462count=1 463opList=system.cpu0.fuPool.FUList8.opList 464 465[system.cpu0.fuPool.FUList8.opList] 466type=OpDesc 467issueLat=3 468opClass=IprAccess 469opLat=3 470 471[system.cpu0.icache] 472type=BaseCache 473addr_range=0:18446744073709551615 474assoc=1 475block_size=64 476forward_snoops=true 477hash_delay=1 478is_top_level=true 479latency=1000 480max_miss_count=0 481mshrs=4 482num_cpus=1 483prefetch_data_accesses_only=false 484prefetch_degree=1 485prefetch_latency=10000 486prefetch_on_access=false 487prefetch_past_page=false 488prefetch_policy=none 489prefetch_serial_squash=false 490prefetch_use_cpu_id=true 491prefetcher_size=100 492prioritizeRequests=false 493repl=Null 494size=32768 495subblock_size=0 496tgts_per_mshr=20 497trace_addr=0 498two_queue=false 499write_buffers=8 500cpu_side=system.cpu0.icache_port 501mem_side=system.toL2Bus.port[1] 502 503[system.cpu0.interrupts] 504type=ArmInterrupts 505 506[system.cpu0.itb] 507type=ArmTLB 508children=walker 509size=64 510walker=system.cpu0.itb.walker 511 512[system.cpu0.itb.walker] 513type=ArmTableWalker 514max_backoff=100000 515min_backoff=0 516sys=system 517port=system.toL2Bus.port[3] 518 519[system.cpu0.tracer] 520type=ExeTracer 521 522[system.cpu1] 523type=DerivO3CPU 524children=dcache dtb fuPool icache interrupts itb tracer 525BTBEntries=4096 526BTBTagSize=16 527LFSTSize=1024 528LQEntries=32 529LSQCheckLoads=true 530LSQDepCheckShift=4 531RASSize=16 532SQEntries=32 533SSITSize=1024 534activity=0 535backComSize=5 536cachePorts=200 537checker=Null 538choiceCtrBits=2 539choicePredictorSize=8192 540clock=500 541commitToDecodeDelay=1 542commitToFetchDelay=1 543commitToIEWDelay=1 544commitToRenameDelay=1 545commitWidth=8 546cpu_id=1 547decodeToFetchDelay=1 548decodeToRenameDelay=1 549decodeWidth=8 550defer_registration=false 551dispatchWidth=8 552do_checkpoint_insts=true 553do_quiesce=true 554do_statistics_insts=true 555dtb=system.cpu1.dtb 556fetchToDecodeDelay=1 557fetchTrapLatency=1 558fetchWidth=8 559forwardComSize=5 560fuPool=system.cpu1.fuPool 561function_trace=false 562function_trace_start=0 563globalCtrBits=2 564globalHistoryBits=13 565globalPredictorSize=8192 566iewToCommitDelay=1 567iewToDecodeDelay=1 568iewToFetchDelay=1 569iewToRenameDelay=1 570instShiftAmt=2 571interrupts=system.cpu1.interrupts 572issueToExecuteDelay=1 573issueWidth=8 574itb=system.cpu1.itb 575localCtrBits=2 576localHistoryBits=11 577localHistoryTableSize=2048 578localPredictorSize=2048 579max_insts_all_threads=0 580max_insts_any_thread=0 581max_loads_all_threads=0 582max_loads_any_thread=0 583numIQEntries=64 584numPhysFloatRegs=256 585numPhysIntRegs=256 586numROBEntries=192 587numRobs=1 588numThreads=1 589phase=0 590predType=tournament 591profile=0 592progress_interval=0 593renameToDecodeDelay=1 594renameToFetchDelay=1 595renameToIEWDelay=2 596renameToROBDelay=1 597renameWidth=8 598smtCommitPolicy=RoundRobin 599smtFetchPolicy=SingleThread 600smtIQPolicy=Partitioned 601smtIQThreshold=100 602smtLSQPolicy=Partitioned 603smtLSQThreshold=100 604smtNumFetchingThreads=1 605smtROBPolicy=Partitioned 606smtROBThreshold=100 607squashWidth=8 608store_set_clear_period=250000 609system=system 610tracer=system.cpu1.tracer 611trapLatency=13 612wbDepth=1 613wbWidth=8 614dcache_port=system.cpu1.dcache.cpu_side 615icache_port=system.cpu1.icache.cpu_side 616 617[system.cpu1.dcache] 618type=BaseCache 619addr_range=0:18446744073709551615 620assoc=4 621block_size=64 622forward_snoops=true 623hash_delay=1 624is_top_level=true 625latency=1000 626max_miss_count=0 627mshrs=4 628num_cpus=1 629prefetch_data_accesses_only=false 630prefetch_degree=1 631prefetch_latency=10000 632prefetch_on_access=false 633prefetch_past_page=false 634prefetch_policy=none 635prefetch_serial_squash=false 636prefetch_use_cpu_id=true 637prefetcher_size=100 638prioritizeRequests=false 639repl=Null 640size=32768 641subblock_size=0 642tgts_per_mshr=20 643trace_addr=0 644two_queue=false 645write_buffers=8 646cpu_side=system.cpu1.dcache_port 647mem_side=system.toL2Bus.port[6] 648 649[system.cpu1.dtb] 650type=ArmTLB 651children=walker 652size=64 653walker=system.cpu1.dtb.walker 654 655[system.cpu1.dtb.walker] 656type=ArmTableWalker 657max_backoff=100000 658min_backoff=0 659sys=system 660port=system.toL2Bus.port[8] 661 662[system.cpu1.fuPool] 663type=FUPool 664children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 665FUList=system.cpu1.fuPool.FUList0 system.cpu1.fuPool.FUList1 system.cpu1.fuPool.FUList2 system.cpu1.fuPool.FUList3 system.cpu1.fuPool.FUList4 system.cpu1.fuPool.FUList5 system.cpu1.fuPool.FUList6 system.cpu1.fuPool.FUList7 system.cpu1.fuPool.FUList8 666 667[system.cpu1.fuPool.FUList0] 668type=FUDesc 669children=opList 670count=6 671opList=system.cpu1.fuPool.FUList0.opList 672 673[system.cpu1.fuPool.FUList0.opList] 674type=OpDesc 675issueLat=1 676opClass=IntAlu 677opLat=1 678 679[system.cpu1.fuPool.FUList1] 680type=FUDesc 681children=opList0 opList1 682count=2 683opList=system.cpu1.fuPool.FUList1.opList0 system.cpu1.fuPool.FUList1.opList1 684 685[system.cpu1.fuPool.FUList1.opList0] 686type=OpDesc 687issueLat=1 688opClass=IntMult 689opLat=3 690 691[system.cpu1.fuPool.FUList1.opList1] 692type=OpDesc 693issueLat=19 694opClass=IntDiv 695opLat=20 696 697[system.cpu1.fuPool.FUList2] 698type=FUDesc 699children=opList0 opList1 opList2 700count=4 701opList=system.cpu1.fuPool.FUList2.opList0 system.cpu1.fuPool.FUList2.opList1 system.cpu1.fuPool.FUList2.opList2 702 703[system.cpu1.fuPool.FUList2.opList0] 704type=OpDesc 705issueLat=1 706opClass=FloatAdd 707opLat=2 708 709[system.cpu1.fuPool.FUList2.opList1] 710type=OpDesc 711issueLat=1 712opClass=FloatCmp 713opLat=2 714 715[system.cpu1.fuPool.FUList2.opList2] 716type=OpDesc 717issueLat=1 718opClass=FloatCvt 719opLat=2 720 721[system.cpu1.fuPool.FUList3] 722type=FUDesc 723children=opList0 opList1 opList2 724count=2 725opList=system.cpu1.fuPool.FUList3.opList0 system.cpu1.fuPool.FUList3.opList1 system.cpu1.fuPool.FUList3.opList2 726 727[system.cpu1.fuPool.FUList3.opList0] 728type=OpDesc 729issueLat=1 730opClass=FloatMult 731opLat=4 732 733[system.cpu1.fuPool.FUList3.opList1] 734type=OpDesc 735issueLat=12 736opClass=FloatDiv 737opLat=12 738 739[system.cpu1.fuPool.FUList3.opList2] 740type=OpDesc 741issueLat=24 742opClass=FloatSqrt 743opLat=24 744 745[system.cpu1.fuPool.FUList4] 746type=FUDesc 747children=opList 748count=0 749opList=system.cpu1.fuPool.FUList4.opList 750 751[system.cpu1.fuPool.FUList4.opList] 752type=OpDesc 753issueLat=1 754opClass=MemRead 755opLat=1 756 757[system.cpu1.fuPool.FUList5] 758type=FUDesc 759children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 760count=4 761opList=system.cpu1.fuPool.FUList5.opList00 system.cpu1.fuPool.FUList5.opList01 system.cpu1.fuPool.FUList5.opList02 system.cpu1.fuPool.FUList5.opList03 system.cpu1.fuPool.FUList5.opList04 system.cpu1.fuPool.FUList5.opList05 system.cpu1.fuPool.FUList5.opList06 system.cpu1.fuPool.FUList5.opList07 system.cpu1.fuPool.FUList5.opList08 system.cpu1.fuPool.FUList5.opList09 system.cpu1.fuPool.FUList5.opList10 system.cpu1.fuPool.FUList5.opList11 system.cpu1.fuPool.FUList5.opList12 system.cpu1.fuPool.FUList5.opList13 system.cpu1.fuPool.FUList5.opList14 system.cpu1.fuPool.FUList5.opList15 system.cpu1.fuPool.FUList5.opList16 system.cpu1.fuPool.FUList5.opList17 system.cpu1.fuPool.FUList5.opList18 system.cpu1.fuPool.FUList5.opList19 762 763[system.cpu1.fuPool.FUList5.opList00] 764type=OpDesc 765issueLat=1 766opClass=SimdAdd 767opLat=1 768 769[system.cpu1.fuPool.FUList5.opList01] 770type=OpDesc 771issueLat=1 772opClass=SimdAddAcc 773opLat=1 774 775[system.cpu1.fuPool.FUList5.opList02] 776type=OpDesc 777issueLat=1 778opClass=SimdAlu 779opLat=1 780 781[system.cpu1.fuPool.FUList5.opList03] 782type=OpDesc 783issueLat=1 784opClass=SimdCmp 785opLat=1 786 787[system.cpu1.fuPool.FUList5.opList04] 788type=OpDesc 789issueLat=1 790opClass=SimdCvt 791opLat=1 792 793[system.cpu1.fuPool.FUList5.opList05] 794type=OpDesc 795issueLat=1 796opClass=SimdMisc 797opLat=1 798 799[system.cpu1.fuPool.FUList5.opList06] 800type=OpDesc 801issueLat=1 802opClass=SimdMult 803opLat=1 804 805[system.cpu1.fuPool.FUList5.opList07] 806type=OpDesc 807issueLat=1 808opClass=SimdMultAcc 809opLat=1 810 811[system.cpu1.fuPool.FUList5.opList08] 812type=OpDesc 813issueLat=1 814opClass=SimdShift 815opLat=1 816 817[system.cpu1.fuPool.FUList5.opList09] 818type=OpDesc 819issueLat=1 820opClass=SimdShiftAcc 821opLat=1 822 823[system.cpu1.fuPool.FUList5.opList10] 824type=OpDesc 825issueLat=1 826opClass=SimdSqrt 827opLat=1 828 829[system.cpu1.fuPool.FUList5.opList11] 830type=OpDesc 831issueLat=1 832opClass=SimdFloatAdd 833opLat=1 834 835[system.cpu1.fuPool.FUList5.opList12] 836type=OpDesc 837issueLat=1 838opClass=SimdFloatAlu 839opLat=1 840 841[system.cpu1.fuPool.FUList5.opList13] 842type=OpDesc 843issueLat=1 844opClass=SimdFloatCmp 845opLat=1 846 847[system.cpu1.fuPool.FUList5.opList14] 848type=OpDesc 849issueLat=1 850opClass=SimdFloatCvt 851opLat=1 852 853[system.cpu1.fuPool.FUList5.opList15] 854type=OpDesc 855issueLat=1 856opClass=SimdFloatDiv 857opLat=1 858 859[system.cpu1.fuPool.FUList5.opList16] 860type=OpDesc 861issueLat=1 862opClass=SimdFloatMisc 863opLat=1 864 865[system.cpu1.fuPool.FUList5.opList17] 866type=OpDesc 867issueLat=1 868opClass=SimdFloatMult 869opLat=1 870 871[system.cpu1.fuPool.FUList5.opList18] 872type=OpDesc 873issueLat=1 874opClass=SimdFloatMultAcc 875opLat=1 876 877[system.cpu1.fuPool.FUList5.opList19] 878type=OpDesc 879issueLat=1 880opClass=SimdFloatSqrt 881opLat=1 882 883[system.cpu1.fuPool.FUList6] 884type=FUDesc 885children=opList 886count=0 887opList=system.cpu1.fuPool.FUList6.opList 888 889[system.cpu1.fuPool.FUList6.opList] 890type=OpDesc 891issueLat=1 892opClass=MemWrite 893opLat=1 894 895[system.cpu1.fuPool.FUList7] 896type=FUDesc 897children=opList0 opList1 898count=4 899opList=system.cpu1.fuPool.FUList7.opList0 system.cpu1.fuPool.FUList7.opList1 900 901[system.cpu1.fuPool.FUList7.opList0] 902type=OpDesc 903issueLat=1 904opClass=MemRead 905opLat=1 906 907[system.cpu1.fuPool.FUList7.opList1] 908type=OpDesc 909issueLat=1 910opClass=MemWrite 911opLat=1 912 913[system.cpu1.fuPool.FUList8] 914type=FUDesc 915children=opList 916count=1 917opList=system.cpu1.fuPool.FUList8.opList 918 919[system.cpu1.fuPool.FUList8.opList] 920type=OpDesc 921issueLat=3 922opClass=IprAccess 923opLat=3 924 925[system.cpu1.icache] 926type=BaseCache 927addr_range=0:18446744073709551615 928assoc=1 929block_size=64 930forward_snoops=true 931hash_delay=1 932is_top_level=true 933latency=1000 934max_miss_count=0 935mshrs=4 936num_cpus=1 937prefetch_data_accesses_only=false 938prefetch_degree=1 939prefetch_latency=10000 940prefetch_on_access=false 941prefetch_past_page=false 942prefetch_policy=none 943prefetch_serial_squash=false 944prefetch_use_cpu_id=true 945prefetcher_size=100 946prioritizeRequests=false 947repl=Null 948size=32768 949subblock_size=0 950tgts_per_mshr=20 951trace_addr=0 952two_queue=false 953write_buffers=8 954cpu_side=system.cpu1.icache_port 955mem_side=system.toL2Bus.port[5] 956 957[system.cpu1.interrupts] 958type=ArmInterrupts 959 960[system.cpu1.itb] 961type=ArmTLB 962children=walker 963size=64 964walker=system.cpu1.itb.walker 965 966[system.cpu1.itb.walker] 967type=ArmTableWalker 968max_backoff=100000 969min_backoff=0 970sys=system 971port=system.toL2Bus.port[7] 972 973[system.cpu1.tracer] 974type=ExeTracer 975 976[system.intrctrl] 977type=IntrControl 978sys=system 979 980[system.iobus] 981type=Bus 982block_size=64 983bus_id=0 984clock=1000 985header_cycles=1 986use_default_range=false 987width=64 988port=system.bridge.master system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.clcd.dma system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.cf_ctrl.dma system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc_fake.pio system.realview.flash_fake.pio system.iocache.cpu_side 989 990[system.iocache] 991type=BaseCache 992addr_range=0:268435455 993assoc=8 994block_size=64 995forward_snoops=false 996hash_delay=1 997is_top_level=false 998latency=50000 999max_miss_count=0 1000mshrs=20 1001num_cpus=1 1002prefetch_data_accesses_only=false 1003prefetch_degree=1 1004prefetch_latency=500000 1005prefetch_on_access=false 1006prefetch_past_page=false 1007prefetch_policy=none 1008prefetch_serial_squash=false 1009prefetch_use_cpu_id=true 1010prefetcher_size=100 1011prioritizeRequests=false 1012repl=Null 1013size=1024 1014subblock_size=0 1015tgts_per_mshr=12 1016trace_addr=0 1017two_queue=false 1018write_buffers=8 1019cpu_side=system.iobus.port[28] 1020mem_side=system.membus.port[8] 1021 1022[system.l2c] 1023type=BaseCache 1024addr_range=0:18446744073709551615 1025assoc=8 1026block_size=64 1027forward_snoops=true 1028hash_delay=1 1029is_top_level=false 1030latency=10000 1031max_miss_count=0 1032mshrs=92 1033num_cpus=2 1034prefetch_data_accesses_only=false 1035prefetch_degree=1 1036prefetch_latency=100000 1037prefetch_on_access=false 1038prefetch_past_page=false 1039prefetch_policy=none 1040prefetch_serial_squash=false 1041prefetch_use_cpu_id=true 1042prefetcher_size=100 1043prioritizeRequests=false 1044repl=Null 1045size=4194304 1046subblock_size=0 1047tgts_per_mshr=16 1048trace_addr=0 1049two_queue=false 1050write_buffers=8 1051cpu_side=system.toL2Bus.port[0] 1052mem_side=system.membus.port[9] 1053 1054[system.membus] 1055type=Bus 1056children=badaddr_responder 1057block_size=64 1058bus_id=1 1059clock=1000 1060header_cycles=1 1061use_default_range=false 1062width=64 1063default=system.membus.badaddr_responder.pio 1064port=system.bridge.slave system.nvmem.port[0] system.physmem.port[0] system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio system.system_port system.iocache.mem_side system.l2c.mem_side 1065 1066[system.membus.badaddr_responder] 1067type=IsaFake 1068fake_mem=false 1069pio_addr=0 1070pio_latency=1000 1071pio_size=8 1072platform=system.realview 1073ret_bad_addr=true 1074ret_data16=65535 1075ret_data32=4294967295 1076ret_data64=18446744073709551615 1077ret_data8=255 1078system=system 1079update_data=false 1080warn_access=warn 1081pio=system.membus.default 1082 1083[system.nvmem] 1084type=PhysicalMemory 1085file= 1086latency=30000 1087latency_var=0 1088null=false 1089range=2147483648:2214592511 1090zero=true 1091port=system.membus.port[1] 1092 1093[system.physmem] 1094type=PhysicalMemory 1095file= 1096latency=30000 1097latency_var=0 1098null=false 1099range=0:134217727 1100zero=true 1101port=system.membus.port[2] 1102 1103[system.realview] 1104type=RealView 1105children=a9scu aaci_fake cf_ctrl clcd dmac_fake flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake realview_io rtc_fake sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake 1106intrctrl=system.intrctrl 1107pci_cfg_base=0 1108system=system 1109 1110[system.realview.a9scu] 1111type=A9SCU 1112pio_addr=520093696 1113pio_latency=1000 1114platform=system.realview 1115system=system 1116pio=system.membus.port[5] 1117 1118[system.realview.aaci_fake] 1119type=AmbaFake 1120amba_id=0 1121ignore_access=false 1122pio_addr=268451840 1123pio_latency=1000 1124platform=system.realview 1125system=system 1126pio=system.iobus.port[24] 1127 1128[system.realview.cf_ctrl] 1129type=IdeController 1130BAR0=402653184 1131BAR0LegacyIO=true 1132BAR0Size=16 1133BAR1=402653440 1134BAR1LegacyIO=true 1135BAR1Size=1 1136BAR2=1 1137BAR2LegacyIO=false 1138BAR2Size=8 1139BAR3=1 1140BAR3LegacyIO=false 1141BAR3Size=4 1142BAR4=1 1143BAR4LegacyIO=false 1144BAR4Size=16 1145BAR5=1 1146BAR5LegacyIO=false 1147BAR5Size=0 1148BIST=0 1149CacheLineSize=0 1150CardbusCIS=0 1151ClassCode=1 1152Command=1 1153DeviceID=28945 1154ExpansionROM=0 1155HeaderType=0 1156InterruptLine=31 1157InterruptPin=1 1158LatencyTimer=0 1159MaximumLatency=0 1160MinimumGrant=0 1161ProgIF=133 1162Revision=0 1163Status=640 1164SubClassCode=1 1165SubsystemID=0 1166SubsystemVendorID=0 1167VendorID=32902 1168config_latency=20000 1169ctrl_offset=2 1170disks=system.cf0 1171io_shift=1 1172max_backoff_delay=10000000 1173min_backoff_delay=4000 1174pci_bus=2 1175pci_dev=7 1176pci_func=0 1177pio_latency=1000 1178platform=system.realview 1179system=system 1180config=system.iobus.port[10] 1181dma=system.iobus.port[11] 1182pio=system.iobus.port[9] 1183 1184[system.realview.clcd] 1185type=Pl111 1186amba_id=1315089 1187clock=41667 1188gic=system.realview.gic 1189int_num=55 1190max_backoff_delay=10000000 1191min_backoff_delay=4000 1192pio_addr=268566528 1193pio_latency=10000 1194platform=system.realview 1195system=system 1196vnc=system.vncserver 1197dma=system.iobus.port[6] 1198pio=system.iobus.port[5] 1199 1200[system.realview.dmac_fake] 1201type=AmbaFake 1202amba_id=0 1203ignore_access=false 1204pio_addr=268632064 1205pio_latency=1000 1206platform=system.realview 1207system=system 1208pio=system.iobus.port[12] 1209 1210[system.realview.flash_fake] 1211type=IsaFake 1212fake_mem=true 1213pio_addr=1073741824 1214pio_latency=1000 1215pio_size=536870912 1216platform=system.realview 1217ret_bad_addr=false 1218ret_data16=65535 1219ret_data32=4294967295 1220ret_data64=18446744073709551615 1221ret_data8=255 1222system=system 1223update_data=false 1224warn_access= 1225pio=system.iobus.port[27] 1226 1227[system.realview.gic] 1228type=Gic 1229cpu_addr=520093952 1230cpu_pio_delay=10000 1231dist_addr=520097792 1232dist_pio_delay=10000 1233int_latency=10000 1234it_lines=128 1235platform=system.realview 1236system=system 1237pio=system.membus.port[3] 1238 1239[system.realview.gpio0_fake] 1240type=AmbaFake 1241amba_id=0 1242ignore_access=false 1243pio_addr=268513280 1244pio_latency=1000 1245platform=system.realview 1246system=system 1247pio=system.iobus.port[19] 1248 1249[system.realview.gpio1_fake] 1250type=AmbaFake 1251amba_id=0 1252ignore_access=false 1253pio_addr=268517376 1254pio_latency=1000 1255platform=system.realview 1256system=system 1257pio=system.iobus.port[20] 1258 1259[system.realview.gpio2_fake] 1260type=AmbaFake 1261amba_id=0 1262ignore_access=false 1263pio_addr=268521472 1264pio_latency=1000 1265platform=system.realview 1266system=system 1267pio=system.iobus.port[21] 1268 1269[system.realview.kmi0] 1270type=Pl050 1271amba_id=1314896 1272gic=system.realview.gic 1273int_delay=1000000 1274int_num=52 1275is_mouse=false 1276pio_addr=268460032 1277pio_latency=1000 1278platform=system.realview 1279system=system 1280vnc=system.vncserver 1281pio=system.iobus.port[7] 1282 1283[system.realview.kmi1] 1284type=Pl050 1285amba_id=1314896 1286gic=system.realview.gic 1287int_delay=1000000 1288int_num=53 1289is_mouse=true 1290pio_addr=268464128 1291pio_latency=1000 1292platform=system.realview 1293system=system 1294vnc=system.vncserver 1295pio=system.iobus.port[8] 1296 1297[system.realview.l2x0_fake] 1298type=IsaFake 1299fake_mem=false 1300pio_addr=520101888 1301pio_latency=1000 1302pio_size=4095 1303platform=system.realview 1304ret_bad_addr=false 1305ret_data16=65535 1306ret_data32=4294967295 1307ret_data64=18446744073709551615 1308ret_data8=255 1309system=system 1310update_data=false 1311warn_access= 1312pio=system.membus.port[4] 1313 1314[system.realview.local_cpu_timer] 1315type=CpuLocalTimer 1316clock=1000 1317gic=system.realview.gic 1318int_num_timer=29 1319int_num_watchdog=30 1320pio_addr=520095232 1321pio_latency=1000 1322platform=system.realview 1323system=system 1324pio=system.membus.port[6] 1325 1326[system.realview.mmc_fake] 1327type=AmbaFake 1328amba_id=0 1329ignore_access=false 1330pio_addr=268455936 1331pio_latency=1000 1332platform=system.realview 1333system=system 1334pio=system.iobus.port[25] 1335 1336[system.realview.realview_io] 1337type=RealViewCtrl 1338idreg=0 1339pio_addr=268435456 1340pio_latency=1000 1341platform=system.realview 1342proc_id0=201326592 1343proc_id1=201327138 1344system=system 1345pio=system.iobus.port[2] 1346 1347[system.realview.rtc_fake] 1348type=AmbaFake 1349amba_id=266289 1350ignore_access=false 1351pio_addr=268529664 1352pio_latency=1000 1353platform=system.realview 1354system=system 1355pio=system.iobus.port[26] 1356 1357[system.realview.sci_fake] 1358type=AmbaFake 1359amba_id=0 1360ignore_access=false 1361pio_addr=268492800 1362pio_latency=1000 1363platform=system.realview 1364system=system 1365pio=system.iobus.port[23] 1366 1367[system.realview.smc_fake] 1368type=AmbaFake 1369amba_id=0 1370ignore_access=false 1371pio_addr=269357056 1372pio_latency=1000 1373platform=system.realview 1374system=system 1375pio=system.iobus.port[16] 1376 1377[system.realview.sp810_fake] 1378type=AmbaFake 1379amba_id=0 1380ignore_access=true 1381pio_addr=268439552 1382pio_latency=1000 1383platform=system.realview 1384system=system 1385pio=system.iobus.port[17] 1386 1387[system.realview.ssp_fake] 1388type=AmbaFake 1389amba_id=0 1390ignore_access=false 1391pio_addr=268488704 1392pio_latency=1000 1393platform=system.realview 1394system=system 1395pio=system.iobus.port[22] 1396 1397[system.realview.timer0] 1398type=Sp804 1399amba_id=1316868 1400clock0=1000000 1401clock1=1000000 1402gic=system.realview.gic 1403int_num0=36 1404int_num1=36 1405pio_addr=268505088 1406pio_latency=1000 1407platform=system.realview 1408system=system 1409pio=system.iobus.port[3] 1410 1411[system.realview.timer1] 1412type=Sp804 1413amba_id=1316868 1414clock0=1000000 1415clock1=1000000 1416gic=system.realview.gic 1417int_num0=37 1418int_num1=37 1419pio_addr=268509184 1420pio_latency=1000 1421platform=system.realview 1422system=system 1423pio=system.iobus.port[4] 1424 1425[system.realview.uart] 1426type=Pl011 1427end_on_eot=false 1428gic=system.realview.gic 1429int_delay=100000 1430int_num=44 1431pio_addr=268472320 1432pio_latency=1000 1433platform=system.realview 1434system=system 1435terminal=system.terminal 1436pio=system.iobus.port[1] 1437 1438[system.realview.uart1_fake] 1439type=AmbaFake 1440amba_id=0 1441ignore_access=false 1442pio_addr=268476416 1443pio_latency=1000 1444platform=system.realview 1445system=system 1446pio=system.iobus.port[13] 1447 1448[system.realview.uart2_fake] 1449type=AmbaFake 1450amba_id=0 1451ignore_access=false 1452pio_addr=268480512 1453pio_latency=1000 1454platform=system.realview 1455system=system 1456pio=system.iobus.port[14] 1457 1458[system.realview.uart3_fake] 1459type=AmbaFake 1460amba_id=0 1461ignore_access=false 1462pio_addr=268484608 1463pio_latency=1000 1464platform=system.realview 1465system=system 1466pio=system.iobus.port[15] 1467 1468[system.realview.watchdog_fake] 1469type=AmbaFake 1470amba_id=0 1471ignore_access=false 1472pio_addr=268500992 1473pio_latency=1000 1474platform=system.realview 1475system=system 1476pio=system.iobus.port[18] 1477 1478[system.terminal] 1479type=Terminal 1480intr_control=system.intrctrl 1481number=0 1482output=true 1483port=3456 1484 1485[system.toL2Bus] 1486type=Bus 1487block_size=64 1488bus_id=0 1489clock=1000 1490header_cycles=1 1491use_default_range=false 1492width=64 1493port=system.l2c.cpu_side system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu1.itb.walker.port system.cpu1.dtb.walker.port 1494 1495[system.vncserver] 1496type=VncServer 1497frame_capture=false 1498number=0 1499port=5900 1500 1501