simerr revision 11570:4aac82f10951
16757SAli.Saidi@ARM.comwarn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
26757SAli.Saidi@ARM.comwarn: Sockets disabled, not accepting vnc client connections
36757SAli.Saidi@ARM.comwarn: Sockets disabled, not accepting terminal connections
46757SAli.Saidi@ARM.comwarn: Sockets disabled, not accepting gdb connections
56757SAli.Saidi@ARM.comwarn: ClockedObject: More than one power state change request encountered within the same simulation tick
67090SAli.Saidi@ARM.comwarn: Existing EnergyCtrl, but no enabled DVFSHandler found.
77090SAli.Saidi@ARM.comwarn: Not doing anything for miscreg ACTLR
87090SAli.Saidi@ARM.comwarn: Not doing anything for write of miscreg ACTLR
97090SAli.Saidi@ARM.comwarn: The clidr register always reports 0 caches.
107090SAli.Saidi@ARM.comwarn: clidr LoUIS field of 0b001 to match current ARM implementations.
117090SAli.Saidi@ARM.comwarn: The csselr register isn't implemented.
127090SAli.Saidi@ARM.comwarn: CP14 unimplemented crn[0], opc1[6], crm[0], opc2[0]
137090SAli.Saidi@ARM.comwarn: CP14 unimplemented crn[0], opc1[6], crm[0], opc2[0]
147090SAli.Saidi@ARM.comwarn: 	instruction 'mcr dccmvau' unimplemented
156757SAli.Saidi@ARM.comwarn: 	instruction 'mcr icimvau' unimplemented
166757SAli.Saidi@ARM.comwarn: 	instruction 'mcr bpiallis' unimplemented
176757SAli.Saidi@ARM.comwarn: 	instruction 'mcr icialluis' unimplemented
186757SAli.Saidi@ARM.comwarn: 	instruction 'mcr dccimvac' unimplemented
196757SAli.Saidi@ARM.comwarn: Tried to read RealView I/O at offset 0x60 that doesn't exist
206757SAli.Saidi@ARM.comwarn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
216757SAli.Saidi@ARM.comwarn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
226757SAli.Saidi@ARM.comwarn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
236757SAli.Saidi@ARM.comwarn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
246757SAli.Saidi@ARM.comwarn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
256757SAli.Saidi@ARM.comwarn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
266757SAli.Saidi@ARM.comwarn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
276757SAli.Saidi@ARM.comwarn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
286757SAli.Saidi@ARM.comwarn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
296757SAli.Saidi@ARM.comwarn: CP14 unimplemented crn[1], opc1[0], crm[1], opc2[4]
306757SAli.Saidi@ARM.comwarn: CP14 unimplemented crn[1], opc1[0], crm[3], opc2[4]
316757SAli.Saidi@ARM.comwarn: CP14 unimplemented crn[1], opc1[0], crm[0], opc2[4]
326757SAli.Saidi@ARM.comwarn: CP14 unimplemented crn[0], opc1[0], crm[7], opc2[0]
336757SAli.Saidi@ARM.comwarn: CP14 unimplemented crn[1], opc1[0], crm[5], opc2[4]
346757SAli.Saidi@ARM.comwarn: Returning zero for read from miscreg pmcr
356757SAli.Saidi@ARM.comwarn: Ignoring write to miscreg pmcntenclr
366757SAli.Saidi@ARM.comwarn: Ignoring write to miscreg pmintenclr
376757SAli.Saidi@ARM.comwarn: Ignoring write to miscreg pmovsr
386757SAli.Saidi@ARM.comwarn: Ignoring write to miscreg pmcr
396757SAli.Saidi@ARM.comwarn: 	instruction 'mcr bpiall' unimplemented
406757SAli.Saidi@ARM.com