config.ini revision 10260:384d554cea8c
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxArmSystem 13children=bridge cf0 clk_domain cpu cpu_clk_domain intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain 14atags_addr=256 15boot_loader=/arm/projectscratch/pd/sysrandd/dist/binaries/boot.arm 16boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1 17boot_release_addr=65528 18cache_line_size=64 19clk_domain=system.clk_domain 20dtb_filename= 21early_kernel_symbols=false 22enable_context_switch_stats_dump=false 23eventq_index=0 24flags_addr=268435504 25gic_cpu_addr=520093952 26have_generic_timer=false 27have_large_asid_64=false 28have_lpae=false 29have_security=false 30have_virtualization=false 31highest_el_is_64=false 32init_param=0 33kernel=/arm/projectscratch/pd/sysrandd/dist/binaries/vmlinux.arm.smp.fb.2.6.38.8 34load_addr_mask=268435455 35load_offset=0 36machine_type=RealView_PBX 37mem_mode=timing 38mem_ranges=0:134217727 39memories=system.physmem system.realview.nvmem 40multi_proc=true 41num_work_ids=16 42panic_on_oops=true 43panic_on_panic=true 44phys_addr_range_64=40 45readfile=tests/halt.sh 46reset_addr_64=0 47symbolfile= 48work_begin_ckpt_count=0 49work_begin_cpu_id_exit=-1 50work_begin_exit_count=0 51work_cpus_ckpt_count=0 52work_end_ckpt_count=0 53work_end_exit_count=0 54work_item_id=-1 55system_port=system.membus.slave[0] 56 57[system.bridge] 58type=Bridge 59clk_domain=system.clk_domain 60delay=50000 61eventq_index=0 62ranges=268435456:520093695 1073741824:1610612735 63req_size=16 64resp_size=16 65master=system.iobus.slave[0] 66slave=system.membus.master[0] 67 68[system.cf0] 69type=IdeDisk 70children=image 71delay=1000000 72driveID=master 73eventq_index=0 74image=system.cf0.image 75 76[system.cf0.image] 77type=CowDiskImage 78children=child 79child=system.cf0.image.child 80eventq_index=0 81image_file= 82read_only=false 83table_size=65536 84 85[system.cf0.image.child] 86type=RawDiskImage 87eventq_index=0 88image_file=/arm/projectscratch/pd/sysrandd/dist/disks/linux-arm-ael.img 89read_only=true 90 91[system.clk_domain] 92type=SrcClockDomain 93clock=1000 94eventq_index=0 95voltage_domain=system.voltage_domain 96 97[system.cpu] 98type=MinorCPU 99children=branchPred dcache dstage2_mmu dtb executeFuncUnits icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer 100branchPred=system.cpu.branchPred 101checker=Null 102clk_domain=system.cpu_clk_domain 103cpu_id=0 104decodeCycleInput=true 105decodeInputBufferSize=3 106decodeInputWidth=2 107decodeToExecuteForwardDelay=1 108do_checkpoint_insts=true 109do_quiesce=true 110do_statistics_insts=true 111dstage2_mmu=system.cpu.dstage2_mmu 112dtb=system.cpu.dtb 113enableIdling=true 114eventq_index=0 115executeAllowEarlyMemoryIssue=true 116executeBranchDelay=1 117executeCommitLimit=2 118executeCycleInput=true 119executeFuncUnits=system.cpu.executeFuncUnits 120executeInputBufferSize=7 121executeInputWidth=2 122executeIssueLimit=2 123executeLSQMaxStoreBufferStoresPerCycle=2 124executeLSQRequestsQueueSize=1 125executeLSQStoreBufferSize=5 126executeLSQTransfersQueueSize=2 127executeMaxAccessesInMemory=2 128executeMemoryCommitLimit=1 129executeMemoryIssueLimit=1 130executeMemoryWidth=0 131executeSetTraceTimeOnCommit=true 132executeSetTraceTimeOnIssue=false 133fetch1FetchLimit=1 134fetch1LineSnapWidth=0 135fetch1LineWidth=0 136fetch1ToFetch2BackwardDelay=1 137fetch1ToFetch2ForwardDelay=1 138fetch2CycleInput=true 139fetch2InputBufferSize=2 140fetch2ToDecodeForwardDelay=1 141function_trace=false 142function_trace_start=0 143interrupts=system.cpu.interrupts 144isa=system.cpu.isa 145istage2_mmu=system.cpu.istage2_mmu 146itb=system.cpu.itb 147max_insts_all_threads=0 148max_insts_any_thread=0 149max_loads_all_threads=0 150max_loads_any_thread=0 151numThreads=1 152profile=0 153progress_interval=0 154simpoint_start_insts= 155switched_out=false 156system=system 157tracer=system.cpu.tracer 158workload= 159dcache_port=system.cpu.dcache.cpu_side 160icache_port=system.cpu.icache.cpu_side 161 162[system.cpu.branchPred] 163type=BranchPredictor 164BTBEntries=4096 165BTBTagSize=16 166RASSize=16 167choiceCtrBits=2 168choicePredictorSize=8192 169eventq_index=0 170globalCtrBits=2 171globalPredictorSize=8192 172instShiftAmt=2 173localCtrBits=2 174localHistoryTableSize=2048 175localPredictorSize=2048 176numThreads=1 177predType=tournament 178 179[system.cpu.dcache] 180type=BaseCache 181children=tags 182addr_ranges=0:18446744073709551615 183assoc=4 184clk_domain=system.cpu_clk_domain 185eventq_index=0 186forward_snoops=true 187hit_latency=2 188is_top_level=true 189max_miss_count=0 190mshrs=4 191prefetch_on_access=false 192prefetcher=Null 193response_latency=2 194sequential_access=false 195size=32768 196system=system 197tags=system.cpu.dcache.tags 198tgts_per_mshr=20 199two_queue=false 200write_buffers=8 201cpu_side=system.cpu.dcache_port 202mem_side=system.cpu.toL2Bus.slave[1] 203 204[system.cpu.dcache.tags] 205type=LRU 206assoc=4 207block_size=64 208clk_domain=system.cpu_clk_domain 209eventq_index=0 210hit_latency=2 211sequential_access=false 212size=32768 213 214[system.cpu.dstage2_mmu] 215type=ArmStage2MMU 216children=stage2_tlb 217eventq_index=0 218stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb 219tlb=system.cpu.dtb 220 221[system.cpu.dstage2_mmu.stage2_tlb] 222type=ArmTLB 223children=walker 224eventq_index=0 225is_stage2=true 226size=32 227walker=system.cpu.dstage2_mmu.stage2_tlb.walker 228 229[system.cpu.dstage2_mmu.stage2_tlb.walker] 230type=ArmTableWalker 231clk_domain=system.cpu_clk_domain 232eventq_index=0 233is_stage2=true 234num_squash_per_cycle=2 235sys=system 236port=system.cpu.toL2Bus.slave[5] 237 238[system.cpu.dtb] 239type=ArmTLB 240children=walker 241eventq_index=0 242is_stage2=false 243size=64 244walker=system.cpu.dtb.walker 245 246[system.cpu.dtb.walker] 247type=ArmTableWalker 248clk_domain=system.cpu_clk_domain 249eventq_index=0 250is_stage2=false 251num_squash_per_cycle=2 252sys=system 253port=system.cpu.toL2Bus.slave[3] 254 255[system.cpu.executeFuncUnits] 256type=MinorFUPool 257children=funcUnits0 funcUnits1 funcUnits2 funcUnits3 funcUnits4 funcUnits5 funcUnits6 258eventq_index=0 259funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.funcUnits1 system.cpu.executeFuncUnits.funcUnits2 system.cpu.executeFuncUnits.funcUnits3 system.cpu.executeFuncUnits.funcUnits4 system.cpu.executeFuncUnits.funcUnits5 system.cpu.executeFuncUnits.funcUnits6 260 261[system.cpu.executeFuncUnits.funcUnits0] 262type=MinorFU 263children=opClasses timings 264eventq_index=0 265issueLat=1 266opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses 267opLat=3 268timings=system.cpu.executeFuncUnits.funcUnits0.timings 269 270[system.cpu.executeFuncUnits.funcUnits0.opClasses] 271type=MinorOpClassSet 272children=opClasses 273eventq_index=0 274opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses 275 276[system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses] 277type=MinorOpClass 278eventq_index=0 279opClass=IntAlu 280 281[system.cpu.executeFuncUnits.funcUnits0.timings] 282type=MinorFUTiming 283children=opClasses 284description=Int 285eventq_index=0 286extraAssumedLat=0 287extraCommitLat=0 288extraCommitLatExpr=Null 289mask=0 290match=0 291opClasses=system.cpu.executeFuncUnits.funcUnits0.timings.opClasses 292srcRegsRelativeLats=2 293suppress=false 294 295[system.cpu.executeFuncUnits.funcUnits0.timings.opClasses] 296type=MinorOpClassSet 297eventq_index=0 298opClasses= 299 300[system.cpu.executeFuncUnits.funcUnits1] 301type=MinorFU 302children=opClasses timings 303eventq_index=0 304issueLat=1 305opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses 306opLat=3 307timings=system.cpu.executeFuncUnits.funcUnits1.timings 308 309[system.cpu.executeFuncUnits.funcUnits1.opClasses] 310type=MinorOpClassSet 311children=opClasses 312eventq_index=0 313opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses 314 315[system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses] 316type=MinorOpClass 317eventq_index=0 318opClass=IntAlu 319 320[system.cpu.executeFuncUnits.funcUnits1.timings] 321type=MinorFUTiming 322children=opClasses 323description=Int 324eventq_index=0 325extraAssumedLat=0 326extraCommitLat=0 327extraCommitLatExpr=Null 328mask=0 329match=0 330opClasses=system.cpu.executeFuncUnits.funcUnits1.timings.opClasses 331srcRegsRelativeLats=2 332suppress=false 333 334[system.cpu.executeFuncUnits.funcUnits1.timings.opClasses] 335type=MinorOpClassSet 336eventq_index=0 337opClasses= 338 339[system.cpu.executeFuncUnits.funcUnits2] 340type=MinorFU 341children=opClasses timings 342eventq_index=0 343issueLat=1 344opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses 345opLat=3 346timings=system.cpu.executeFuncUnits.funcUnits2.timings 347 348[system.cpu.executeFuncUnits.funcUnits2.opClasses] 349type=MinorOpClassSet 350children=opClasses 351eventq_index=0 352opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses 353 354[system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses] 355type=MinorOpClass 356eventq_index=0 357opClass=IntMult 358 359[system.cpu.executeFuncUnits.funcUnits2.timings] 360type=MinorFUTiming 361children=opClasses 362description=Mul 363eventq_index=0 364extraAssumedLat=0 365extraCommitLat=0 366extraCommitLatExpr=Null 367mask=0 368match=0 369opClasses=system.cpu.executeFuncUnits.funcUnits2.timings.opClasses 370srcRegsRelativeLats=0 371suppress=false 372 373[system.cpu.executeFuncUnits.funcUnits2.timings.opClasses] 374type=MinorOpClassSet 375eventq_index=0 376opClasses= 377 378[system.cpu.executeFuncUnits.funcUnits3] 379type=MinorFU 380children=opClasses 381eventq_index=0 382issueLat=9 383opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses 384opLat=9 385timings= 386 387[system.cpu.executeFuncUnits.funcUnits3.opClasses] 388type=MinorOpClassSet 389children=opClasses 390eventq_index=0 391opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses 392 393[system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses] 394type=MinorOpClass 395eventq_index=0 396opClass=IntDiv 397 398[system.cpu.executeFuncUnits.funcUnits4] 399type=MinorFU 400children=opClasses timings 401eventq_index=0 402issueLat=1 403opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses 404opLat=6 405timings=system.cpu.executeFuncUnits.funcUnits4.timings 406 407[system.cpu.executeFuncUnits.funcUnits4.opClasses] 408type=MinorOpClassSet 409children=opClasses00 opClasses01 opClasses02 opClasses03 opClasses04 opClasses05 opClasses06 opClasses07 opClasses08 opClasses09 opClasses10 opClasses11 opClasses12 opClasses13 opClasses14 opClasses15 opClasses16 opClasses17 opClasses18 opClasses19 opClasses20 opClasses21 opClasses22 opClasses23 opClasses24 opClasses25 410eventq_index=0 411opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25 412 413[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00] 414type=MinorOpClass 415eventq_index=0 416opClass=FloatAdd 417 418[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01] 419type=MinorOpClass 420eventq_index=0 421opClass=FloatCmp 422 423[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02] 424type=MinorOpClass 425eventq_index=0 426opClass=FloatCvt 427 428[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03] 429type=MinorOpClass 430eventq_index=0 431opClass=FloatMult 432 433[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04] 434type=MinorOpClass 435eventq_index=0 436opClass=FloatDiv 437 438[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05] 439type=MinorOpClass 440eventq_index=0 441opClass=FloatSqrt 442 443[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06] 444type=MinorOpClass 445eventq_index=0 446opClass=SimdAdd 447 448[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07] 449type=MinorOpClass 450eventq_index=0 451opClass=SimdAddAcc 452 453[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08] 454type=MinorOpClass 455eventq_index=0 456opClass=SimdAlu 457 458[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09] 459type=MinorOpClass 460eventq_index=0 461opClass=SimdCmp 462 463[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10] 464type=MinorOpClass 465eventq_index=0 466opClass=SimdCvt 467 468[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11] 469type=MinorOpClass 470eventq_index=0 471opClass=SimdMisc 472 473[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12] 474type=MinorOpClass 475eventq_index=0 476opClass=SimdMult 477 478[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13] 479type=MinorOpClass 480eventq_index=0 481opClass=SimdMultAcc 482 483[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14] 484type=MinorOpClass 485eventq_index=0 486opClass=SimdShift 487 488[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15] 489type=MinorOpClass 490eventq_index=0 491opClass=SimdShiftAcc 492 493[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16] 494type=MinorOpClass 495eventq_index=0 496opClass=SimdSqrt 497 498[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17] 499type=MinorOpClass 500eventq_index=0 501opClass=SimdFloatAdd 502 503[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18] 504type=MinorOpClass 505eventq_index=0 506opClass=SimdFloatAlu 507 508[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19] 509type=MinorOpClass 510eventq_index=0 511opClass=SimdFloatCmp 512 513[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20] 514type=MinorOpClass 515eventq_index=0 516opClass=SimdFloatCvt 517 518[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21] 519type=MinorOpClass 520eventq_index=0 521opClass=SimdFloatDiv 522 523[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22] 524type=MinorOpClass 525eventq_index=0 526opClass=SimdFloatMisc 527 528[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23] 529type=MinorOpClass 530eventq_index=0 531opClass=SimdFloatMult 532 533[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24] 534type=MinorOpClass 535eventq_index=0 536opClass=SimdFloatMultAcc 537 538[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25] 539type=MinorOpClass 540eventq_index=0 541opClass=SimdFloatSqrt 542 543[system.cpu.executeFuncUnits.funcUnits4.timings] 544type=MinorFUTiming 545children=opClasses 546description=FloatSimd 547eventq_index=0 548extraAssumedLat=0 549extraCommitLat=0 550extraCommitLatExpr=Null 551mask=0 552match=0 553opClasses=system.cpu.executeFuncUnits.funcUnits4.timings.opClasses 554srcRegsRelativeLats=2 555suppress=false 556 557[system.cpu.executeFuncUnits.funcUnits4.timings.opClasses] 558type=MinorOpClassSet 559eventq_index=0 560opClasses= 561 562[system.cpu.executeFuncUnits.funcUnits5] 563type=MinorFU 564children=opClasses timings 565eventq_index=0 566issueLat=1 567opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses 568opLat=1 569timings=system.cpu.executeFuncUnits.funcUnits5.timings 570 571[system.cpu.executeFuncUnits.funcUnits5.opClasses] 572type=MinorOpClassSet 573children=opClasses0 opClasses1 574eventq_index=0 575opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1 576 577[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0] 578type=MinorOpClass 579eventq_index=0 580opClass=MemRead 581 582[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1] 583type=MinorOpClass 584eventq_index=0 585opClass=MemWrite 586 587[system.cpu.executeFuncUnits.funcUnits5.timings] 588type=MinorFUTiming 589children=opClasses 590description=Mem 591eventq_index=0 592extraAssumedLat=2 593extraCommitLat=0 594extraCommitLatExpr=Null 595mask=0 596match=0 597opClasses=system.cpu.executeFuncUnits.funcUnits5.timings.opClasses 598srcRegsRelativeLats=1 599suppress=false 600 601[system.cpu.executeFuncUnits.funcUnits5.timings.opClasses] 602type=MinorOpClassSet 603eventq_index=0 604opClasses= 605 606[system.cpu.executeFuncUnits.funcUnits6] 607type=MinorFU 608children=opClasses 609eventq_index=0 610issueLat=1 611opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses 612opLat=1 613timings= 614 615[system.cpu.executeFuncUnits.funcUnits6.opClasses] 616type=MinorOpClassSet 617children=opClasses0 opClasses1 618eventq_index=0 619opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1 620 621[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0] 622type=MinorOpClass 623eventq_index=0 624opClass=IprAccess 625 626[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1] 627type=MinorOpClass 628eventq_index=0 629opClass=InstPrefetch 630 631[system.cpu.icache] 632type=BaseCache 633children=tags 634addr_ranges=0:18446744073709551615 635assoc=1 636clk_domain=system.cpu_clk_domain 637eventq_index=0 638forward_snoops=true 639hit_latency=2 640is_top_level=true 641max_miss_count=0 642mshrs=4 643prefetch_on_access=false 644prefetcher=Null 645response_latency=2 646sequential_access=false 647size=32768 648system=system 649tags=system.cpu.icache.tags 650tgts_per_mshr=20 651two_queue=false 652write_buffers=8 653cpu_side=system.cpu.icache_port 654mem_side=system.cpu.toL2Bus.slave[0] 655 656[system.cpu.icache.tags] 657type=LRU 658assoc=1 659block_size=64 660clk_domain=system.cpu_clk_domain 661eventq_index=0 662hit_latency=2 663sequential_access=false 664size=32768 665 666[system.cpu.interrupts] 667type=ArmInterrupts 668eventq_index=0 669 670[system.cpu.isa] 671type=ArmISA 672eventq_index=0 673fpsid=1090793632 674id_aa64afr0_el1=0 675id_aa64afr1_el1=0 676id_aa64dfr0_el1=1052678 677id_aa64dfr1_el1=0 678id_aa64isar0_el1=0 679id_aa64isar1_el1=0 680id_aa64mmfr0_el1=15728642 681id_aa64mmfr1_el1=0 682id_aa64pfr0_el1=17 683id_aa64pfr1_el1=0 684id_isar0=34607377 685id_isar1=34677009 686id_isar2=555950401 687id_isar3=17899825 688id_isar4=268501314 689id_isar5=0 690id_mmfr0=270536963 691id_mmfr1=0 692id_mmfr2=19070976 693id_mmfr3=34611729 694id_pfr0=49 695id_pfr1=4113 696midr=1091551472 697system=system 698 699[system.cpu.istage2_mmu] 700type=ArmStage2MMU 701children=stage2_tlb 702eventq_index=0 703stage2_tlb=system.cpu.istage2_mmu.stage2_tlb 704tlb=system.cpu.itb 705 706[system.cpu.istage2_mmu.stage2_tlb] 707type=ArmTLB 708children=walker 709eventq_index=0 710is_stage2=true 711size=32 712walker=system.cpu.istage2_mmu.stage2_tlb.walker 713 714[system.cpu.istage2_mmu.stage2_tlb.walker] 715type=ArmTableWalker 716clk_domain=system.cpu_clk_domain 717eventq_index=0 718is_stage2=true 719num_squash_per_cycle=2 720sys=system 721port=system.cpu.toL2Bus.slave[4] 722 723[system.cpu.itb] 724type=ArmTLB 725children=walker 726eventq_index=0 727is_stage2=false 728size=64 729walker=system.cpu.itb.walker 730 731[system.cpu.itb.walker] 732type=ArmTableWalker 733clk_domain=system.cpu_clk_domain 734eventq_index=0 735is_stage2=false 736num_squash_per_cycle=2 737sys=system 738port=system.cpu.toL2Bus.slave[2] 739 740[system.cpu.l2cache] 741type=BaseCache 742children=tags 743addr_ranges=0:18446744073709551615 744assoc=8 745clk_domain=system.cpu_clk_domain 746eventq_index=0 747forward_snoops=true 748hit_latency=20 749is_top_level=false 750max_miss_count=0 751mshrs=20 752prefetch_on_access=false 753prefetcher=Null 754response_latency=20 755sequential_access=false 756size=4194304 757system=system 758tags=system.cpu.l2cache.tags 759tgts_per_mshr=12 760two_queue=false 761write_buffers=8 762cpu_side=system.cpu.toL2Bus.master[0] 763mem_side=system.membus.slave[1] 764 765[system.cpu.l2cache.tags] 766type=LRU 767assoc=8 768block_size=64 769clk_domain=system.cpu_clk_domain 770eventq_index=0 771hit_latency=20 772sequential_access=false 773size=4194304 774 775[system.cpu.toL2Bus] 776type=CoherentBus 777clk_domain=system.cpu_clk_domain 778eventq_index=0 779header_cycles=1 780system=system 781use_default_range=false 782width=32 783master=system.cpu.l2cache.cpu_side 784slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port 785 786[system.cpu.tracer] 787type=ExeTracer 788eventq_index=0 789 790[system.cpu_clk_domain] 791type=SrcClockDomain 792clock=500 793eventq_index=0 794voltage_domain=system.voltage_domain 795 796[system.intrctrl] 797type=IntrControl 798eventq_index=0 799sys=system 800 801[system.iobus] 802type=NoncoherentBus 803clk_domain=system.clk_domain 804eventq_index=0 805header_cycles=1 806use_default_range=false 807width=8 808master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc.pio system.realview.flash_fake.pio system.iocache.cpu_side 809slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma 810 811[system.iocache] 812type=BaseCache 813children=tags 814addr_ranges=0:134217727 815assoc=8 816clk_domain=system.clk_domain 817eventq_index=0 818forward_snoops=false 819hit_latency=50 820is_top_level=true 821max_miss_count=0 822mshrs=20 823prefetch_on_access=false 824prefetcher=Null 825response_latency=50 826sequential_access=false 827size=1024 828system=system 829tags=system.iocache.tags 830tgts_per_mshr=12 831two_queue=false 832write_buffers=8 833cpu_side=system.iobus.master[25] 834mem_side=system.membus.slave[2] 835 836[system.iocache.tags] 837type=LRU 838assoc=8 839block_size=64 840clk_domain=system.clk_domain 841eventq_index=0 842hit_latency=50 843sequential_access=false 844size=1024 845 846[system.membus] 847type=CoherentBus 848children=badaddr_responder 849clk_domain=system.clk_domain 850eventq_index=0 851header_cycles=1 852system=system 853use_default_range=false 854width=8 855default=system.membus.badaddr_responder.pio 856master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio system.physmem.port 857slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side 858 859[system.membus.badaddr_responder] 860type=IsaFake 861clk_domain=system.clk_domain 862eventq_index=0 863fake_mem=false 864pio_addr=0 865pio_latency=100000 866pio_size=8 867ret_bad_addr=true 868ret_data16=65535 869ret_data32=4294967295 870ret_data64=18446744073709551615 871ret_data8=255 872system=system 873update_data=false 874warn_access=warn 875pio=system.membus.default 876 877[system.physmem] 878type=DRAMCtrl 879activation_limit=4 880addr_mapping=RoRaBaChCo 881banks_per_rank=8 882burst_length=8 883channels=1 884clk_domain=system.clk_domain 885conf_table_reported=true 886device_bus_width=8 887device_rowbuffer_size=1024 888devices_per_rank=8 889eventq_index=0 890in_addr_map=true 891max_accesses_per_row=16 892mem_sched_policy=frfcfs 893min_writes_per_switch=16 894null=false 895page_policy=open_adaptive 896range=0:134217727 897ranks_per_channel=2 898read_buffer_size=32 899static_backend_latency=10000 900static_frontend_latency=10000 901tBURST=5000 902tCL=13750 903tRAS=35000 904tRCD=13750 905tREFI=7800000 906tRFC=300000 907tRP=13750 908tRRD=6250 909tWTR=7500 910tXAW=40000 911write_buffer_size=64 912write_high_thresh_perc=85 913write_low_thresh_perc=50 914port=system.membus.master[6] 915 916[system.realview] 917type=RealView 918children=a9scu aaci_fake cf_ctrl clcd dmac_fake flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake 919eventq_index=0 920intrctrl=system.intrctrl 921max_mem_size=268435456 922mem_start_addr=0 923pci_cfg_base=0 924system=system 925 926[system.realview.a9scu] 927type=A9SCU 928clk_domain=system.clk_domain 929eventq_index=0 930pio_addr=520093696 931pio_latency=100000 932system=system 933pio=system.membus.master[4] 934 935[system.realview.aaci_fake] 936type=AmbaFake 937amba_id=0 938clk_domain=system.clk_domain 939eventq_index=0 940ignore_access=false 941pio_addr=268451840 942pio_latency=100000 943system=system 944pio=system.iobus.master[21] 945 946[system.realview.cf_ctrl] 947type=IdeController 948BAR0=402653184 949BAR0LegacyIO=true 950BAR0Size=16 951BAR1=402653440 952BAR1LegacyIO=true 953BAR1Size=1 954BAR2=1 955BAR2LegacyIO=false 956BAR2Size=8 957BAR3=1 958BAR3LegacyIO=false 959BAR3Size=4 960BAR4=1 961BAR4LegacyIO=false 962BAR4Size=16 963BAR5=1 964BAR5LegacyIO=false 965BAR5Size=0 966BIST=0 967CacheLineSize=0 968CapabilityPtr=0 969CardbusCIS=0 970ClassCode=1 971Command=1 972DeviceID=28945 973ExpansionROM=0 974HeaderType=0 975InterruptLine=31 976InterruptPin=1 977LatencyTimer=0 978MSICAPBaseOffset=0 979MSICAPCapId=0 980MSICAPMaskBits=0 981MSICAPMsgAddr=0 982MSICAPMsgCtrl=0 983MSICAPMsgData=0 984MSICAPMsgUpperAddr=0 985MSICAPNextCapability=0 986MSICAPPendingBits=0 987MSIXCAPBaseOffset=0 988MSIXCAPCapId=0 989MSIXCAPNextCapability=0 990MSIXMsgCtrl=0 991MSIXPbaOffset=0 992MSIXTableOffset=0 993MaximumLatency=0 994MinimumGrant=0 995PMCAPBaseOffset=0 996PMCAPCapId=0 997PMCAPCapabilities=0 998PMCAPCtrlStatus=0 999PMCAPNextCapability=0 1000PXCAPBaseOffset=0 1001PXCAPCapId=0 1002PXCAPCapabilities=0 1003PXCAPDevCap2=0 1004PXCAPDevCapabilities=0 1005PXCAPDevCtrl=0 1006PXCAPDevCtrl2=0 1007PXCAPDevStatus=0 1008PXCAPLinkCap=0 1009PXCAPLinkCtrl=0 1010PXCAPLinkStatus=0 1011PXCAPNextCapability=0 1012ProgIF=133 1013Revision=0 1014Status=640 1015SubClassCode=1 1016SubsystemID=0 1017SubsystemVendorID=0 1018VendorID=32902 1019clk_domain=system.clk_domain 1020config_latency=20000 1021ctrl_offset=2 1022disks=system.cf0 1023eventq_index=0 1024io_shift=1 1025pci_bus=2 1026pci_dev=7 1027pci_func=0 1028pio_latency=30000 1029platform=system.realview 1030system=system 1031config=system.iobus.master[8] 1032dma=system.iobus.slave[2] 1033pio=system.iobus.master[7] 1034 1035[system.realview.clcd] 1036type=Pl111 1037amba_id=1315089 1038clk_domain=system.clk_domain 1039enable_capture=true 1040eventq_index=0 1041gic=system.realview.gic 1042int_num=55 1043pio_addr=268566528 1044pio_latency=10000 1045pixel_clock=41667 1046system=system 1047vnc=system.vncserver 1048dma=system.iobus.slave[1] 1049pio=system.iobus.master[4] 1050 1051[system.realview.dmac_fake] 1052type=AmbaFake 1053amba_id=0 1054clk_domain=system.clk_domain 1055eventq_index=0 1056ignore_access=false 1057pio_addr=268632064 1058pio_latency=100000 1059system=system 1060pio=system.iobus.master[9] 1061 1062[system.realview.flash_fake] 1063type=IsaFake 1064clk_domain=system.clk_domain 1065eventq_index=0 1066fake_mem=true 1067pio_addr=1073741824 1068pio_latency=100000 1069pio_size=536870912 1070ret_bad_addr=false 1071ret_data16=65535 1072ret_data32=4294967295 1073ret_data64=18446744073709551615 1074ret_data8=255 1075system=system 1076update_data=false 1077warn_access= 1078pio=system.iobus.master[24] 1079 1080[system.realview.gic] 1081type=Pl390 1082clk_domain=system.clk_domain 1083cpu_addr=520093952 1084cpu_pio_delay=10000 1085dist_addr=520097792 1086dist_pio_delay=10000 1087eventq_index=0 1088int_latency=10000 1089it_lines=128 1090msix_addr=0 1091platform=system.realview 1092system=system 1093pio=system.membus.master[2] 1094 1095[system.realview.gpio0_fake] 1096type=AmbaFake 1097amba_id=0 1098clk_domain=system.clk_domain 1099eventq_index=0 1100ignore_access=false 1101pio_addr=268513280 1102pio_latency=100000 1103system=system 1104pio=system.iobus.master[16] 1105 1106[system.realview.gpio1_fake] 1107type=AmbaFake 1108amba_id=0 1109clk_domain=system.clk_domain 1110eventq_index=0 1111ignore_access=false 1112pio_addr=268517376 1113pio_latency=100000 1114system=system 1115pio=system.iobus.master[17] 1116 1117[system.realview.gpio2_fake] 1118type=AmbaFake 1119amba_id=0 1120clk_domain=system.clk_domain 1121eventq_index=0 1122ignore_access=false 1123pio_addr=268521472 1124pio_latency=100000 1125system=system 1126pio=system.iobus.master[18] 1127 1128[system.realview.kmi0] 1129type=Pl050 1130amba_id=1314896 1131clk_domain=system.clk_domain 1132eventq_index=0 1133gic=system.realview.gic 1134int_delay=1000000 1135int_num=52 1136is_mouse=false 1137pio_addr=268460032 1138pio_latency=100000 1139system=system 1140vnc=system.vncserver 1141pio=system.iobus.master[5] 1142 1143[system.realview.kmi1] 1144type=Pl050 1145amba_id=1314896 1146clk_domain=system.clk_domain 1147eventq_index=0 1148gic=system.realview.gic 1149int_delay=1000000 1150int_num=53 1151is_mouse=true 1152pio_addr=268464128 1153pio_latency=100000 1154system=system 1155vnc=system.vncserver 1156pio=system.iobus.master[6] 1157 1158[system.realview.l2x0_fake] 1159type=IsaFake 1160clk_domain=system.clk_domain 1161eventq_index=0 1162fake_mem=false 1163pio_addr=520101888 1164pio_latency=100000 1165pio_size=4095 1166ret_bad_addr=false 1167ret_data16=65535 1168ret_data32=4294967295 1169ret_data64=18446744073709551615 1170ret_data8=255 1171system=system 1172update_data=false 1173warn_access= 1174pio=system.membus.master[3] 1175 1176[system.realview.local_cpu_timer] 1177type=CpuLocalTimer 1178clk_domain=system.clk_domain 1179eventq_index=0 1180gic=system.realview.gic 1181int_num_timer=29 1182int_num_watchdog=30 1183pio_addr=520095232 1184pio_latency=100000 1185system=system 1186pio=system.membus.master[5] 1187 1188[system.realview.mmc_fake] 1189type=AmbaFake 1190amba_id=0 1191clk_domain=system.clk_domain 1192eventq_index=0 1193ignore_access=false 1194pio_addr=268455936 1195pio_latency=100000 1196system=system 1197pio=system.iobus.master[22] 1198 1199[system.realview.nvmem] 1200type=SimpleMemory 1201bandwidth=73.000000 1202clk_domain=system.clk_domain 1203conf_table_reported=false 1204eventq_index=0 1205in_addr_map=true 1206latency=30000 1207latency_var=0 1208null=false 1209range=2147483648:2214592511 1210port=system.membus.master[1] 1211 1212[system.realview.realview_io] 1213type=RealViewCtrl 1214clk_domain=system.clk_domain 1215eventq_index=0 1216idreg=0 1217pio_addr=268435456 1218pio_latency=100000 1219proc_id0=201326592 1220proc_id1=201327138 1221system=system 1222pio=system.iobus.master[1] 1223 1224[system.realview.rtc] 1225type=PL031 1226amba_id=3412017 1227clk_domain=system.clk_domain 1228eventq_index=0 1229gic=system.realview.gic 1230int_delay=100000 1231int_num=42 1232pio_addr=268529664 1233pio_latency=100000 1234system=system 1235time=Thu Jan 1 00:00:00 2009 1236pio=system.iobus.master[23] 1237 1238[system.realview.sci_fake] 1239type=AmbaFake 1240amba_id=0 1241clk_domain=system.clk_domain 1242eventq_index=0 1243ignore_access=false 1244pio_addr=268492800 1245pio_latency=100000 1246system=system 1247pio=system.iobus.master[20] 1248 1249[system.realview.smc_fake] 1250type=AmbaFake 1251amba_id=0 1252clk_domain=system.clk_domain 1253eventq_index=0 1254ignore_access=false 1255pio_addr=269357056 1256pio_latency=100000 1257system=system 1258pio=system.iobus.master[13] 1259 1260[system.realview.sp810_fake] 1261type=AmbaFake 1262amba_id=0 1263clk_domain=system.clk_domain 1264eventq_index=0 1265ignore_access=true 1266pio_addr=268439552 1267pio_latency=100000 1268system=system 1269pio=system.iobus.master[14] 1270 1271[system.realview.ssp_fake] 1272type=AmbaFake 1273amba_id=0 1274clk_domain=system.clk_domain 1275eventq_index=0 1276ignore_access=false 1277pio_addr=268488704 1278pio_latency=100000 1279system=system 1280pio=system.iobus.master[19] 1281 1282[system.realview.timer0] 1283type=Sp804 1284amba_id=1316868 1285clk_domain=system.clk_domain 1286clock0=1000000 1287clock1=1000000 1288eventq_index=0 1289gic=system.realview.gic 1290int_num0=36 1291int_num1=36 1292pio_addr=268505088 1293pio_latency=100000 1294system=system 1295pio=system.iobus.master[2] 1296 1297[system.realview.timer1] 1298type=Sp804 1299amba_id=1316868 1300clk_domain=system.clk_domain 1301clock0=1000000 1302clock1=1000000 1303eventq_index=0 1304gic=system.realview.gic 1305int_num0=37 1306int_num1=37 1307pio_addr=268509184 1308pio_latency=100000 1309system=system 1310pio=system.iobus.master[3] 1311 1312[system.realview.uart] 1313type=Pl011 1314clk_domain=system.clk_domain 1315end_on_eot=false 1316eventq_index=0 1317gic=system.realview.gic 1318int_delay=100000 1319int_num=44 1320pio_addr=268472320 1321pio_latency=100000 1322platform=system.realview 1323system=system 1324terminal=system.terminal 1325pio=system.iobus.master[0] 1326 1327[system.realview.uart1_fake] 1328type=AmbaFake 1329amba_id=0 1330clk_domain=system.clk_domain 1331eventq_index=0 1332ignore_access=false 1333pio_addr=268476416 1334pio_latency=100000 1335system=system 1336pio=system.iobus.master[10] 1337 1338[system.realview.uart2_fake] 1339type=AmbaFake 1340amba_id=0 1341clk_domain=system.clk_domain 1342eventq_index=0 1343ignore_access=false 1344pio_addr=268480512 1345pio_latency=100000 1346system=system 1347pio=system.iobus.master[11] 1348 1349[system.realview.uart3_fake] 1350type=AmbaFake 1351amba_id=0 1352clk_domain=system.clk_domain 1353eventq_index=0 1354ignore_access=false 1355pio_addr=268484608 1356pio_latency=100000 1357system=system 1358pio=system.iobus.master[12] 1359 1360[system.realview.watchdog_fake] 1361type=AmbaFake 1362amba_id=0 1363clk_domain=system.clk_domain 1364eventq_index=0 1365ignore_access=false 1366pio_addr=268500992 1367pio_latency=100000 1368system=system 1369pio=system.iobus.master[15] 1370 1371[system.terminal] 1372type=Terminal 1373eventq_index=0 1374intr_control=system.intrctrl 1375number=0 1376output=true 1377port=3456 1378 1379[system.vncserver] 1380type=VncServer 1381eventq_index=0 1382frame_capture=false 1383number=0 1384port=5900 1385 1386[system.voltage_domain] 1387type=VoltageDomain 1388eventq_index=0 1389voltage=1.000000 1390 1391