simout revision 10848 
110260SAndrew.Bardsley@arm.comgem5 Simulator System.  http://gem5.org
210260SAndrew.Bardsley@arm.comgem5 is copyrighted software; use the --copyright option for details.
310260SAndrew.Bardsley@arm.com
410848SAndreas.Sandberg@ARM.comgem5 compiled May  6 2015 17:58:20
510848SAndreas.Sandberg@ARM.comgem5 started May  6 2015 20:43:49
610848SAndreas.Sandberg@ARM.comgem5 executing on e104799-lin
710848SAndreas.Sandberg@ARM.comcommand line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-minor-dual -re /work/gem5/outgoing/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-minor-dual
810848SAndreas.Sandberg@ARM.com
910260SAndrew.Bardsley@arm.comGlobal frequency set at 1000000000000 ticks per second
1010848SAndreas.Sandberg@ARM.cominfo: kernel located at: /work/gem5/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
1110848SAndreas.Sandberg@ARM.com      0: system.cpu0.isa: ISA system set to: 0x50ed000 0x50ed000
1210848SAndreas.Sandberg@ARM.com      0: system.cpu1.isa: ISA system set to: 0x50ed000 0x50ed000
1310513SAli.Saidi@ARM.cominfo: Using bootloader at address 0x10
1410513SAli.Saidi@ARM.cominfo: Using kernel entry physical address at 0x80008000
1510848SAndreas.Sandberg@ARM.cominfo: Loading DTB file: /work/gem5/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb at address 0x88000000
1610260SAndrew.Bardsley@arm.cominfo: Entering event queue @ 0.  Starting simulation...
1710513SAli.Saidi@ARM.cominfo: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
1810513SAli.Saidi@ARM.cominfo: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
1910513SAli.Saidi@ARM.cominfo: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
2010513SAli.Saidi@ARM.cominfo: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
2110513SAli.Saidi@ARM.cominfo: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
2210513SAli.Saidi@ARM.cominfo: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
2310513SAli.Saidi@ARM.cominfo: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
2410513SAli.Saidi@ARM.cominfo: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
2510513SAli.Saidi@ARM.cominfo: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
2610513SAli.Saidi@ARM.cominfo: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
2710513SAli.Saidi@ARM.cominfo: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
2810513SAli.Saidi@ARM.cominfo: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
2910513SAli.Saidi@ARM.cominfo: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
3010513SAli.Saidi@ARM.cominfo: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
3110513SAli.Saidi@ARM.cominfo: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
3210848SAndreas.Sandberg@ARM.comExiting @ tick 2846106511000 because m5_exit instruction encountered
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