config.ini revision 10260:384d554cea8c
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxArmSystem 13children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain 14atags_addr=256 15boot_loader=/arm/projectscratch/pd/sysrandd/dist/binaries/boot.arm 16boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1 17boot_release_addr=65528 18cache_line_size=64 19clk_domain=system.clk_domain 20dtb_filename= 21early_kernel_symbols=false 22enable_context_switch_stats_dump=false 23eventq_index=0 24flags_addr=268435504 25gic_cpu_addr=520093952 26have_generic_timer=false 27have_large_asid_64=false 28have_lpae=false 29have_security=false 30have_virtualization=false 31highest_el_is_64=false 32init_param=0 33kernel=/arm/projectscratch/pd/sysrandd/dist/binaries/vmlinux.arm.smp.fb.2.6.38.8 34load_addr_mask=268435455 35load_offset=0 36machine_type=RealView_PBX 37mem_mode=timing 38mem_ranges=0:134217727 39memories=system.physmem system.realview.nvmem 40multi_proc=true 41num_work_ids=16 42panic_on_oops=true 43panic_on_panic=true 44phys_addr_range_64=40 45readfile=tests/halt.sh 46reset_addr_64=0 47symbolfile= 48work_begin_ckpt_count=0 49work_begin_cpu_id_exit=-1 50work_begin_exit_count=0 51work_cpus_ckpt_count=0 52work_end_ckpt_count=0 53work_end_exit_count=0 54work_item_id=-1 55system_port=system.membus.slave[0] 56 57[system.bridge] 58type=Bridge 59clk_domain=system.clk_domain 60delay=50000 61eventq_index=0 62ranges=268435456:520093695 1073741824:1610612735 63req_size=16 64resp_size=16 65master=system.iobus.slave[0] 66slave=system.membus.master[0] 67 68[system.cf0] 69type=IdeDisk 70children=image 71delay=1000000 72driveID=master 73eventq_index=0 74image=system.cf0.image 75 76[system.cf0.image] 77type=CowDiskImage 78children=child 79child=system.cf0.image.child 80eventq_index=0 81image_file= 82read_only=false 83table_size=65536 84 85[system.cf0.image.child] 86type=RawDiskImage 87eventq_index=0 88image_file=/arm/projectscratch/pd/sysrandd/dist/disks/linux-arm-ael.img 89read_only=true 90 91[system.clk_domain] 92type=SrcClockDomain 93clock=1000 94eventq_index=0 95voltage_domain=system.voltage_domain 96 97[system.cpu0] 98type=MinorCPU 99children=branchPred dcache dstage2_mmu dtb executeFuncUnits icache interrupts isa istage2_mmu itb tracer 100branchPred=system.cpu0.branchPred 101checker=Null 102clk_domain=system.cpu_clk_domain 103cpu_id=0 104decodeCycleInput=true 105decodeInputBufferSize=3 106decodeInputWidth=2 107decodeToExecuteForwardDelay=1 108do_checkpoint_insts=true 109do_quiesce=true 110do_statistics_insts=true 111dstage2_mmu=system.cpu0.dstage2_mmu 112dtb=system.cpu0.dtb 113enableIdling=true 114eventq_index=0 115executeAllowEarlyMemoryIssue=true 116executeBranchDelay=1 117executeCommitLimit=2 118executeCycleInput=true 119executeFuncUnits=system.cpu0.executeFuncUnits 120executeInputBufferSize=7 121executeInputWidth=2 122executeIssueLimit=2 123executeLSQMaxStoreBufferStoresPerCycle=2 124executeLSQRequestsQueueSize=1 125executeLSQStoreBufferSize=5 126executeLSQTransfersQueueSize=2 127executeMaxAccessesInMemory=2 128executeMemoryCommitLimit=1 129executeMemoryIssueLimit=1 130executeMemoryWidth=0 131executeSetTraceTimeOnCommit=true 132executeSetTraceTimeOnIssue=false 133fetch1FetchLimit=1 134fetch1LineSnapWidth=0 135fetch1LineWidth=0 136fetch1ToFetch2BackwardDelay=1 137fetch1ToFetch2ForwardDelay=1 138fetch2CycleInput=true 139fetch2InputBufferSize=2 140fetch2ToDecodeForwardDelay=1 141function_trace=false 142function_trace_start=0 143interrupts=system.cpu0.interrupts 144isa=system.cpu0.isa 145istage2_mmu=system.cpu0.istage2_mmu 146itb=system.cpu0.itb 147max_insts_all_threads=0 148max_insts_any_thread=0 149max_loads_all_threads=0 150max_loads_any_thread=0 151numThreads=1 152profile=0 153progress_interval=0 154simpoint_start_insts= 155switched_out=false 156system=system 157tracer=system.cpu0.tracer 158workload= 159dcache_port=system.cpu0.dcache.cpu_side 160icache_port=system.cpu0.icache.cpu_side 161 162[system.cpu0.branchPred] 163type=BranchPredictor 164BTBEntries=4096 165BTBTagSize=16 166RASSize=16 167choiceCtrBits=2 168choicePredictorSize=8192 169eventq_index=0 170globalCtrBits=2 171globalPredictorSize=8192 172instShiftAmt=2 173localCtrBits=2 174localHistoryTableSize=2048 175localPredictorSize=2048 176numThreads=1 177predType=tournament 178 179[system.cpu0.dcache] 180type=BaseCache 181children=tags 182addr_ranges=0:18446744073709551615 183assoc=4 184clk_domain=system.cpu_clk_domain 185eventq_index=0 186forward_snoops=true 187hit_latency=2 188is_top_level=true 189max_miss_count=0 190mshrs=4 191prefetch_on_access=false 192prefetcher=Null 193response_latency=2 194sequential_access=false 195size=32768 196system=system 197tags=system.cpu0.dcache.tags 198tgts_per_mshr=20 199two_queue=false 200write_buffers=8 201cpu_side=system.cpu0.dcache_port 202mem_side=system.toL2Bus.slave[1] 203 204[system.cpu0.dcache.tags] 205type=LRU 206assoc=4 207block_size=64 208clk_domain=system.cpu_clk_domain 209eventq_index=0 210hit_latency=2 211sequential_access=false 212size=32768 213 214[system.cpu0.dstage2_mmu] 215type=ArmStage2MMU 216children=stage2_tlb 217eventq_index=0 218stage2_tlb=system.cpu0.dstage2_mmu.stage2_tlb 219tlb=system.cpu0.dtb 220 221[system.cpu0.dstage2_mmu.stage2_tlb] 222type=ArmTLB 223children=walker 224eventq_index=0 225is_stage2=true 226size=32 227walker=system.cpu0.dstage2_mmu.stage2_tlb.walker 228 229[system.cpu0.dstage2_mmu.stage2_tlb.walker] 230type=ArmTableWalker 231clk_domain=system.cpu_clk_domain 232eventq_index=0 233is_stage2=true 234num_squash_per_cycle=2 235sys=system 236port=system.toL2Bus.slave[5] 237 238[system.cpu0.dtb] 239type=ArmTLB 240children=walker 241eventq_index=0 242is_stage2=false 243size=64 244walker=system.cpu0.dtb.walker 245 246[system.cpu0.dtb.walker] 247type=ArmTableWalker 248clk_domain=system.cpu_clk_domain 249eventq_index=0 250is_stage2=false 251num_squash_per_cycle=2 252sys=system 253port=system.toL2Bus.slave[3] 254 255[system.cpu0.executeFuncUnits] 256type=MinorFUPool 257children=funcUnits0 funcUnits1 funcUnits2 funcUnits3 funcUnits4 funcUnits5 funcUnits6 258eventq_index=0 259funcUnits=system.cpu0.executeFuncUnits.funcUnits0 system.cpu0.executeFuncUnits.funcUnits1 system.cpu0.executeFuncUnits.funcUnits2 system.cpu0.executeFuncUnits.funcUnits3 system.cpu0.executeFuncUnits.funcUnits4 system.cpu0.executeFuncUnits.funcUnits5 system.cpu0.executeFuncUnits.funcUnits6 260 261[system.cpu0.executeFuncUnits.funcUnits0] 262type=MinorFU 263children=opClasses timings 264eventq_index=0 265issueLat=1 266opClasses=system.cpu0.executeFuncUnits.funcUnits0.opClasses 267opLat=3 268timings=system.cpu0.executeFuncUnits.funcUnits0.timings 269 270[system.cpu0.executeFuncUnits.funcUnits0.opClasses] 271type=MinorOpClassSet 272children=opClasses 273eventq_index=0 274opClasses=system.cpu0.executeFuncUnits.funcUnits0.opClasses.opClasses 275 276[system.cpu0.executeFuncUnits.funcUnits0.opClasses.opClasses] 277type=MinorOpClass 278eventq_index=0 279opClass=IntAlu 280 281[system.cpu0.executeFuncUnits.funcUnits0.timings] 282type=MinorFUTiming 283children=opClasses 284description=Int 285eventq_index=0 286extraAssumedLat=0 287extraCommitLat=0 288extraCommitLatExpr=Null 289mask=0 290match=0 291opClasses=system.cpu0.executeFuncUnits.funcUnits0.timings.opClasses 292srcRegsRelativeLats=2 293suppress=false 294 295[system.cpu0.executeFuncUnits.funcUnits0.timings.opClasses] 296type=MinorOpClassSet 297eventq_index=0 298opClasses= 299 300[system.cpu0.executeFuncUnits.funcUnits1] 301type=MinorFU 302children=opClasses timings 303eventq_index=0 304issueLat=1 305opClasses=system.cpu0.executeFuncUnits.funcUnits1.opClasses 306opLat=3 307timings=system.cpu0.executeFuncUnits.funcUnits1.timings 308 309[system.cpu0.executeFuncUnits.funcUnits1.opClasses] 310type=MinorOpClassSet 311children=opClasses 312eventq_index=0 313opClasses=system.cpu0.executeFuncUnits.funcUnits1.opClasses.opClasses 314 315[system.cpu0.executeFuncUnits.funcUnits1.opClasses.opClasses] 316type=MinorOpClass 317eventq_index=0 318opClass=IntAlu 319 320[system.cpu0.executeFuncUnits.funcUnits1.timings] 321type=MinorFUTiming 322children=opClasses 323description=Int 324eventq_index=0 325extraAssumedLat=0 326extraCommitLat=0 327extraCommitLatExpr=Null 328mask=0 329match=0 330opClasses=system.cpu0.executeFuncUnits.funcUnits1.timings.opClasses 331srcRegsRelativeLats=2 332suppress=false 333 334[system.cpu0.executeFuncUnits.funcUnits1.timings.opClasses] 335type=MinorOpClassSet 336eventq_index=0 337opClasses= 338 339[system.cpu0.executeFuncUnits.funcUnits2] 340type=MinorFU 341children=opClasses timings 342eventq_index=0 343issueLat=1 344opClasses=system.cpu0.executeFuncUnits.funcUnits2.opClasses 345opLat=3 346timings=system.cpu0.executeFuncUnits.funcUnits2.timings 347 348[system.cpu0.executeFuncUnits.funcUnits2.opClasses] 349type=MinorOpClassSet 350children=opClasses 351eventq_index=0 352opClasses=system.cpu0.executeFuncUnits.funcUnits2.opClasses.opClasses 353 354[system.cpu0.executeFuncUnits.funcUnits2.opClasses.opClasses] 355type=MinorOpClass 356eventq_index=0 357opClass=IntMult 358 359[system.cpu0.executeFuncUnits.funcUnits2.timings] 360type=MinorFUTiming 361children=opClasses 362description=Mul 363eventq_index=0 364extraAssumedLat=0 365extraCommitLat=0 366extraCommitLatExpr=Null 367mask=0 368match=0 369opClasses=system.cpu0.executeFuncUnits.funcUnits2.timings.opClasses 370srcRegsRelativeLats=0 371suppress=false 372 373[system.cpu0.executeFuncUnits.funcUnits2.timings.opClasses] 374type=MinorOpClassSet 375eventq_index=0 376opClasses= 377 378[system.cpu0.executeFuncUnits.funcUnits3] 379type=MinorFU 380children=opClasses 381eventq_index=0 382issueLat=9 383opClasses=system.cpu0.executeFuncUnits.funcUnits3.opClasses 384opLat=9 385timings= 386 387[system.cpu0.executeFuncUnits.funcUnits3.opClasses] 388type=MinorOpClassSet 389children=opClasses 390eventq_index=0 391opClasses=system.cpu0.executeFuncUnits.funcUnits3.opClasses.opClasses 392 393[system.cpu0.executeFuncUnits.funcUnits3.opClasses.opClasses] 394type=MinorOpClass 395eventq_index=0 396opClass=IntDiv 397 398[system.cpu0.executeFuncUnits.funcUnits4] 399type=MinorFU 400children=opClasses timings 401eventq_index=0 402issueLat=1 403opClasses=system.cpu0.executeFuncUnits.funcUnits4.opClasses 404opLat=6 405timings=system.cpu0.executeFuncUnits.funcUnits4.timings 406 407[system.cpu0.executeFuncUnits.funcUnits4.opClasses] 408type=MinorOpClassSet 409children=opClasses00 opClasses01 opClasses02 opClasses03 opClasses04 opClasses05 opClasses06 opClasses07 opClasses08 opClasses09 opClasses10 opClasses11 opClasses12 opClasses13 opClasses14 opClasses15 opClasses16 opClasses17 opClasses18 opClasses19 opClasses20 opClasses21 opClasses22 opClasses23 opClasses24 opClasses25 410eventq_index=0 411opClasses=system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses00 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses01 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses02 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses03 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses04 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses05 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses06 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses07 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses08 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses09 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses10 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses11 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses12 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses13 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses14 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses15 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses16 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses17 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses18 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses19 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses20 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses21 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses22 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses23 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses24 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses25 412 413[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses00] 414type=MinorOpClass 415eventq_index=0 416opClass=FloatAdd 417 418[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses01] 419type=MinorOpClass 420eventq_index=0 421opClass=FloatCmp 422 423[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses02] 424type=MinorOpClass 425eventq_index=0 426opClass=FloatCvt 427 428[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses03] 429type=MinorOpClass 430eventq_index=0 431opClass=FloatMult 432 433[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses04] 434type=MinorOpClass 435eventq_index=0 436opClass=FloatDiv 437 438[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses05] 439type=MinorOpClass 440eventq_index=0 441opClass=FloatSqrt 442 443[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses06] 444type=MinorOpClass 445eventq_index=0 446opClass=SimdAdd 447 448[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses07] 449type=MinorOpClass 450eventq_index=0 451opClass=SimdAddAcc 452 453[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses08] 454type=MinorOpClass 455eventq_index=0 456opClass=SimdAlu 457 458[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses09] 459type=MinorOpClass 460eventq_index=0 461opClass=SimdCmp 462 463[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses10] 464type=MinorOpClass 465eventq_index=0 466opClass=SimdCvt 467 468[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses11] 469type=MinorOpClass 470eventq_index=0 471opClass=SimdMisc 472 473[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses12] 474type=MinorOpClass 475eventq_index=0 476opClass=SimdMult 477 478[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses13] 479type=MinorOpClass 480eventq_index=0 481opClass=SimdMultAcc 482 483[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses14] 484type=MinorOpClass 485eventq_index=0 486opClass=SimdShift 487 488[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses15] 489type=MinorOpClass 490eventq_index=0 491opClass=SimdShiftAcc 492 493[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses16] 494type=MinorOpClass 495eventq_index=0 496opClass=SimdSqrt 497 498[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses17] 499type=MinorOpClass 500eventq_index=0 501opClass=SimdFloatAdd 502 503[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses18] 504type=MinorOpClass 505eventq_index=0 506opClass=SimdFloatAlu 507 508[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses19] 509type=MinorOpClass 510eventq_index=0 511opClass=SimdFloatCmp 512 513[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses20] 514type=MinorOpClass 515eventq_index=0 516opClass=SimdFloatCvt 517 518[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses21] 519type=MinorOpClass 520eventq_index=0 521opClass=SimdFloatDiv 522 523[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses22] 524type=MinorOpClass 525eventq_index=0 526opClass=SimdFloatMisc 527 528[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses23] 529type=MinorOpClass 530eventq_index=0 531opClass=SimdFloatMult 532 533[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses24] 534type=MinorOpClass 535eventq_index=0 536opClass=SimdFloatMultAcc 537 538[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses25] 539type=MinorOpClass 540eventq_index=0 541opClass=SimdFloatSqrt 542 543[system.cpu0.executeFuncUnits.funcUnits4.timings] 544type=MinorFUTiming 545children=opClasses 546description=FloatSimd 547eventq_index=0 548extraAssumedLat=0 549extraCommitLat=0 550extraCommitLatExpr=Null 551mask=0 552match=0 553opClasses=system.cpu0.executeFuncUnits.funcUnits4.timings.opClasses 554srcRegsRelativeLats=2 555suppress=false 556 557[system.cpu0.executeFuncUnits.funcUnits4.timings.opClasses] 558type=MinorOpClassSet 559eventq_index=0 560opClasses= 561 562[system.cpu0.executeFuncUnits.funcUnits5] 563type=MinorFU 564children=opClasses timings 565eventq_index=0 566issueLat=1 567opClasses=system.cpu0.executeFuncUnits.funcUnits5.opClasses 568opLat=1 569timings=system.cpu0.executeFuncUnits.funcUnits5.timings 570 571[system.cpu0.executeFuncUnits.funcUnits5.opClasses] 572type=MinorOpClassSet 573children=opClasses0 opClasses1 574eventq_index=0 575opClasses=system.cpu0.executeFuncUnits.funcUnits5.opClasses.opClasses0 system.cpu0.executeFuncUnits.funcUnits5.opClasses.opClasses1 576 577[system.cpu0.executeFuncUnits.funcUnits5.opClasses.opClasses0] 578type=MinorOpClass 579eventq_index=0 580opClass=MemRead 581 582[system.cpu0.executeFuncUnits.funcUnits5.opClasses.opClasses1] 583type=MinorOpClass 584eventq_index=0 585opClass=MemWrite 586 587[system.cpu0.executeFuncUnits.funcUnits5.timings] 588type=MinorFUTiming 589children=opClasses 590description=Mem 591eventq_index=0 592extraAssumedLat=2 593extraCommitLat=0 594extraCommitLatExpr=Null 595mask=0 596match=0 597opClasses=system.cpu0.executeFuncUnits.funcUnits5.timings.opClasses 598srcRegsRelativeLats=1 599suppress=false 600 601[system.cpu0.executeFuncUnits.funcUnits5.timings.opClasses] 602type=MinorOpClassSet 603eventq_index=0 604opClasses= 605 606[system.cpu0.executeFuncUnits.funcUnits6] 607type=MinorFU 608children=opClasses 609eventq_index=0 610issueLat=1 611opClasses=system.cpu0.executeFuncUnits.funcUnits6.opClasses 612opLat=1 613timings= 614 615[system.cpu0.executeFuncUnits.funcUnits6.opClasses] 616type=MinorOpClassSet 617children=opClasses0 opClasses1 618eventq_index=0 619opClasses=system.cpu0.executeFuncUnits.funcUnits6.opClasses.opClasses0 system.cpu0.executeFuncUnits.funcUnits6.opClasses.opClasses1 620 621[system.cpu0.executeFuncUnits.funcUnits6.opClasses.opClasses0] 622type=MinorOpClass 623eventq_index=0 624opClass=IprAccess 625 626[system.cpu0.executeFuncUnits.funcUnits6.opClasses.opClasses1] 627type=MinorOpClass 628eventq_index=0 629opClass=InstPrefetch 630 631[system.cpu0.icache] 632type=BaseCache 633children=tags 634addr_ranges=0:18446744073709551615 635assoc=1 636clk_domain=system.cpu_clk_domain 637eventq_index=0 638forward_snoops=true 639hit_latency=2 640is_top_level=true 641max_miss_count=0 642mshrs=4 643prefetch_on_access=false 644prefetcher=Null 645response_latency=2 646sequential_access=false 647size=32768 648system=system 649tags=system.cpu0.icache.tags 650tgts_per_mshr=20 651two_queue=false 652write_buffers=8 653cpu_side=system.cpu0.icache_port 654mem_side=system.toL2Bus.slave[0] 655 656[system.cpu0.icache.tags] 657type=LRU 658assoc=1 659block_size=64 660clk_domain=system.cpu_clk_domain 661eventq_index=0 662hit_latency=2 663sequential_access=false 664size=32768 665 666[system.cpu0.interrupts] 667type=ArmInterrupts 668eventq_index=0 669 670[system.cpu0.isa] 671type=ArmISA 672eventq_index=0 673fpsid=1090793632 674id_aa64afr0_el1=0 675id_aa64afr1_el1=0 676id_aa64dfr0_el1=1052678 677id_aa64dfr1_el1=0 678id_aa64isar0_el1=0 679id_aa64isar1_el1=0 680id_aa64mmfr0_el1=15728642 681id_aa64mmfr1_el1=0 682id_aa64pfr0_el1=17 683id_aa64pfr1_el1=0 684id_isar0=34607377 685id_isar1=34677009 686id_isar2=555950401 687id_isar3=17899825 688id_isar4=268501314 689id_isar5=0 690id_mmfr0=270536963 691id_mmfr1=0 692id_mmfr2=19070976 693id_mmfr3=34611729 694id_pfr0=49 695id_pfr1=4113 696midr=1091551472 697system=system 698 699[system.cpu0.istage2_mmu] 700type=ArmStage2MMU 701children=stage2_tlb 702eventq_index=0 703stage2_tlb=system.cpu0.istage2_mmu.stage2_tlb 704tlb=system.cpu0.itb 705 706[system.cpu0.istage2_mmu.stage2_tlb] 707type=ArmTLB 708children=walker 709eventq_index=0 710is_stage2=true 711size=32 712walker=system.cpu0.istage2_mmu.stage2_tlb.walker 713 714[system.cpu0.istage2_mmu.stage2_tlb.walker] 715type=ArmTableWalker 716clk_domain=system.cpu_clk_domain 717eventq_index=0 718is_stage2=true 719num_squash_per_cycle=2 720sys=system 721port=system.toL2Bus.slave[4] 722 723[system.cpu0.itb] 724type=ArmTLB 725children=walker 726eventq_index=0 727is_stage2=false 728size=64 729walker=system.cpu0.itb.walker 730 731[system.cpu0.itb.walker] 732type=ArmTableWalker 733clk_domain=system.cpu_clk_domain 734eventq_index=0 735is_stage2=false 736num_squash_per_cycle=2 737sys=system 738port=system.toL2Bus.slave[2] 739 740[system.cpu0.tracer] 741type=ExeTracer 742eventq_index=0 743 744[system.cpu1] 745type=MinorCPU 746children=branchPred dcache dstage2_mmu dtb executeFuncUnits icache interrupts isa istage2_mmu itb tracer 747branchPred=system.cpu1.branchPred 748checker=Null 749clk_domain=system.cpu_clk_domain 750cpu_id=1 751decodeCycleInput=true 752decodeInputBufferSize=3 753decodeInputWidth=2 754decodeToExecuteForwardDelay=1 755do_checkpoint_insts=true 756do_quiesce=true 757do_statistics_insts=true 758dstage2_mmu=system.cpu1.dstage2_mmu 759dtb=system.cpu1.dtb 760enableIdling=true 761eventq_index=0 762executeAllowEarlyMemoryIssue=true 763executeBranchDelay=1 764executeCommitLimit=2 765executeCycleInput=true 766executeFuncUnits=system.cpu1.executeFuncUnits 767executeInputBufferSize=7 768executeInputWidth=2 769executeIssueLimit=2 770executeLSQMaxStoreBufferStoresPerCycle=2 771executeLSQRequestsQueueSize=1 772executeLSQStoreBufferSize=5 773executeLSQTransfersQueueSize=2 774executeMaxAccessesInMemory=2 775executeMemoryCommitLimit=1 776executeMemoryIssueLimit=1 777executeMemoryWidth=0 778executeSetTraceTimeOnCommit=true 779executeSetTraceTimeOnIssue=false 780fetch1FetchLimit=1 781fetch1LineSnapWidth=0 782fetch1LineWidth=0 783fetch1ToFetch2BackwardDelay=1 784fetch1ToFetch2ForwardDelay=1 785fetch2CycleInput=true 786fetch2InputBufferSize=2 787fetch2ToDecodeForwardDelay=1 788function_trace=false 789function_trace_start=0 790interrupts=system.cpu1.interrupts 791isa=system.cpu1.isa 792istage2_mmu=system.cpu1.istage2_mmu 793itb=system.cpu1.itb 794max_insts_all_threads=0 795max_insts_any_thread=0 796max_loads_all_threads=0 797max_loads_any_thread=0 798numThreads=1 799profile=0 800progress_interval=0 801simpoint_start_insts= 802switched_out=false 803system=system 804tracer=system.cpu1.tracer 805workload= 806dcache_port=system.cpu1.dcache.cpu_side 807icache_port=system.cpu1.icache.cpu_side 808 809[system.cpu1.branchPred] 810type=BranchPredictor 811BTBEntries=4096 812BTBTagSize=16 813RASSize=16 814choiceCtrBits=2 815choicePredictorSize=8192 816eventq_index=0 817globalCtrBits=2 818globalPredictorSize=8192 819instShiftAmt=2 820localCtrBits=2 821localHistoryTableSize=2048 822localPredictorSize=2048 823numThreads=1 824predType=tournament 825 826[system.cpu1.dcache] 827type=BaseCache 828children=tags 829addr_ranges=0:18446744073709551615 830assoc=4 831clk_domain=system.cpu_clk_domain 832eventq_index=0 833forward_snoops=true 834hit_latency=2 835is_top_level=true 836max_miss_count=0 837mshrs=4 838prefetch_on_access=false 839prefetcher=Null 840response_latency=2 841sequential_access=false 842size=32768 843system=system 844tags=system.cpu1.dcache.tags 845tgts_per_mshr=20 846two_queue=false 847write_buffers=8 848cpu_side=system.cpu1.dcache_port 849mem_side=system.toL2Bus.slave[7] 850 851[system.cpu1.dcache.tags] 852type=LRU 853assoc=4 854block_size=64 855clk_domain=system.cpu_clk_domain 856eventq_index=0 857hit_latency=2 858sequential_access=false 859size=32768 860 861[system.cpu1.dstage2_mmu] 862type=ArmStage2MMU 863children=stage2_tlb 864eventq_index=0 865stage2_tlb=system.cpu1.dstage2_mmu.stage2_tlb 866tlb=system.cpu1.dtb 867 868[system.cpu1.dstage2_mmu.stage2_tlb] 869type=ArmTLB 870children=walker 871eventq_index=0 872is_stage2=true 873size=32 874walker=system.cpu1.dstage2_mmu.stage2_tlb.walker 875 876[system.cpu1.dstage2_mmu.stage2_tlb.walker] 877type=ArmTableWalker 878clk_domain=system.cpu_clk_domain 879eventq_index=0 880is_stage2=true 881num_squash_per_cycle=2 882sys=system 883port=system.toL2Bus.slave[11] 884 885[system.cpu1.dtb] 886type=ArmTLB 887children=walker 888eventq_index=0 889is_stage2=false 890size=64 891walker=system.cpu1.dtb.walker 892 893[system.cpu1.dtb.walker] 894type=ArmTableWalker 895clk_domain=system.cpu_clk_domain 896eventq_index=0 897is_stage2=false 898num_squash_per_cycle=2 899sys=system 900port=system.toL2Bus.slave[9] 901 902[system.cpu1.executeFuncUnits] 903type=MinorFUPool 904children=funcUnits0 funcUnits1 funcUnits2 funcUnits3 funcUnits4 funcUnits5 funcUnits6 905eventq_index=0 906funcUnits=system.cpu1.executeFuncUnits.funcUnits0 system.cpu1.executeFuncUnits.funcUnits1 system.cpu1.executeFuncUnits.funcUnits2 system.cpu1.executeFuncUnits.funcUnits3 system.cpu1.executeFuncUnits.funcUnits4 system.cpu1.executeFuncUnits.funcUnits5 system.cpu1.executeFuncUnits.funcUnits6 907 908[system.cpu1.executeFuncUnits.funcUnits0] 909type=MinorFU 910children=opClasses timings 911eventq_index=0 912issueLat=1 913opClasses=system.cpu1.executeFuncUnits.funcUnits0.opClasses 914opLat=3 915timings=system.cpu1.executeFuncUnits.funcUnits0.timings 916 917[system.cpu1.executeFuncUnits.funcUnits0.opClasses] 918type=MinorOpClassSet 919children=opClasses 920eventq_index=0 921opClasses=system.cpu1.executeFuncUnits.funcUnits0.opClasses.opClasses 922 923[system.cpu1.executeFuncUnits.funcUnits0.opClasses.opClasses] 924type=MinorOpClass 925eventq_index=0 926opClass=IntAlu 927 928[system.cpu1.executeFuncUnits.funcUnits0.timings] 929type=MinorFUTiming 930children=opClasses 931description=Int 932eventq_index=0 933extraAssumedLat=0 934extraCommitLat=0 935extraCommitLatExpr=Null 936mask=0 937match=0 938opClasses=system.cpu1.executeFuncUnits.funcUnits0.timings.opClasses 939srcRegsRelativeLats=2 940suppress=false 941 942[system.cpu1.executeFuncUnits.funcUnits0.timings.opClasses] 943type=MinorOpClassSet 944eventq_index=0 945opClasses= 946 947[system.cpu1.executeFuncUnits.funcUnits1] 948type=MinorFU 949children=opClasses timings 950eventq_index=0 951issueLat=1 952opClasses=system.cpu1.executeFuncUnits.funcUnits1.opClasses 953opLat=3 954timings=system.cpu1.executeFuncUnits.funcUnits1.timings 955 956[system.cpu1.executeFuncUnits.funcUnits1.opClasses] 957type=MinorOpClassSet 958children=opClasses 959eventq_index=0 960opClasses=system.cpu1.executeFuncUnits.funcUnits1.opClasses.opClasses 961 962[system.cpu1.executeFuncUnits.funcUnits1.opClasses.opClasses] 963type=MinorOpClass 964eventq_index=0 965opClass=IntAlu 966 967[system.cpu1.executeFuncUnits.funcUnits1.timings] 968type=MinorFUTiming 969children=opClasses 970description=Int 971eventq_index=0 972extraAssumedLat=0 973extraCommitLat=0 974extraCommitLatExpr=Null 975mask=0 976match=0 977opClasses=system.cpu1.executeFuncUnits.funcUnits1.timings.opClasses 978srcRegsRelativeLats=2 979suppress=false 980 981[system.cpu1.executeFuncUnits.funcUnits1.timings.opClasses] 982type=MinorOpClassSet 983eventq_index=0 984opClasses= 985 986[system.cpu1.executeFuncUnits.funcUnits2] 987type=MinorFU 988children=opClasses timings 989eventq_index=0 990issueLat=1 991opClasses=system.cpu1.executeFuncUnits.funcUnits2.opClasses 992opLat=3 993timings=system.cpu1.executeFuncUnits.funcUnits2.timings 994 995[system.cpu1.executeFuncUnits.funcUnits2.opClasses] 996type=MinorOpClassSet 997children=opClasses 998eventq_index=0 999opClasses=system.cpu1.executeFuncUnits.funcUnits2.opClasses.opClasses 1000 1001[system.cpu1.executeFuncUnits.funcUnits2.opClasses.opClasses] 1002type=MinorOpClass 1003eventq_index=0 1004opClass=IntMult 1005 1006[system.cpu1.executeFuncUnits.funcUnits2.timings] 1007type=MinorFUTiming 1008children=opClasses 1009description=Mul 1010eventq_index=0 1011extraAssumedLat=0 1012extraCommitLat=0 1013extraCommitLatExpr=Null 1014mask=0 1015match=0 1016opClasses=system.cpu1.executeFuncUnits.funcUnits2.timings.opClasses 1017srcRegsRelativeLats=0 1018suppress=false 1019 1020[system.cpu1.executeFuncUnits.funcUnits2.timings.opClasses] 1021type=MinorOpClassSet 1022eventq_index=0 1023opClasses= 1024 1025[system.cpu1.executeFuncUnits.funcUnits3] 1026type=MinorFU 1027children=opClasses 1028eventq_index=0 1029issueLat=9 1030opClasses=system.cpu1.executeFuncUnits.funcUnits3.opClasses 1031opLat=9 1032timings= 1033 1034[system.cpu1.executeFuncUnits.funcUnits3.opClasses] 1035type=MinorOpClassSet 1036children=opClasses 1037eventq_index=0 1038opClasses=system.cpu1.executeFuncUnits.funcUnits3.opClasses.opClasses 1039 1040[system.cpu1.executeFuncUnits.funcUnits3.opClasses.opClasses] 1041type=MinorOpClass 1042eventq_index=0 1043opClass=IntDiv 1044 1045[system.cpu1.executeFuncUnits.funcUnits4] 1046type=MinorFU 1047children=opClasses timings 1048eventq_index=0 1049issueLat=1 1050opClasses=system.cpu1.executeFuncUnits.funcUnits4.opClasses 1051opLat=6 1052timings=system.cpu1.executeFuncUnits.funcUnits4.timings 1053 1054[system.cpu1.executeFuncUnits.funcUnits4.opClasses] 1055type=MinorOpClassSet 1056children=opClasses00 opClasses01 opClasses02 opClasses03 opClasses04 opClasses05 opClasses06 opClasses07 opClasses08 opClasses09 opClasses10 opClasses11 opClasses12 opClasses13 opClasses14 opClasses15 opClasses16 opClasses17 opClasses18 opClasses19 opClasses20 opClasses21 opClasses22 opClasses23 opClasses24 opClasses25 1057eventq_index=0 1058opClasses=system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses00 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses01 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses02 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses03 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses04 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses05 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses06 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses07 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses08 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses09 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses10 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses11 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses12 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses13 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses14 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses15 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses16 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses17 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses18 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses19 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses20 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses21 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses22 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses23 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses24 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses25 1059 1060[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses00] 1061type=MinorOpClass 1062eventq_index=0 1063opClass=FloatAdd 1064 1065[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses01] 1066type=MinorOpClass 1067eventq_index=0 1068opClass=FloatCmp 1069 1070[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses02] 1071type=MinorOpClass 1072eventq_index=0 1073opClass=FloatCvt 1074 1075[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses03] 1076type=MinorOpClass 1077eventq_index=0 1078opClass=FloatMult 1079 1080[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses04] 1081type=MinorOpClass 1082eventq_index=0 1083opClass=FloatDiv 1084 1085[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses05] 1086type=MinorOpClass 1087eventq_index=0 1088opClass=FloatSqrt 1089 1090[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses06] 1091type=MinorOpClass 1092eventq_index=0 1093opClass=SimdAdd 1094 1095[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses07] 1096type=MinorOpClass 1097eventq_index=0 1098opClass=SimdAddAcc 1099 1100[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses08] 1101type=MinorOpClass 1102eventq_index=0 1103opClass=SimdAlu 1104 1105[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses09] 1106type=MinorOpClass 1107eventq_index=0 1108opClass=SimdCmp 1109 1110[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses10] 1111type=MinorOpClass 1112eventq_index=0 1113opClass=SimdCvt 1114 1115[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses11] 1116type=MinorOpClass 1117eventq_index=0 1118opClass=SimdMisc 1119 1120[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses12] 1121type=MinorOpClass 1122eventq_index=0 1123opClass=SimdMult 1124 1125[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses13] 1126type=MinorOpClass 1127eventq_index=0 1128opClass=SimdMultAcc 1129 1130[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses14] 1131type=MinorOpClass 1132eventq_index=0 1133opClass=SimdShift 1134 1135[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses15] 1136type=MinorOpClass 1137eventq_index=0 1138opClass=SimdShiftAcc 1139 1140[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses16] 1141type=MinorOpClass 1142eventq_index=0 1143opClass=SimdSqrt 1144 1145[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses17] 1146type=MinorOpClass 1147eventq_index=0 1148opClass=SimdFloatAdd 1149 1150[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses18] 1151type=MinorOpClass 1152eventq_index=0 1153opClass=SimdFloatAlu 1154 1155[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses19] 1156type=MinorOpClass 1157eventq_index=0 1158opClass=SimdFloatCmp 1159 1160[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses20] 1161type=MinorOpClass 1162eventq_index=0 1163opClass=SimdFloatCvt 1164 1165[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses21] 1166type=MinorOpClass 1167eventq_index=0 1168opClass=SimdFloatDiv 1169 1170[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses22] 1171type=MinorOpClass 1172eventq_index=0 1173opClass=SimdFloatMisc 1174 1175[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses23] 1176type=MinorOpClass 1177eventq_index=0 1178opClass=SimdFloatMult 1179 1180[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses24] 1181type=MinorOpClass 1182eventq_index=0 1183opClass=SimdFloatMultAcc 1184 1185[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses25] 1186type=MinorOpClass 1187eventq_index=0 1188opClass=SimdFloatSqrt 1189 1190[system.cpu1.executeFuncUnits.funcUnits4.timings] 1191type=MinorFUTiming 1192children=opClasses 1193description=FloatSimd 1194eventq_index=0 1195extraAssumedLat=0 1196extraCommitLat=0 1197extraCommitLatExpr=Null 1198mask=0 1199match=0 1200opClasses=system.cpu1.executeFuncUnits.funcUnits4.timings.opClasses 1201srcRegsRelativeLats=2 1202suppress=false 1203 1204[system.cpu1.executeFuncUnits.funcUnits4.timings.opClasses] 1205type=MinorOpClassSet 1206eventq_index=0 1207opClasses= 1208 1209[system.cpu1.executeFuncUnits.funcUnits5] 1210type=MinorFU 1211children=opClasses timings 1212eventq_index=0 1213issueLat=1 1214opClasses=system.cpu1.executeFuncUnits.funcUnits5.opClasses 1215opLat=1 1216timings=system.cpu1.executeFuncUnits.funcUnits5.timings 1217 1218[system.cpu1.executeFuncUnits.funcUnits5.opClasses] 1219type=MinorOpClassSet 1220children=opClasses0 opClasses1 1221eventq_index=0 1222opClasses=system.cpu1.executeFuncUnits.funcUnits5.opClasses.opClasses0 system.cpu1.executeFuncUnits.funcUnits5.opClasses.opClasses1 1223 1224[system.cpu1.executeFuncUnits.funcUnits5.opClasses.opClasses0] 1225type=MinorOpClass 1226eventq_index=0 1227opClass=MemRead 1228 1229[system.cpu1.executeFuncUnits.funcUnits5.opClasses.opClasses1] 1230type=MinorOpClass 1231eventq_index=0 1232opClass=MemWrite 1233 1234[system.cpu1.executeFuncUnits.funcUnits5.timings] 1235type=MinorFUTiming 1236children=opClasses 1237description=Mem 1238eventq_index=0 1239extraAssumedLat=2 1240extraCommitLat=0 1241extraCommitLatExpr=Null 1242mask=0 1243match=0 1244opClasses=system.cpu1.executeFuncUnits.funcUnits5.timings.opClasses 1245srcRegsRelativeLats=1 1246suppress=false 1247 1248[system.cpu1.executeFuncUnits.funcUnits5.timings.opClasses] 1249type=MinorOpClassSet 1250eventq_index=0 1251opClasses= 1252 1253[system.cpu1.executeFuncUnits.funcUnits6] 1254type=MinorFU 1255children=opClasses 1256eventq_index=0 1257issueLat=1 1258opClasses=system.cpu1.executeFuncUnits.funcUnits6.opClasses 1259opLat=1 1260timings= 1261 1262[system.cpu1.executeFuncUnits.funcUnits6.opClasses] 1263type=MinorOpClassSet 1264children=opClasses0 opClasses1 1265eventq_index=0 1266opClasses=system.cpu1.executeFuncUnits.funcUnits6.opClasses.opClasses0 system.cpu1.executeFuncUnits.funcUnits6.opClasses.opClasses1 1267 1268[system.cpu1.executeFuncUnits.funcUnits6.opClasses.opClasses0] 1269type=MinorOpClass 1270eventq_index=0 1271opClass=IprAccess 1272 1273[system.cpu1.executeFuncUnits.funcUnits6.opClasses.opClasses1] 1274type=MinorOpClass 1275eventq_index=0 1276opClass=InstPrefetch 1277 1278[system.cpu1.icache] 1279type=BaseCache 1280children=tags 1281addr_ranges=0:18446744073709551615 1282assoc=1 1283clk_domain=system.cpu_clk_domain 1284eventq_index=0 1285forward_snoops=true 1286hit_latency=2 1287is_top_level=true 1288max_miss_count=0 1289mshrs=4 1290prefetch_on_access=false 1291prefetcher=Null 1292response_latency=2 1293sequential_access=false 1294size=32768 1295system=system 1296tags=system.cpu1.icache.tags 1297tgts_per_mshr=20 1298two_queue=false 1299write_buffers=8 1300cpu_side=system.cpu1.icache_port 1301mem_side=system.toL2Bus.slave[6] 1302 1303[system.cpu1.icache.tags] 1304type=LRU 1305assoc=1 1306block_size=64 1307clk_domain=system.cpu_clk_domain 1308eventq_index=0 1309hit_latency=2 1310sequential_access=false 1311size=32768 1312 1313[system.cpu1.interrupts] 1314type=ArmInterrupts 1315eventq_index=0 1316 1317[system.cpu1.isa] 1318type=ArmISA 1319eventq_index=0 1320fpsid=1090793632 1321id_aa64afr0_el1=0 1322id_aa64afr1_el1=0 1323id_aa64dfr0_el1=1052678 1324id_aa64dfr1_el1=0 1325id_aa64isar0_el1=0 1326id_aa64isar1_el1=0 1327id_aa64mmfr0_el1=15728642 1328id_aa64mmfr1_el1=0 1329id_aa64pfr0_el1=17 1330id_aa64pfr1_el1=0 1331id_isar0=34607377 1332id_isar1=34677009 1333id_isar2=555950401 1334id_isar3=17899825 1335id_isar4=268501314 1336id_isar5=0 1337id_mmfr0=270536963 1338id_mmfr1=0 1339id_mmfr2=19070976 1340id_mmfr3=34611729 1341id_pfr0=49 1342id_pfr1=4113 1343midr=1091551472 1344system=system 1345 1346[system.cpu1.istage2_mmu] 1347type=ArmStage2MMU 1348children=stage2_tlb 1349eventq_index=0 1350stage2_tlb=system.cpu1.istage2_mmu.stage2_tlb 1351tlb=system.cpu1.itb 1352 1353[system.cpu1.istage2_mmu.stage2_tlb] 1354type=ArmTLB 1355children=walker 1356eventq_index=0 1357is_stage2=true 1358size=32 1359walker=system.cpu1.istage2_mmu.stage2_tlb.walker 1360 1361[system.cpu1.istage2_mmu.stage2_tlb.walker] 1362type=ArmTableWalker 1363clk_domain=system.cpu_clk_domain 1364eventq_index=0 1365is_stage2=true 1366num_squash_per_cycle=2 1367sys=system 1368port=system.toL2Bus.slave[10] 1369 1370[system.cpu1.itb] 1371type=ArmTLB 1372children=walker 1373eventq_index=0 1374is_stage2=false 1375size=64 1376walker=system.cpu1.itb.walker 1377 1378[system.cpu1.itb.walker] 1379type=ArmTableWalker 1380clk_domain=system.cpu_clk_domain 1381eventq_index=0 1382is_stage2=false 1383num_squash_per_cycle=2 1384sys=system 1385port=system.toL2Bus.slave[8] 1386 1387[system.cpu1.tracer] 1388type=ExeTracer 1389eventq_index=0 1390 1391[system.cpu_clk_domain] 1392type=SrcClockDomain 1393clock=500 1394eventq_index=0 1395voltage_domain=system.voltage_domain 1396 1397[system.intrctrl] 1398type=IntrControl 1399eventq_index=0 1400sys=system 1401 1402[system.iobus] 1403type=NoncoherentBus 1404clk_domain=system.clk_domain 1405eventq_index=0 1406header_cycles=1 1407use_default_range=false 1408width=8 1409master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc.pio system.realview.flash_fake.pio system.iocache.cpu_side 1410slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma 1411 1412[system.iocache] 1413type=BaseCache 1414children=tags 1415addr_ranges=0:134217727 1416assoc=8 1417clk_domain=system.clk_domain 1418eventq_index=0 1419forward_snoops=false 1420hit_latency=50 1421is_top_level=true 1422max_miss_count=0 1423mshrs=20 1424prefetch_on_access=false 1425prefetcher=Null 1426response_latency=50 1427sequential_access=false 1428size=1024 1429system=system 1430tags=system.iocache.tags 1431tgts_per_mshr=12 1432two_queue=false 1433write_buffers=8 1434cpu_side=system.iobus.master[25] 1435mem_side=system.membus.slave[2] 1436 1437[system.iocache.tags] 1438type=LRU 1439assoc=8 1440block_size=64 1441clk_domain=system.clk_domain 1442eventq_index=0 1443hit_latency=50 1444sequential_access=false 1445size=1024 1446 1447[system.l2c] 1448type=BaseCache 1449children=tags 1450addr_ranges=0:18446744073709551615 1451assoc=8 1452clk_domain=system.cpu_clk_domain 1453eventq_index=0 1454forward_snoops=true 1455hit_latency=20 1456is_top_level=false 1457max_miss_count=0 1458mshrs=20 1459prefetch_on_access=false 1460prefetcher=Null 1461response_latency=20 1462sequential_access=false 1463size=4194304 1464system=system 1465tags=system.l2c.tags 1466tgts_per_mshr=12 1467two_queue=false 1468write_buffers=8 1469cpu_side=system.toL2Bus.master[0] 1470mem_side=system.membus.slave[1] 1471 1472[system.l2c.tags] 1473type=LRU 1474assoc=8 1475block_size=64 1476clk_domain=system.cpu_clk_domain 1477eventq_index=0 1478hit_latency=20 1479sequential_access=false 1480size=4194304 1481 1482[system.membus] 1483type=CoherentBus 1484children=badaddr_responder 1485clk_domain=system.clk_domain 1486eventq_index=0 1487header_cycles=1 1488system=system 1489use_default_range=false 1490width=8 1491default=system.membus.badaddr_responder.pio 1492master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio system.physmem.port 1493slave=system.system_port system.l2c.mem_side system.iocache.mem_side 1494 1495[system.membus.badaddr_responder] 1496type=IsaFake 1497clk_domain=system.clk_domain 1498eventq_index=0 1499fake_mem=false 1500pio_addr=0 1501pio_latency=100000 1502pio_size=8 1503ret_bad_addr=true 1504ret_data16=65535 1505ret_data32=4294967295 1506ret_data64=18446744073709551615 1507ret_data8=255 1508system=system 1509update_data=false 1510warn_access=warn 1511pio=system.membus.default 1512 1513[system.physmem] 1514type=DRAMCtrl 1515activation_limit=4 1516addr_mapping=RoRaBaChCo 1517banks_per_rank=8 1518burst_length=8 1519channels=1 1520clk_domain=system.clk_domain 1521conf_table_reported=true 1522device_bus_width=8 1523device_rowbuffer_size=1024 1524devices_per_rank=8 1525eventq_index=0 1526in_addr_map=true 1527max_accesses_per_row=16 1528mem_sched_policy=frfcfs 1529min_writes_per_switch=16 1530null=false 1531page_policy=open_adaptive 1532range=0:134217727 1533ranks_per_channel=2 1534read_buffer_size=32 1535static_backend_latency=10000 1536static_frontend_latency=10000 1537tBURST=5000 1538tCL=13750 1539tRAS=35000 1540tRCD=13750 1541tREFI=7800000 1542tRFC=300000 1543tRP=13750 1544tRRD=6250 1545tWTR=7500 1546tXAW=40000 1547write_buffer_size=64 1548write_high_thresh_perc=85 1549write_low_thresh_perc=50 1550port=system.membus.master[6] 1551 1552[system.realview] 1553type=RealView 1554children=a9scu aaci_fake cf_ctrl clcd dmac_fake flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake 1555eventq_index=0 1556intrctrl=system.intrctrl 1557max_mem_size=268435456 1558mem_start_addr=0 1559pci_cfg_base=0 1560system=system 1561 1562[system.realview.a9scu] 1563type=A9SCU 1564clk_domain=system.clk_domain 1565eventq_index=0 1566pio_addr=520093696 1567pio_latency=100000 1568system=system 1569pio=system.membus.master[4] 1570 1571[system.realview.aaci_fake] 1572type=AmbaFake 1573amba_id=0 1574clk_domain=system.clk_domain 1575eventq_index=0 1576ignore_access=false 1577pio_addr=268451840 1578pio_latency=100000 1579system=system 1580pio=system.iobus.master[21] 1581 1582[system.realview.cf_ctrl] 1583type=IdeController 1584BAR0=402653184 1585BAR0LegacyIO=true 1586BAR0Size=16 1587BAR1=402653440 1588BAR1LegacyIO=true 1589BAR1Size=1 1590BAR2=1 1591BAR2LegacyIO=false 1592BAR2Size=8 1593BAR3=1 1594BAR3LegacyIO=false 1595BAR3Size=4 1596BAR4=1 1597BAR4LegacyIO=false 1598BAR4Size=16 1599BAR5=1 1600BAR5LegacyIO=false 1601BAR5Size=0 1602BIST=0 1603CacheLineSize=0 1604CapabilityPtr=0 1605CardbusCIS=0 1606ClassCode=1 1607Command=1 1608DeviceID=28945 1609ExpansionROM=0 1610HeaderType=0 1611InterruptLine=31 1612InterruptPin=1 1613LatencyTimer=0 1614MSICAPBaseOffset=0 1615MSICAPCapId=0 1616MSICAPMaskBits=0 1617MSICAPMsgAddr=0 1618MSICAPMsgCtrl=0 1619MSICAPMsgData=0 1620MSICAPMsgUpperAddr=0 1621MSICAPNextCapability=0 1622MSICAPPendingBits=0 1623MSIXCAPBaseOffset=0 1624MSIXCAPCapId=0 1625MSIXCAPNextCapability=0 1626MSIXMsgCtrl=0 1627MSIXPbaOffset=0 1628MSIXTableOffset=0 1629MaximumLatency=0 1630MinimumGrant=0 1631PMCAPBaseOffset=0 1632PMCAPCapId=0 1633PMCAPCapabilities=0 1634PMCAPCtrlStatus=0 1635PMCAPNextCapability=0 1636PXCAPBaseOffset=0 1637PXCAPCapId=0 1638PXCAPCapabilities=0 1639PXCAPDevCap2=0 1640PXCAPDevCapabilities=0 1641PXCAPDevCtrl=0 1642PXCAPDevCtrl2=0 1643PXCAPDevStatus=0 1644PXCAPLinkCap=0 1645PXCAPLinkCtrl=0 1646PXCAPLinkStatus=0 1647PXCAPNextCapability=0 1648ProgIF=133 1649Revision=0 1650Status=640 1651SubClassCode=1 1652SubsystemID=0 1653SubsystemVendorID=0 1654VendorID=32902 1655clk_domain=system.clk_domain 1656config_latency=20000 1657ctrl_offset=2 1658disks=system.cf0 1659eventq_index=0 1660io_shift=1 1661pci_bus=2 1662pci_dev=7 1663pci_func=0 1664pio_latency=30000 1665platform=system.realview 1666system=system 1667config=system.iobus.master[8] 1668dma=system.iobus.slave[2] 1669pio=system.iobus.master[7] 1670 1671[system.realview.clcd] 1672type=Pl111 1673amba_id=1315089 1674clk_domain=system.clk_domain 1675enable_capture=true 1676eventq_index=0 1677gic=system.realview.gic 1678int_num=55 1679pio_addr=268566528 1680pio_latency=10000 1681pixel_clock=41667 1682system=system 1683vnc=system.vncserver 1684dma=system.iobus.slave[1] 1685pio=system.iobus.master[4] 1686 1687[system.realview.dmac_fake] 1688type=AmbaFake 1689amba_id=0 1690clk_domain=system.clk_domain 1691eventq_index=0 1692ignore_access=false 1693pio_addr=268632064 1694pio_latency=100000 1695system=system 1696pio=system.iobus.master[9] 1697 1698[system.realview.flash_fake] 1699type=IsaFake 1700clk_domain=system.clk_domain 1701eventq_index=0 1702fake_mem=true 1703pio_addr=1073741824 1704pio_latency=100000 1705pio_size=536870912 1706ret_bad_addr=false 1707ret_data16=65535 1708ret_data32=4294967295 1709ret_data64=18446744073709551615 1710ret_data8=255 1711system=system 1712update_data=false 1713warn_access= 1714pio=system.iobus.master[24] 1715 1716[system.realview.gic] 1717type=Pl390 1718clk_domain=system.clk_domain 1719cpu_addr=520093952 1720cpu_pio_delay=10000 1721dist_addr=520097792 1722dist_pio_delay=10000 1723eventq_index=0 1724int_latency=10000 1725it_lines=128 1726msix_addr=0 1727platform=system.realview 1728system=system 1729pio=system.membus.master[2] 1730 1731[system.realview.gpio0_fake] 1732type=AmbaFake 1733amba_id=0 1734clk_domain=system.clk_domain 1735eventq_index=0 1736ignore_access=false 1737pio_addr=268513280 1738pio_latency=100000 1739system=system 1740pio=system.iobus.master[16] 1741 1742[system.realview.gpio1_fake] 1743type=AmbaFake 1744amba_id=0 1745clk_domain=system.clk_domain 1746eventq_index=0 1747ignore_access=false 1748pio_addr=268517376 1749pio_latency=100000 1750system=system 1751pio=system.iobus.master[17] 1752 1753[system.realview.gpio2_fake] 1754type=AmbaFake 1755amba_id=0 1756clk_domain=system.clk_domain 1757eventq_index=0 1758ignore_access=false 1759pio_addr=268521472 1760pio_latency=100000 1761system=system 1762pio=system.iobus.master[18] 1763 1764[system.realview.kmi0] 1765type=Pl050 1766amba_id=1314896 1767clk_domain=system.clk_domain 1768eventq_index=0 1769gic=system.realview.gic 1770int_delay=1000000 1771int_num=52 1772is_mouse=false 1773pio_addr=268460032 1774pio_latency=100000 1775system=system 1776vnc=system.vncserver 1777pio=system.iobus.master[5] 1778 1779[system.realview.kmi1] 1780type=Pl050 1781amba_id=1314896 1782clk_domain=system.clk_domain 1783eventq_index=0 1784gic=system.realview.gic 1785int_delay=1000000 1786int_num=53 1787is_mouse=true 1788pio_addr=268464128 1789pio_latency=100000 1790system=system 1791vnc=system.vncserver 1792pio=system.iobus.master[6] 1793 1794[system.realview.l2x0_fake] 1795type=IsaFake 1796clk_domain=system.clk_domain 1797eventq_index=0 1798fake_mem=false 1799pio_addr=520101888 1800pio_latency=100000 1801pio_size=4095 1802ret_bad_addr=false 1803ret_data16=65535 1804ret_data32=4294967295 1805ret_data64=18446744073709551615 1806ret_data8=255 1807system=system 1808update_data=false 1809warn_access= 1810pio=system.membus.master[3] 1811 1812[system.realview.local_cpu_timer] 1813type=CpuLocalTimer 1814clk_domain=system.clk_domain 1815eventq_index=0 1816gic=system.realview.gic 1817int_num_timer=29 1818int_num_watchdog=30 1819pio_addr=520095232 1820pio_latency=100000 1821system=system 1822pio=system.membus.master[5] 1823 1824[system.realview.mmc_fake] 1825type=AmbaFake 1826amba_id=0 1827clk_domain=system.clk_domain 1828eventq_index=0 1829ignore_access=false 1830pio_addr=268455936 1831pio_latency=100000 1832system=system 1833pio=system.iobus.master[22] 1834 1835[system.realview.nvmem] 1836type=SimpleMemory 1837bandwidth=73.000000 1838clk_domain=system.clk_domain 1839conf_table_reported=false 1840eventq_index=0 1841in_addr_map=true 1842latency=30000 1843latency_var=0 1844null=false 1845range=2147483648:2214592511 1846port=system.membus.master[1] 1847 1848[system.realview.realview_io] 1849type=RealViewCtrl 1850clk_domain=system.clk_domain 1851eventq_index=0 1852idreg=0 1853pio_addr=268435456 1854pio_latency=100000 1855proc_id0=201326592 1856proc_id1=201327138 1857system=system 1858pio=system.iobus.master[1] 1859 1860[system.realview.rtc] 1861type=PL031 1862amba_id=3412017 1863clk_domain=system.clk_domain 1864eventq_index=0 1865gic=system.realview.gic 1866int_delay=100000 1867int_num=42 1868pio_addr=268529664 1869pio_latency=100000 1870system=system 1871time=Thu Jan 1 00:00:00 2009 1872pio=system.iobus.master[23] 1873 1874[system.realview.sci_fake] 1875type=AmbaFake 1876amba_id=0 1877clk_domain=system.clk_domain 1878eventq_index=0 1879ignore_access=false 1880pio_addr=268492800 1881pio_latency=100000 1882system=system 1883pio=system.iobus.master[20] 1884 1885[system.realview.smc_fake] 1886type=AmbaFake 1887amba_id=0 1888clk_domain=system.clk_domain 1889eventq_index=0 1890ignore_access=false 1891pio_addr=269357056 1892pio_latency=100000 1893system=system 1894pio=system.iobus.master[13] 1895 1896[system.realview.sp810_fake] 1897type=AmbaFake 1898amba_id=0 1899clk_domain=system.clk_domain 1900eventq_index=0 1901ignore_access=true 1902pio_addr=268439552 1903pio_latency=100000 1904system=system 1905pio=system.iobus.master[14] 1906 1907[system.realview.ssp_fake] 1908type=AmbaFake 1909amba_id=0 1910clk_domain=system.clk_domain 1911eventq_index=0 1912ignore_access=false 1913pio_addr=268488704 1914pio_latency=100000 1915system=system 1916pio=system.iobus.master[19] 1917 1918[system.realview.timer0] 1919type=Sp804 1920amba_id=1316868 1921clk_domain=system.clk_domain 1922clock0=1000000 1923clock1=1000000 1924eventq_index=0 1925gic=system.realview.gic 1926int_num0=36 1927int_num1=36 1928pio_addr=268505088 1929pio_latency=100000 1930system=system 1931pio=system.iobus.master[2] 1932 1933[system.realview.timer1] 1934type=Sp804 1935amba_id=1316868 1936clk_domain=system.clk_domain 1937clock0=1000000 1938clock1=1000000 1939eventq_index=0 1940gic=system.realview.gic 1941int_num0=37 1942int_num1=37 1943pio_addr=268509184 1944pio_latency=100000 1945system=system 1946pio=system.iobus.master[3] 1947 1948[system.realview.uart] 1949type=Pl011 1950clk_domain=system.clk_domain 1951end_on_eot=false 1952eventq_index=0 1953gic=system.realview.gic 1954int_delay=100000 1955int_num=44 1956pio_addr=268472320 1957pio_latency=100000 1958platform=system.realview 1959system=system 1960terminal=system.terminal 1961pio=system.iobus.master[0] 1962 1963[system.realview.uart1_fake] 1964type=AmbaFake 1965amba_id=0 1966clk_domain=system.clk_domain 1967eventq_index=0 1968ignore_access=false 1969pio_addr=268476416 1970pio_latency=100000 1971system=system 1972pio=system.iobus.master[10] 1973 1974[system.realview.uart2_fake] 1975type=AmbaFake 1976amba_id=0 1977clk_domain=system.clk_domain 1978eventq_index=0 1979ignore_access=false 1980pio_addr=268480512 1981pio_latency=100000 1982system=system 1983pio=system.iobus.master[11] 1984 1985[system.realview.uart3_fake] 1986type=AmbaFake 1987amba_id=0 1988clk_domain=system.clk_domain 1989eventq_index=0 1990ignore_access=false 1991pio_addr=268484608 1992pio_latency=100000 1993system=system 1994pio=system.iobus.master[12] 1995 1996[system.realview.watchdog_fake] 1997type=AmbaFake 1998amba_id=0 1999clk_domain=system.clk_domain 2000eventq_index=0 2001ignore_access=false 2002pio_addr=268500992 2003pio_latency=100000 2004system=system 2005pio=system.iobus.master[15] 2006 2007[system.terminal] 2008type=Terminal 2009eventq_index=0 2010intr_control=system.intrctrl 2011number=0 2012output=true 2013port=3456 2014 2015[system.toL2Bus] 2016type=CoherentBus 2017clk_domain=system.cpu_clk_domain 2018eventq_index=0 2019header_cycles=1 2020system=system 2021use_default_range=false 2022width=8 2023master=system.l2c.cpu_side 2024slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port system.cpu0.istage2_mmu.stage2_tlb.walker.port system.cpu0.dstage2_mmu.stage2_tlb.walker.port system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu1.itb.walker.port system.cpu1.dtb.walker.port system.cpu1.istage2_mmu.stage2_tlb.walker.port system.cpu1.dstage2_mmu.stage2_tlb.walker.port 2025 2026[system.vncserver] 2027type=VncServer 2028eventq_index=0 2029frame_capture=false 2030number=0 2031port=5900 2032 2033[system.voltage_domain] 2034type=VoltageDomain 2035eventq_index=0 2036voltage=1.000000 2037 2038