config.ini revision 9536
1[root] 2type=Root 3children=system 4full_system=true 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 9[system] 10type=LinuxAlphaSystem 11children=bridge cpu disk0 disk2 intrctrl iobus iocache membus physmem simple_disk terminal tsunami 12boot_cpu_frequency=500 13boot_osflags=root=/dev/hda1 console=ttyS0 14clock=1000 15console=/projects/pd/randd/dist/binaries/console 16init_param=0 17kernel=/projects/pd/randd/dist/binaries/vmlinux 18load_addr_mask=1099511627775 19mem_mode=timing 20mem_ranges=0:134217727 21memories=system.physmem 22num_work_ids=16 23pal=/projects/pd/randd/dist/binaries/ts_osfpal 24readfile=tests/halt.sh 25symbolfile= 26system_rev=1024 27system_type=34 28work_begin_ckpt_count=0 29work_begin_cpu_id_exit=-1 30work_begin_exit_count=0 31work_cpus_ckpt_count=0 32work_end_ckpt_count=0 33work_end_exit_count=0 34work_item_id=-1 35system_port=system.membus.slave[0] 36 37[system.bridge] 38type=Bridge 39clock=1000 40delay=50000 41ranges=8796093022208:18446744073709551615 42req_size=16 43resp_size=16 44master=system.iobus.slave[0] 45slave=system.membus.master[0] 46 47[system.cpu] 48type=DerivO3CPU 49children=branchPred dcache dtb fuPool icache interrupts isa itb l2cache toL2Bus tracer 50LFSTSize=1024 51LQEntries=32 52LSQCheckLoads=true 53LSQDepCheckShift=4 54SQEntries=32 55SSITSize=1024 56activity=0 57backComSize=5 58branchPred=system.cpu.branchPred 59cachePorts=200 60checker=Null 61clock=500 62commitToDecodeDelay=1 63commitToFetchDelay=1 64commitToIEWDelay=1 65commitToRenameDelay=1 66commitWidth=8 67cpu_id=0 68decodeToFetchDelay=1 69decodeToRenameDelay=1 70decodeWidth=8 71dispatchWidth=8 72do_checkpoint_insts=true 73do_quiesce=true 74do_statistics_insts=true 75dtb=system.cpu.dtb 76fetchToDecodeDelay=1 77fetchTrapLatency=1 78fetchWidth=8 79forwardComSize=5 80fuPool=system.cpu.fuPool 81function_trace=false 82function_trace_start=0 83iewToCommitDelay=1 84iewToDecodeDelay=1 85iewToFetchDelay=1 86iewToRenameDelay=1 87interrupts=system.cpu.interrupts 88isa=system.cpu.isa 89issueToExecuteDelay=1 90issueWidth=8 91itb=system.cpu.itb 92max_insts_all_threads=0 93max_insts_any_thread=0 94max_loads_all_threads=0 95max_loads_any_thread=0 96needsTSO=false 97numIQEntries=64 98numPhysFloatRegs=256 99numPhysIntRegs=256 100numROBEntries=192 101numRobs=1 102numThreads=1 103profile=0 104progress_interval=0 105renameToDecodeDelay=1 106renameToFetchDelay=1 107renameToIEWDelay=2 108renameToROBDelay=1 109renameWidth=8 110smtCommitPolicy=RoundRobin 111smtFetchPolicy=SingleThread 112smtIQPolicy=Partitioned 113smtIQThreshold=100 114smtLSQPolicy=Partitioned 115smtLSQThreshold=100 116smtNumFetchingThreads=1 117smtROBPolicy=Partitioned 118smtROBThreshold=100 119squashWidth=8 120store_set_clear_period=250000 121switched_out=false 122system=system 123tracer=system.cpu.tracer 124trapLatency=13 125wbDepth=1 126wbWidth=8 127workload= 128dcache_port=system.cpu.dcache.cpu_side 129icache_port=system.cpu.icache.cpu_side 130 131[system.cpu.branchPred] 132type=BranchPredictor 133BTBEntries=4096 134BTBTagSize=16 135RASSize=16 136choiceCtrBits=2 137choicePredictorSize=8192 138globalCtrBits=2 139globalHistoryBits=13 140globalPredictorSize=8192 141instShiftAmt=2 142localCtrBits=2 143localHistoryBits=11 144localHistoryTableSize=2048 145localPredictorSize=2048 146numThreads=1 147predType=tournament 148 149[system.cpu.dcache] 150type=BaseCache 151addr_ranges=0:18446744073709551615 152assoc=4 153block_size=64 154clock=500 155forward_snoops=true 156hit_latency=2 157is_top_level=true 158max_miss_count=0 159mshrs=4 160prefetch_on_access=false 161prefetcher=Null 162response_latency=2 163size=32768 164system=system 165tgts_per_mshr=20 166two_queue=false 167write_buffers=8 168cpu_side=system.cpu.dcache_port 169mem_side=system.cpu.toL2Bus.slave[1] 170 171[system.cpu.dtb] 172type=AlphaTLB 173size=64 174 175[system.cpu.fuPool] 176type=FUPool 177children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 178FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8 179 180[system.cpu.fuPool.FUList0] 181type=FUDesc 182children=opList 183count=6 184opList=system.cpu.fuPool.FUList0.opList 185 186[system.cpu.fuPool.FUList0.opList] 187type=OpDesc 188issueLat=1 189opClass=IntAlu 190opLat=1 191 192[system.cpu.fuPool.FUList1] 193type=FUDesc 194children=opList0 opList1 195count=2 196opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 197 198[system.cpu.fuPool.FUList1.opList0] 199type=OpDesc 200issueLat=1 201opClass=IntMult 202opLat=3 203 204[system.cpu.fuPool.FUList1.opList1] 205type=OpDesc 206issueLat=19 207opClass=IntDiv 208opLat=20 209 210[system.cpu.fuPool.FUList2] 211type=FUDesc 212children=opList0 opList1 opList2 213count=4 214opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2 215 216[system.cpu.fuPool.FUList2.opList0] 217type=OpDesc 218issueLat=1 219opClass=FloatAdd 220opLat=2 221 222[system.cpu.fuPool.FUList2.opList1] 223type=OpDesc 224issueLat=1 225opClass=FloatCmp 226opLat=2 227 228[system.cpu.fuPool.FUList2.opList2] 229type=OpDesc 230issueLat=1 231opClass=FloatCvt 232opLat=2 233 234[system.cpu.fuPool.FUList3] 235type=FUDesc 236children=opList0 opList1 opList2 237count=2 238opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 239 240[system.cpu.fuPool.FUList3.opList0] 241type=OpDesc 242issueLat=1 243opClass=FloatMult 244opLat=4 245 246[system.cpu.fuPool.FUList3.opList1] 247type=OpDesc 248issueLat=12 249opClass=FloatDiv 250opLat=12 251 252[system.cpu.fuPool.FUList3.opList2] 253type=OpDesc 254issueLat=24 255opClass=FloatSqrt 256opLat=24 257 258[system.cpu.fuPool.FUList4] 259type=FUDesc 260children=opList 261count=0 262opList=system.cpu.fuPool.FUList4.opList 263 264[system.cpu.fuPool.FUList4.opList] 265type=OpDesc 266issueLat=1 267opClass=MemRead 268opLat=1 269 270[system.cpu.fuPool.FUList5] 271type=FUDesc 272children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 273count=4 274opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19 275 276[system.cpu.fuPool.FUList5.opList00] 277type=OpDesc 278issueLat=1 279opClass=SimdAdd 280opLat=1 281 282[system.cpu.fuPool.FUList5.opList01] 283type=OpDesc 284issueLat=1 285opClass=SimdAddAcc 286opLat=1 287 288[system.cpu.fuPool.FUList5.opList02] 289type=OpDesc 290issueLat=1 291opClass=SimdAlu 292opLat=1 293 294[system.cpu.fuPool.FUList5.opList03] 295type=OpDesc 296issueLat=1 297opClass=SimdCmp 298opLat=1 299 300[system.cpu.fuPool.FUList5.opList04] 301type=OpDesc 302issueLat=1 303opClass=SimdCvt 304opLat=1 305 306[system.cpu.fuPool.FUList5.opList05] 307type=OpDesc 308issueLat=1 309opClass=SimdMisc 310opLat=1 311 312[system.cpu.fuPool.FUList5.opList06] 313type=OpDesc 314issueLat=1 315opClass=SimdMult 316opLat=1 317 318[system.cpu.fuPool.FUList5.opList07] 319type=OpDesc 320issueLat=1 321opClass=SimdMultAcc 322opLat=1 323 324[system.cpu.fuPool.FUList5.opList08] 325type=OpDesc 326issueLat=1 327opClass=SimdShift 328opLat=1 329 330[system.cpu.fuPool.FUList5.opList09] 331type=OpDesc 332issueLat=1 333opClass=SimdShiftAcc 334opLat=1 335 336[system.cpu.fuPool.FUList5.opList10] 337type=OpDesc 338issueLat=1 339opClass=SimdSqrt 340opLat=1 341 342[system.cpu.fuPool.FUList5.opList11] 343type=OpDesc 344issueLat=1 345opClass=SimdFloatAdd 346opLat=1 347 348[system.cpu.fuPool.FUList5.opList12] 349type=OpDesc 350issueLat=1 351opClass=SimdFloatAlu 352opLat=1 353 354[system.cpu.fuPool.FUList5.opList13] 355type=OpDesc 356issueLat=1 357opClass=SimdFloatCmp 358opLat=1 359 360[system.cpu.fuPool.FUList5.opList14] 361type=OpDesc 362issueLat=1 363opClass=SimdFloatCvt 364opLat=1 365 366[system.cpu.fuPool.FUList5.opList15] 367type=OpDesc 368issueLat=1 369opClass=SimdFloatDiv 370opLat=1 371 372[system.cpu.fuPool.FUList5.opList16] 373type=OpDesc 374issueLat=1 375opClass=SimdFloatMisc 376opLat=1 377 378[system.cpu.fuPool.FUList5.opList17] 379type=OpDesc 380issueLat=1 381opClass=SimdFloatMult 382opLat=1 383 384[system.cpu.fuPool.FUList5.opList18] 385type=OpDesc 386issueLat=1 387opClass=SimdFloatMultAcc 388opLat=1 389 390[system.cpu.fuPool.FUList5.opList19] 391type=OpDesc 392issueLat=1 393opClass=SimdFloatSqrt 394opLat=1 395 396[system.cpu.fuPool.FUList6] 397type=FUDesc 398children=opList 399count=0 400opList=system.cpu.fuPool.FUList6.opList 401 402[system.cpu.fuPool.FUList6.opList] 403type=OpDesc 404issueLat=1 405opClass=MemWrite 406opLat=1 407 408[system.cpu.fuPool.FUList7] 409type=FUDesc 410children=opList0 opList1 411count=4 412opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1 413 414[system.cpu.fuPool.FUList7.opList0] 415type=OpDesc 416issueLat=1 417opClass=MemRead 418opLat=1 419 420[system.cpu.fuPool.FUList7.opList1] 421type=OpDesc 422issueLat=1 423opClass=MemWrite 424opLat=1 425 426[system.cpu.fuPool.FUList8] 427type=FUDesc 428children=opList 429count=1 430opList=system.cpu.fuPool.FUList8.opList 431 432[system.cpu.fuPool.FUList8.opList] 433type=OpDesc 434issueLat=3 435opClass=IprAccess 436opLat=3 437 438[system.cpu.icache] 439type=BaseCache 440addr_ranges=0:18446744073709551615 441assoc=1 442block_size=64 443clock=500 444forward_snoops=true 445hit_latency=2 446is_top_level=true 447max_miss_count=0 448mshrs=4 449prefetch_on_access=false 450prefetcher=Null 451response_latency=2 452size=32768 453system=system 454tgts_per_mshr=20 455two_queue=false 456write_buffers=8 457cpu_side=system.cpu.icache_port 458mem_side=system.cpu.toL2Bus.slave[0] 459 460[system.cpu.interrupts] 461type=AlphaInterrupts 462 463[system.cpu.isa] 464type=AlphaISA 465 466[system.cpu.itb] 467type=AlphaTLB 468size=48 469 470[system.cpu.l2cache] 471type=BaseCache 472addr_ranges=0:18446744073709551615 473assoc=8 474block_size=64 475clock=500 476forward_snoops=true 477hit_latency=20 478is_top_level=false 479max_miss_count=0 480mshrs=20 481prefetch_on_access=false 482prefetcher=Null 483response_latency=20 484size=4194304 485system=system 486tgts_per_mshr=12 487two_queue=false 488write_buffers=8 489cpu_side=system.cpu.toL2Bus.master[0] 490mem_side=system.membus.slave[1] 491 492[system.cpu.toL2Bus] 493type=CoherentBus 494block_size=64 495clock=500 496header_cycles=1 497system=system 498use_default_range=false 499width=32 500master=system.cpu.l2cache.cpu_side 501slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side 502 503[system.cpu.tracer] 504type=ExeTracer 505 506[system.disk0] 507type=IdeDisk 508children=image 509delay=1000000 510driveID=master 511image=system.disk0.image 512 513[system.disk0.image] 514type=CowDiskImage 515children=child 516child=system.disk0.image.child 517image_file= 518read_only=false 519table_size=65536 520 521[system.disk0.image.child] 522type=RawDiskImage 523image_file=/projects/pd/randd/dist/disks/linux-latest.img 524read_only=true 525 526[system.disk2] 527type=IdeDisk 528children=image 529delay=1000000 530driveID=master 531image=system.disk2.image 532 533[system.disk2.image] 534type=CowDiskImage 535children=child 536child=system.disk2.image.child 537image_file= 538read_only=false 539table_size=65536 540 541[system.disk2.image.child] 542type=RawDiskImage 543image_file=/projects/pd/randd/dist/disks/linux-bigswap2.img 544read_only=true 545 546[system.intrctrl] 547type=IntrControl 548sys=system 549 550[system.iobus] 551type=NoncoherentBus 552block_size=64 553clock=1000 554header_cycles=1 555use_default_range=true 556width=8 557default=system.tsunami.pciconfig.pio 558master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side 559slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma 560 561[system.iocache] 562type=BaseCache 563addr_ranges=0:134217727 564assoc=8 565block_size=64 566clock=1000 567forward_snoops=false 568hit_latency=50 569is_top_level=true 570max_miss_count=0 571mshrs=20 572prefetch_on_access=false 573prefetcher=Null 574response_latency=50 575size=1024 576system=system 577tgts_per_mshr=12 578two_queue=false 579write_buffers=8 580cpu_side=system.iobus.master[29] 581mem_side=system.membus.slave[2] 582 583[system.membus] 584type=CoherentBus 585children=badaddr_responder 586block_size=64 587clock=1000 588header_cycles=1 589system=system 590use_default_range=false 591width=8 592default=system.membus.badaddr_responder.pio 593master=system.bridge.slave system.physmem.port 594slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side 595 596[system.membus.badaddr_responder] 597type=IsaFake 598clock=1000 599fake_mem=false 600pio_addr=0 601pio_latency=100000 602pio_size=8 603ret_bad_addr=true 604ret_data16=65535 605ret_data32=4294967295 606ret_data64=18446744073709551615 607ret_data8=255 608system=system 609update_data=false 610warn_access= 611pio=system.membus.default 612 613[system.physmem] 614type=SimpleDRAM 615activation_limit=4 616addr_mapping=openmap 617banks_per_rank=8 618clock=1000 619conf_table_reported=false 620in_addr_map=true 621lines_per_rowbuffer=32 622mem_sched_policy=frfcfs 623null=false 624page_policy=open 625range=0:134217727 626ranks_per_channel=2 627read_buffer_size=32 628tBURST=5000 629tCL=13750 630tRCD=13750 631tREFI=7800000 632tRFC=300000 633tRP=13750 634tWTR=7500 635tXAW=40000 636write_buffer_size=32 637write_thresh_perc=70 638zero=false 639port=system.membus.master[1] 640 641[system.simple_disk] 642type=SimpleDisk 643children=disk 644disk=system.simple_disk.disk 645system=system 646 647[system.simple_disk.disk] 648type=RawDiskImage 649image_file=/projects/pd/randd/dist/disks/linux-latest.img 650read_only=true 651 652[system.terminal] 653type=Terminal 654intr_control=system.intrctrl 655number=0 656output=true 657port=3456 658 659[system.tsunami] 660type=Tsunami 661children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart 662intrctrl=system.intrctrl 663system=system 664 665[system.tsunami.backdoor] 666type=AlphaBackdoor 667clock=1000 668cpu=system.cpu 669disk=system.simple_disk 670pio_addr=8804682956800 671pio_latency=100000 672platform=system.tsunami 673system=system 674terminal=system.terminal 675pio=system.iobus.master[24] 676 677[system.tsunami.cchip] 678type=TsunamiCChip 679clock=1000 680pio_addr=8803072344064 681pio_latency=100000 682system=system 683tsunami=system.tsunami 684pio=system.iobus.master[0] 685 686[system.tsunami.ethernet] 687type=NSGigE 688BAR0=1 689BAR0LegacyIO=false 690BAR0Size=256 691BAR1=0 692BAR1LegacyIO=false 693BAR1Size=4096 694BAR2=0 695BAR2LegacyIO=false 696BAR2Size=0 697BAR3=0 698BAR3LegacyIO=false 699BAR3Size=0 700BAR4=0 701BAR4LegacyIO=false 702BAR4Size=0 703BAR5=0 704BAR5LegacyIO=false 705BAR5Size=0 706BIST=0 707CacheLineSize=0 708CardbusCIS=0 709ClassCode=2 710Command=0 711DeviceID=34 712ExpansionROM=0 713HeaderType=0 714InterruptLine=30 715InterruptPin=1 716LatencyTimer=0 717MaximumLatency=52 718MinimumGrant=176 719ProgIF=0 720Revision=0 721Status=656 722SubClassCode=0 723SubsystemID=0 724SubsystemVendorID=0 725VendorID=4107 726clock=2000 727config_latency=20000 728dma_data_free=false 729dma_desc_free=false 730dma_no_allocate=true 731dma_read_delay=0 732dma_read_factor=0 733dma_write_delay=0 734dma_write_factor=0 735hardware_address=00:90:00:00:00:01 736intr_delay=10000000 737pci_bus=0 738pci_dev=1 739pci_func=0 740pio_latency=30000 741platform=system.tsunami 742rss=false 743rx_delay=1000000 744rx_fifo_size=524288 745rx_filter=true 746rx_thread=false 747system=system 748tx_delay=1000000 749tx_fifo_size=524288 750tx_thread=false 751config=system.iobus.master[28] 752dma=system.iobus.slave[2] 753pio=system.iobus.master[27] 754 755[system.tsunami.fake_OROM] 756type=IsaFake 757clock=1000 758fake_mem=false 759pio_addr=8796093677568 760pio_latency=100000 761pio_size=393216 762ret_bad_addr=false 763ret_data16=65535 764ret_data32=4294967295 765ret_data64=18446744073709551615 766ret_data8=255 767system=system 768update_data=false 769warn_access= 770pio=system.iobus.master[8] 771 772[system.tsunami.fake_ata0] 773type=IsaFake 774clock=1000 775fake_mem=false 776pio_addr=8804615848432 777pio_latency=100000 778pio_size=8 779ret_bad_addr=false 780ret_data16=65535 781ret_data32=4294967295 782ret_data64=18446744073709551615 783ret_data8=255 784system=system 785update_data=false 786warn_access= 787pio=system.iobus.master[19] 788 789[system.tsunami.fake_ata1] 790type=IsaFake 791clock=1000 792fake_mem=false 793pio_addr=8804615848304 794pio_latency=100000 795pio_size=8 796ret_bad_addr=false 797ret_data16=65535 798ret_data32=4294967295 799ret_data64=18446744073709551615 800ret_data8=255 801system=system 802update_data=false 803warn_access= 804pio=system.iobus.master[20] 805 806[system.tsunami.fake_pnp_addr] 807type=IsaFake 808clock=1000 809fake_mem=false 810pio_addr=8804615848569 811pio_latency=100000 812pio_size=8 813ret_bad_addr=false 814ret_data16=65535 815ret_data32=4294967295 816ret_data64=18446744073709551615 817ret_data8=255 818system=system 819update_data=false 820warn_access= 821pio=system.iobus.master[9] 822 823[system.tsunami.fake_pnp_read0] 824type=IsaFake 825clock=1000 826fake_mem=false 827pio_addr=8804615848451 828pio_latency=100000 829pio_size=8 830ret_bad_addr=false 831ret_data16=65535 832ret_data32=4294967295 833ret_data64=18446744073709551615 834ret_data8=255 835system=system 836update_data=false 837warn_access= 838pio=system.iobus.master[11] 839 840[system.tsunami.fake_pnp_read1] 841type=IsaFake 842clock=1000 843fake_mem=false 844pio_addr=8804615848515 845pio_latency=100000 846pio_size=8 847ret_bad_addr=false 848ret_data16=65535 849ret_data32=4294967295 850ret_data64=18446744073709551615 851ret_data8=255 852system=system 853update_data=false 854warn_access= 855pio=system.iobus.master[12] 856 857[system.tsunami.fake_pnp_read2] 858type=IsaFake 859clock=1000 860fake_mem=false 861pio_addr=8804615848579 862pio_latency=100000 863pio_size=8 864ret_bad_addr=false 865ret_data16=65535 866ret_data32=4294967295 867ret_data64=18446744073709551615 868ret_data8=255 869system=system 870update_data=false 871warn_access= 872pio=system.iobus.master[13] 873 874[system.tsunami.fake_pnp_read3] 875type=IsaFake 876clock=1000 877fake_mem=false 878pio_addr=8804615848643 879pio_latency=100000 880pio_size=8 881ret_bad_addr=false 882ret_data16=65535 883ret_data32=4294967295 884ret_data64=18446744073709551615 885ret_data8=255 886system=system 887update_data=false 888warn_access= 889pio=system.iobus.master[14] 890 891[system.tsunami.fake_pnp_read4] 892type=IsaFake 893clock=1000 894fake_mem=false 895pio_addr=8804615848707 896pio_latency=100000 897pio_size=8 898ret_bad_addr=false 899ret_data16=65535 900ret_data32=4294967295 901ret_data64=18446744073709551615 902ret_data8=255 903system=system 904update_data=false 905warn_access= 906pio=system.iobus.master[15] 907 908[system.tsunami.fake_pnp_read5] 909type=IsaFake 910clock=1000 911fake_mem=false 912pio_addr=8804615848771 913pio_latency=100000 914pio_size=8 915ret_bad_addr=false 916ret_data16=65535 917ret_data32=4294967295 918ret_data64=18446744073709551615 919ret_data8=255 920system=system 921update_data=false 922warn_access= 923pio=system.iobus.master[16] 924 925[system.tsunami.fake_pnp_read6] 926type=IsaFake 927clock=1000 928fake_mem=false 929pio_addr=8804615848835 930pio_latency=100000 931pio_size=8 932ret_bad_addr=false 933ret_data16=65535 934ret_data32=4294967295 935ret_data64=18446744073709551615 936ret_data8=255 937system=system 938update_data=false 939warn_access= 940pio=system.iobus.master[17] 941 942[system.tsunami.fake_pnp_read7] 943type=IsaFake 944clock=1000 945fake_mem=false 946pio_addr=8804615848899 947pio_latency=100000 948pio_size=8 949ret_bad_addr=false 950ret_data16=65535 951ret_data32=4294967295 952ret_data64=18446744073709551615 953ret_data8=255 954system=system 955update_data=false 956warn_access= 957pio=system.iobus.master[18] 958 959[system.tsunami.fake_pnp_write] 960type=IsaFake 961clock=1000 962fake_mem=false 963pio_addr=8804615850617 964pio_latency=100000 965pio_size=8 966ret_bad_addr=false 967ret_data16=65535 968ret_data32=4294967295 969ret_data64=18446744073709551615 970ret_data8=255 971system=system 972update_data=false 973warn_access= 974pio=system.iobus.master[10] 975 976[system.tsunami.fake_ppc] 977type=IsaFake 978clock=1000 979fake_mem=false 980pio_addr=8804615848891 981pio_latency=100000 982pio_size=8 983ret_bad_addr=false 984ret_data16=65535 985ret_data32=4294967295 986ret_data64=18446744073709551615 987ret_data8=255 988system=system 989update_data=false 990warn_access= 991pio=system.iobus.master[7] 992 993[system.tsunami.fake_sm_chip] 994type=IsaFake 995clock=1000 996fake_mem=false 997pio_addr=8804615848816 998pio_latency=100000 999pio_size=8 1000ret_bad_addr=false 1001ret_data16=65535 1002ret_data32=4294967295 1003ret_data64=18446744073709551615 1004ret_data8=255 1005system=system 1006update_data=false 1007warn_access= 1008pio=system.iobus.master[2] 1009 1010[system.tsunami.fake_uart1] 1011type=IsaFake 1012clock=1000 1013fake_mem=false 1014pio_addr=8804615848696 1015pio_latency=100000 1016pio_size=8 1017ret_bad_addr=false 1018ret_data16=65535 1019ret_data32=4294967295 1020ret_data64=18446744073709551615 1021ret_data8=255 1022system=system 1023update_data=false 1024warn_access= 1025pio=system.iobus.master[3] 1026 1027[system.tsunami.fake_uart2] 1028type=IsaFake 1029clock=1000 1030fake_mem=false 1031pio_addr=8804615848936 1032pio_latency=100000 1033pio_size=8 1034ret_bad_addr=false 1035ret_data16=65535 1036ret_data32=4294967295 1037ret_data64=18446744073709551615 1038ret_data8=255 1039system=system 1040update_data=false 1041warn_access= 1042pio=system.iobus.master[4] 1043 1044[system.tsunami.fake_uart3] 1045type=IsaFake 1046clock=1000 1047fake_mem=false 1048pio_addr=8804615848680 1049pio_latency=100000 1050pio_size=8 1051ret_bad_addr=false 1052ret_data16=65535 1053ret_data32=4294967295 1054ret_data64=18446744073709551615 1055ret_data8=255 1056system=system 1057update_data=false 1058warn_access= 1059pio=system.iobus.master[5] 1060 1061[system.tsunami.fake_uart4] 1062type=IsaFake 1063clock=1000 1064fake_mem=false 1065pio_addr=8804615848944 1066pio_latency=100000 1067pio_size=8 1068ret_bad_addr=false 1069ret_data16=65535 1070ret_data32=4294967295 1071ret_data64=18446744073709551615 1072ret_data8=255 1073system=system 1074update_data=false 1075warn_access= 1076pio=system.iobus.master[6] 1077 1078[system.tsunami.fb] 1079type=BadDevice 1080clock=1000 1081devicename=FrameBuffer 1082pio_addr=8804615848912 1083pio_latency=100000 1084system=system 1085pio=system.iobus.master[21] 1086 1087[system.tsunami.ide] 1088type=IdeController 1089BAR0=1 1090BAR0LegacyIO=false 1091BAR0Size=8 1092BAR1=1 1093BAR1LegacyIO=false 1094BAR1Size=4 1095BAR2=1 1096BAR2LegacyIO=false 1097BAR2Size=8 1098BAR3=1 1099BAR3LegacyIO=false 1100BAR3Size=4 1101BAR4=1 1102BAR4LegacyIO=false 1103BAR4Size=16 1104BAR5=1 1105BAR5LegacyIO=false 1106BAR5Size=0 1107BIST=0 1108CacheLineSize=0 1109CardbusCIS=0 1110ClassCode=1 1111Command=0 1112DeviceID=28945 1113ExpansionROM=0 1114HeaderType=0 1115InterruptLine=31 1116InterruptPin=1 1117LatencyTimer=0 1118MaximumLatency=0 1119MinimumGrant=0 1120ProgIF=133 1121Revision=0 1122Status=640 1123SubClassCode=1 1124SubsystemID=0 1125SubsystemVendorID=0 1126VendorID=32902 1127clock=1000 1128config_latency=20000 1129ctrl_offset=0 1130disks=system.disk0 system.disk2 1131io_shift=0 1132pci_bus=0 1133pci_dev=0 1134pci_func=0 1135pio_latency=30000 1136platform=system.tsunami 1137system=system 1138config=system.iobus.master[26] 1139dma=system.iobus.slave[1] 1140pio=system.iobus.master[25] 1141 1142[system.tsunami.io] 1143type=TsunamiIO 1144clock=1000 1145frequency=976562500 1146pio_addr=8804615847936 1147pio_latency=100000 1148system=system 1149time=Thu Jan 1 00:00:00 2009 1150tsunami=system.tsunami 1151year_is_bcd=false 1152pio=system.iobus.master[22] 1153 1154[system.tsunami.pchip] 1155type=TsunamiPChip 1156clock=1000 1157pio_addr=8802535473152 1158pio_latency=100000 1159system=system 1160tsunami=system.tsunami 1161pio=system.iobus.master[1] 1162 1163[system.tsunami.pciconfig] 1164type=PciConfigAll 1165bus=0 1166clock=1000 1167pio_latency=30000 1168platform=system.tsunami 1169size=16777216 1170system=system 1171pio=system.iobus.default 1172 1173[system.tsunami.uart] 1174type=Uart8250 1175clock=1000 1176pio_addr=8804615848952 1177pio_latency=100000 1178platform=system.tsunami 1179system=system 1180terminal=system.terminal 1181pio=system.iobus.master[23] 1182 1183