config.ini revision 10798
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxAlphaSystem 13children=bridge clk_domain cpu cpu_clk_domain disk0 disk2 dvfs_handler intrctrl iobus iocache membus physmem simple_disk terminal tsunami voltage_domain 14boot_cpu_frequency=500 15boot_osflags=root=/dev/hda1 console=ttyS0 16cache_line_size=64 17clk_domain=system.clk_domain 18console=/home/stever/m5/m5_system_2.0b3/binaries/console 19eventq_index=0 20init_param=0 21kernel=/home/stever/m5/m5_system_2.0b3/binaries/vmlinux 22kernel_addr_check=true 23load_addr_mask=1099511627775 24load_offset=0 25mem_mode=timing 26mem_ranges=0:134217727 27memories=system.physmem 28mmap_using_noreserve=false 29num_work_ids=16 30pal=/home/stever/m5/m5_system_2.0b3/binaries/ts_osfpal 31readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh 32symbolfile= 33system_rev=1024 34system_type=34 35work_begin_ckpt_count=0 36work_begin_cpu_id_exit=-1 37work_begin_exit_count=0 38work_cpus_ckpt_count=0 39work_end_ckpt_count=0 40work_end_exit_count=0 41work_item_id=-1 42system_port=system.membus.slave[0] 43 44[system.bridge] 45type=Bridge 46clk_domain=system.clk_domain 47delay=50000 48eventq_index=0 49ranges=8796093022208:18446744073709551615 50req_size=16 51resp_size=16 52master=system.iobus.slave[0] 53slave=system.membus.master[0] 54 55[system.clk_domain] 56type=SrcClockDomain 57clock=1000 58domain_id=-1 59eventq_index=0 60init_perf_level=0 61voltage_domain=system.voltage_domain 62 63[system.cpu] 64type=DerivO3CPU 65children=branchPred dcache dtb fuPool icache interrupts isa itb l2cache toL2Bus tracer 66LFSTSize=1024 67LQEntries=32 68LSQCheckLoads=true 69LSQDepCheckShift=4 70SQEntries=32 71SSITSize=1024 72activity=0 73backComSize=5 74branchPred=system.cpu.branchPred 75cachePorts=200 76checker=Null 77clk_domain=system.cpu_clk_domain 78commitToDecodeDelay=1 79commitToFetchDelay=1 80commitToIEWDelay=1 81commitToRenameDelay=1 82commitWidth=8 83cpu_id=0 84decodeToFetchDelay=1 85decodeToRenameDelay=1 86decodeWidth=8 87dispatchWidth=8 88do_checkpoint_insts=true 89do_quiesce=true 90do_statistics_insts=true 91dtb=system.cpu.dtb 92eventq_index=0 93fetchBufferSize=64 94fetchQueueSize=32 95fetchToDecodeDelay=1 96fetchTrapLatency=1 97fetchWidth=8 98forwardComSize=5 99fuPool=system.cpu.fuPool 100function_trace=false 101function_trace_start=0 102iewToCommitDelay=1 103iewToDecodeDelay=1 104iewToFetchDelay=1 105iewToRenameDelay=1 106interrupts=system.cpu.interrupts 107isa=system.cpu.isa 108issueToExecuteDelay=1 109issueWidth=8 110itb=system.cpu.itb 111max_insts_all_threads=0 112max_insts_any_thread=0 113max_loads_all_threads=0 114max_loads_any_thread=0 115needsTSO=false 116numIQEntries=64 117numPhysCCRegs=0 118numPhysFloatRegs=256 119numPhysIntRegs=256 120numROBEntries=192 121numRobs=1 122numThreads=1 123profile=0 124progress_interval=0 125renameToDecodeDelay=1 126renameToFetchDelay=1 127renameToIEWDelay=2 128renameToROBDelay=1 129renameWidth=8 130simpoint_start_insts= 131smtCommitPolicy=RoundRobin 132smtFetchPolicy=SingleThread 133smtIQPolicy=Partitioned 134smtIQThreshold=100 135smtLSQPolicy=Partitioned 136smtLSQThreshold=100 137smtNumFetchingThreads=1 138smtROBPolicy=Partitioned 139smtROBThreshold=100 140socket_id=0 141squashWidth=8 142store_set_clear_period=250000 143switched_out=false 144system=system 145tracer=system.cpu.tracer 146trapLatency=13 147wbWidth=8 148workload= 149dcache_port=system.cpu.dcache.cpu_side 150icache_port=system.cpu.icache.cpu_side 151 152[system.cpu.branchPred] 153type=TournamentBP 154BTBEntries=4096 155BTBTagSize=16 156RASSize=16 157choiceCtrBits=2 158choicePredictorSize=8192 159eventq_index=0 160globalCtrBits=2 161globalPredictorSize=8192 162instShiftAmt=2 163localCtrBits=2 164localHistoryTableSize=2048 165localPredictorSize=2048 166numThreads=1 167 168[system.cpu.dcache] 169type=BaseCache 170children=tags 171addr_ranges=0:18446744073709551615 172assoc=4 173clk_domain=system.cpu_clk_domain 174demand_mshr_reserve=1 175eventq_index=0 176forward_snoops=true 177hit_latency=2 178is_top_level=true 179max_miss_count=0 180mshrs=4 181prefetch_on_access=false 182prefetcher=Null 183response_latency=2 184sequential_access=false 185size=32768 186system=system 187tags=system.cpu.dcache.tags 188tgts_per_mshr=20 189two_queue=false 190write_buffers=8 191cpu_side=system.cpu.dcache_port 192mem_side=system.cpu.toL2Bus.slave[1] 193 194[system.cpu.dcache.tags] 195type=LRU 196assoc=4 197block_size=64 198clk_domain=system.cpu_clk_domain 199eventq_index=0 200hit_latency=2 201sequential_access=false 202size=32768 203 204[system.cpu.dtb] 205type=AlphaTLB 206eventq_index=0 207size=64 208 209[system.cpu.fuPool] 210type=FUPool 211children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 212FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8 213eventq_index=0 214 215[system.cpu.fuPool.FUList0] 216type=FUDesc 217children=opList 218count=6 219eventq_index=0 220opList=system.cpu.fuPool.FUList0.opList 221 222[system.cpu.fuPool.FUList0.opList] 223type=OpDesc 224eventq_index=0 225issueLat=1 226opClass=IntAlu 227opLat=1 228 229[system.cpu.fuPool.FUList1] 230type=FUDesc 231children=opList0 opList1 232count=2 233eventq_index=0 234opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 235 236[system.cpu.fuPool.FUList1.opList0] 237type=OpDesc 238eventq_index=0 239issueLat=1 240opClass=IntMult 241opLat=3 242 243[system.cpu.fuPool.FUList1.opList1] 244type=OpDesc 245eventq_index=0 246issueLat=19 247opClass=IntDiv 248opLat=20 249 250[system.cpu.fuPool.FUList2] 251type=FUDesc 252children=opList0 opList1 opList2 253count=4 254eventq_index=0 255opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2 256 257[system.cpu.fuPool.FUList2.opList0] 258type=OpDesc 259eventq_index=0 260issueLat=1 261opClass=FloatAdd 262opLat=2 263 264[system.cpu.fuPool.FUList2.opList1] 265type=OpDesc 266eventq_index=0 267issueLat=1 268opClass=FloatCmp 269opLat=2 270 271[system.cpu.fuPool.FUList2.opList2] 272type=OpDesc 273eventq_index=0 274issueLat=1 275opClass=FloatCvt 276opLat=2 277 278[system.cpu.fuPool.FUList3] 279type=FUDesc 280children=opList0 opList1 opList2 281count=2 282eventq_index=0 283opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 284 285[system.cpu.fuPool.FUList3.opList0] 286type=OpDesc 287eventq_index=0 288issueLat=1 289opClass=FloatMult 290opLat=4 291 292[system.cpu.fuPool.FUList3.opList1] 293type=OpDesc 294eventq_index=0 295issueLat=12 296opClass=FloatDiv 297opLat=12 298 299[system.cpu.fuPool.FUList3.opList2] 300type=OpDesc 301eventq_index=0 302issueLat=24 303opClass=FloatSqrt 304opLat=24 305 306[system.cpu.fuPool.FUList4] 307type=FUDesc 308children=opList 309count=0 310eventq_index=0 311opList=system.cpu.fuPool.FUList4.opList 312 313[system.cpu.fuPool.FUList4.opList] 314type=OpDesc 315eventq_index=0 316issueLat=1 317opClass=MemRead 318opLat=1 319 320[system.cpu.fuPool.FUList5] 321type=FUDesc 322children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 323count=4 324eventq_index=0 325opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19 326 327[system.cpu.fuPool.FUList5.opList00] 328type=OpDesc 329eventq_index=0 330issueLat=1 331opClass=SimdAdd 332opLat=1 333 334[system.cpu.fuPool.FUList5.opList01] 335type=OpDesc 336eventq_index=0 337issueLat=1 338opClass=SimdAddAcc 339opLat=1 340 341[system.cpu.fuPool.FUList5.opList02] 342type=OpDesc 343eventq_index=0 344issueLat=1 345opClass=SimdAlu 346opLat=1 347 348[system.cpu.fuPool.FUList5.opList03] 349type=OpDesc 350eventq_index=0 351issueLat=1 352opClass=SimdCmp 353opLat=1 354 355[system.cpu.fuPool.FUList5.opList04] 356type=OpDesc 357eventq_index=0 358issueLat=1 359opClass=SimdCvt 360opLat=1 361 362[system.cpu.fuPool.FUList5.opList05] 363type=OpDesc 364eventq_index=0 365issueLat=1 366opClass=SimdMisc 367opLat=1 368 369[system.cpu.fuPool.FUList5.opList06] 370type=OpDesc 371eventq_index=0 372issueLat=1 373opClass=SimdMult 374opLat=1 375 376[system.cpu.fuPool.FUList5.opList07] 377type=OpDesc 378eventq_index=0 379issueLat=1 380opClass=SimdMultAcc 381opLat=1 382 383[system.cpu.fuPool.FUList5.opList08] 384type=OpDesc 385eventq_index=0 386issueLat=1 387opClass=SimdShift 388opLat=1 389 390[system.cpu.fuPool.FUList5.opList09] 391type=OpDesc 392eventq_index=0 393issueLat=1 394opClass=SimdShiftAcc 395opLat=1 396 397[system.cpu.fuPool.FUList5.opList10] 398type=OpDesc 399eventq_index=0 400issueLat=1 401opClass=SimdSqrt 402opLat=1 403 404[system.cpu.fuPool.FUList5.opList11] 405type=OpDesc 406eventq_index=0 407issueLat=1 408opClass=SimdFloatAdd 409opLat=1 410 411[system.cpu.fuPool.FUList5.opList12] 412type=OpDesc 413eventq_index=0 414issueLat=1 415opClass=SimdFloatAlu 416opLat=1 417 418[system.cpu.fuPool.FUList5.opList13] 419type=OpDesc 420eventq_index=0 421issueLat=1 422opClass=SimdFloatCmp 423opLat=1 424 425[system.cpu.fuPool.FUList5.opList14] 426type=OpDesc 427eventq_index=0 428issueLat=1 429opClass=SimdFloatCvt 430opLat=1 431 432[system.cpu.fuPool.FUList5.opList15] 433type=OpDesc 434eventq_index=0 435issueLat=1 436opClass=SimdFloatDiv 437opLat=1 438 439[system.cpu.fuPool.FUList5.opList16] 440type=OpDesc 441eventq_index=0 442issueLat=1 443opClass=SimdFloatMisc 444opLat=1 445 446[system.cpu.fuPool.FUList5.opList17] 447type=OpDesc 448eventq_index=0 449issueLat=1 450opClass=SimdFloatMult 451opLat=1 452 453[system.cpu.fuPool.FUList5.opList18] 454type=OpDesc 455eventq_index=0 456issueLat=1 457opClass=SimdFloatMultAcc 458opLat=1 459 460[system.cpu.fuPool.FUList5.opList19] 461type=OpDesc 462eventq_index=0 463issueLat=1 464opClass=SimdFloatSqrt 465opLat=1 466 467[system.cpu.fuPool.FUList6] 468type=FUDesc 469children=opList 470count=0 471eventq_index=0 472opList=system.cpu.fuPool.FUList6.opList 473 474[system.cpu.fuPool.FUList6.opList] 475type=OpDesc 476eventq_index=0 477issueLat=1 478opClass=MemWrite 479opLat=1 480 481[system.cpu.fuPool.FUList7] 482type=FUDesc 483children=opList0 opList1 484count=4 485eventq_index=0 486opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1 487 488[system.cpu.fuPool.FUList7.opList0] 489type=OpDesc 490eventq_index=0 491issueLat=1 492opClass=MemRead 493opLat=1 494 495[system.cpu.fuPool.FUList7.opList1] 496type=OpDesc 497eventq_index=0 498issueLat=1 499opClass=MemWrite 500opLat=1 501 502[system.cpu.fuPool.FUList8] 503type=FUDesc 504children=opList 505count=1 506eventq_index=0 507opList=system.cpu.fuPool.FUList8.opList 508 509[system.cpu.fuPool.FUList8.opList] 510type=OpDesc 511eventq_index=0 512issueLat=3 513opClass=IprAccess 514opLat=3 515 516[system.cpu.icache] 517type=BaseCache 518children=tags 519addr_ranges=0:18446744073709551615 520assoc=1 521clk_domain=system.cpu_clk_domain 522demand_mshr_reserve=1 523eventq_index=0 524forward_snoops=true 525hit_latency=2 526is_top_level=true 527max_miss_count=0 528mshrs=4 529prefetch_on_access=false 530prefetcher=Null 531response_latency=2 532sequential_access=false 533size=32768 534system=system 535tags=system.cpu.icache.tags 536tgts_per_mshr=20 537two_queue=false 538write_buffers=8 539cpu_side=system.cpu.icache_port 540mem_side=system.cpu.toL2Bus.slave[0] 541 542[system.cpu.icache.tags] 543type=LRU 544assoc=1 545block_size=64 546clk_domain=system.cpu_clk_domain 547eventq_index=0 548hit_latency=2 549sequential_access=false 550size=32768 551 552[system.cpu.interrupts] 553type=AlphaInterrupts 554eventq_index=0 555 556[system.cpu.isa] 557type=AlphaISA 558eventq_index=0 559system=system 560 561[system.cpu.itb] 562type=AlphaTLB 563eventq_index=0 564size=48 565 566[system.cpu.l2cache] 567type=BaseCache 568children=tags 569addr_ranges=0:18446744073709551615 570assoc=8 571clk_domain=system.cpu_clk_domain 572demand_mshr_reserve=1 573eventq_index=0 574forward_snoops=true 575hit_latency=20 576is_top_level=false 577max_miss_count=0 578mshrs=20 579prefetch_on_access=false 580prefetcher=Null 581response_latency=20 582sequential_access=false 583size=4194304 584system=system 585tags=system.cpu.l2cache.tags 586tgts_per_mshr=12 587two_queue=false 588write_buffers=8 589cpu_side=system.cpu.toL2Bus.master[0] 590mem_side=system.membus.slave[1] 591 592[system.cpu.l2cache.tags] 593type=LRU 594assoc=8 595block_size=64 596clk_domain=system.cpu_clk_domain 597eventq_index=0 598hit_latency=20 599sequential_access=false 600size=4194304 601 602[system.cpu.toL2Bus] 603type=CoherentXBar 604clk_domain=system.cpu_clk_domain 605eventq_index=0 606forward_latency=0 607frontend_latency=1 608response_latency=1 609snoop_filter=Null 610snoop_response_latency=1 611system=system 612use_default_range=false 613width=32 614master=system.cpu.l2cache.cpu_side 615slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side 616 617[system.cpu.tracer] 618type=ExeTracer 619eventq_index=0 620 621[system.cpu_clk_domain] 622type=SrcClockDomain 623clock=500 624domain_id=-1 625eventq_index=0 626init_perf_level=0 627voltage_domain=system.voltage_domain 628 629[system.disk0] 630type=IdeDisk 631children=image 632delay=1000000 633driveID=master 634eventq_index=0 635image=system.disk0.image 636 637[system.disk0.image] 638type=CowDiskImage 639children=child 640child=system.disk0.image.child 641eventq_index=0 642image_file= 643read_only=false 644table_size=65536 645 646[system.disk0.image.child] 647type=RawDiskImage 648eventq_index=0 649image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-latest.img 650read_only=true 651 652[system.disk2] 653type=IdeDisk 654children=image 655delay=1000000 656driveID=master 657eventq_index=0 658image=system.disk2.image 659 660[system.disk2.image] 661type=CowDiskImage 662children=child 663child=system.disk2.image.child 664eventq_index=0 665image_file= 666read_only=false 667table_size=65536 668 669[system.disk2.image.child] 670type=RawDiskImage 671eventq_index=0 672image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-bigswap2.img 673read_only=true 674 675[system.dvfs_handler] 676type=DVFSHandler 677domains= 678enable=false 679eventq_index=0 680sys_clk_domain=system.clk_domain 681transition_latency=100000000 682 683[system.intrctrl] 684type=IntrControl 685eventq_index=0 686sys=system 687 688[system.iobus] 689type=NoncoherentXBar 690clk_domain=system.clk_domain 691eventq_index=0 692forward_latency=1 693frontend_latency=2 694response_latency=2 695use_default_range=true 696width=16 697default=system.tsunami.pciconfig.pio 698master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side 699slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma 700 701[system.iocache] 702type=BaseCache 703children=tags 704addr_ranges=0:134217727 705assoc=8 706clk_domain=system.clk_domain 707demand_mshr_reserve=1 708eventq_index=0 709forward_snoops=false 710hit_latency=50 711is_top_level=true 712max_miss_count=0 713mshrs=20 714prefetch_on_access=false 715prefetcher=Null 716response_latency=50 717sequential_access=false 718size=1024 719system=system 720tags=system.iocache.tags 721tgts_per_mshr=12 722two_queue=false 723write_buffers=8 724cpu_side=system.iobus.master[29] 725mem_side=system.membus.slave[2] 726 727[system.iocache.tags] 728type=LRU 729assoc=8 730block_size=64 731clk_domain=system.clk_domain 732eventq_index=0 733hit_latency=50 734sequential_access=false 735size=1024 736 737[system.membus] 738type=CoherentXBar 739children=badaddr_responder 740clk_domain=system.clk_domain 741eventq_index=0 742forward_latency=4 743frontend_latency=3 744response_latency=2 745snoop_filter=Null 746snoop_response_latency=4 747system=system 748use_default_range=false 749width=16 750default=system.membus.badaddr_responder.pio 751master=system.bridge.slave system.physmem.port 752slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side 753 754[system.membus.badaddr_responder] 755type=IsaFake 756clk_domain=system.clk_domain 757eventq_index=0 758fake_mem=false 759pio_addr=0 760pio_latency=100000 761pio_size=8 762ret_bad_addr=true 763ret_data16=65535 764ret_data32=4294967295 765ret_data64=18446744073709551615 766ret_data8=255 767system=system 768update_data=false 769warn_access= 770pio=system.membus.default 771 772[system.physmem] 773type=DRAMCtrl 774IDD0=0.075000 775IDD02=0.000000 776IDD2N=0.050000 777IDD2N2=0.000000 778IDD2P0=0.000000 779IDD2P02=0.000000 780IDD2P1=0.000000 781IDD2P12=0.000000 782IDD3N=0.057000 783IDD3N2=0.000000 784IDD3P0=0.000000 785IDD3P02=0.000000 786IDD3P1=0.000000 787IDD3P12=0.000000 788IDD4R=0.187000 789IDD4R2=0.000000 790IDD4W=0.165000 791IDD4W2=0.000000 792IDD5=0.220000 793IDD52=0.000000 794IDD6=0.000000 795IDD62=0.000000 796VDD=1.500000 797VDD2=0.000000 798activation_limit=4 799addr_mapping=RoRaBaCoCh 800bank_groups_per_rank=0 801banks_per_rank=8 802burst_length=8 803channels=1 804clk_domain=system.clk_domain 805conf_table_reported=true 806device_bus_width=8 807device_rowbuffer_size=1024 808device_size=536870912 809devices_per_rank=8 810dll=true 811eventq_index=0 812in_addr_map=true 813max_accesses_per_row=16 814mem_sched_policy=frfcfs 815min_writes_per_switch=16 816null=false 817page_policy=open_adaptive 818range=0:134217727 819ranks_per_channel=2 820read_buffer_size=32 821static_backend_latency=10000 822static_frontend_latency=10000 823tBURST=5000 824tCCD_L=0 825tCK=1250 826tCL=13750 827tCS=2500 828tRAS=35000 829tRCD=13750 830tREFI=7800000 831tRFC=260000 832tRP=13750 833tRRD=6000 834tRRD_L=0 835tRTP=7500 836tRTW=2500 837tWR=15000 838tWTR=7500 839tXAW=30000 840tXP=0 841tXPDLL=0 842tXS=0 843tXSDLL=0 844write_buffer_size=64 845write_high_thresh_perc=85 846write_low_thresh_perc=50 847port=system.membus.master[1] 848 849[system.simple_disk] 850type=SimpleDisk 851children=disk 852disk=system.simple_disk.disk 853eventq_index=0 854system=system 855 856[system.simple_disk.disk] 857type=RawDiskImage 858eventq_index=0 859image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-latest.img 860read_only=true 861 862[system.terminal] 863type=Terminal 864eventq_index=0 865intr_control=system.intrctrl 866number=0 867output=true 868port=3456 869 870[system.tsunami] 871type=Tsunami 872children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart 873eventq_index=0 874intrctrl=system.intrctrl 875system=system 876 877[system.tsunami.backdoor] 878type=AlphaBackdoor 879clk_domain=system.clk_domain 880cpu=system.cpu 881disk=system.simple_disk 882eventq_index=0 883pio_addr=8804682956800 884pio_latency=100000 885platform=system.tsunami 886system=system 887terminal=system.terminal 888pio=system.iobus.master[24] 889 890[system.tsunami.cchip] 891type=TsunamiCChip 892clk_domain=system.clk_domain 893eventq_index=0 894pio_addr=8803072344064 895pio_latency=100000 896system=system 897tsunami=system.tsunami 898pio=system.iobus.master[0] 899 900[system.tsunami.ethernet] 901type=NSGigE 902BAR0=1 903BAR0LegacyIO=false 904BAR0Size=256 905BAR1=0 906BAR1LegacyIO=false 907BAR1Size=4096 908BAR2=0 909BAR2LegacyIO=false 910BAR2Size=0 911BAR3=0 912BAR3LegacyIO=false 913BAR3Size=0 914BAR4=0 915BAR4LegacyIO=false 916BAR4Size=0 917BAR5=0 918BAR5LegacyIO=false 919BAR5Size=0 920BIST=0 921CacheLineSize=0 922CapabilityPtr=0 923CardbusCIS=0 924ClassCode=2 925Command=0 926DeviceID=34 927ExpansionROM=0 928HeaderType=0 929InterruptLine=30 930InterruptPin=1 931LatencyTimer=0 932LegacyIOBase=0 933MSICAPBaseOffset=0 934MSICAPCapId=0 935MSICAPMaskBits=0 936MSICAPMsgAddr=0 937MSICAPMsgCtrl=0 938MSICAPMsgData=0 939MSICAPMsgUpperAddr=0 940MSICAPNextCapability=0 941MSICAPPendingBits=0 942MSIXCAPBaseOffset=0 943MSIXCAPCapId=0 944MSIXCAPNextCapability=0 945MSIXMsgCtrl=0 946MSIXPbaOffset=0 947MSIXTableOffset=0 948MaximumLatency=52 949MinimumGrant=176 950PMCAPBaseOffset=0 951PMCAPCapId=0 952PMCAPCapabilities=0 953PMCAPCtrlStatus=0 954PMCAPNextCapability=0 955PXCAPBaseOffset=0 956PXCAPCapId=0 957PXCAPCapabilities=0 958PXCAPDevCap2=0 959PXCAPDevCapabilities=0 960PXCAPDevCtrl=0 961PXCAPDevCtrl2=0 962PXCAPDevStatus=0 963PXCAPLinkCap=0 964PXCAPLinkCtrl=0 965PXCAPLinkStatus=0 966PXCAPNextCapability=0 967ProgIF=0 968Revision=0 969Status=656 970SubClassCode=0 971SubsystemID=0 972SubsystemVendorID=0 973VendorID=4107 974clk_domain=system.clk_domain 975config_latency=20000 976dma_data_free=false 977dma_desc_free=false 978dma_no_allocate=true 979dma_read_delay=0 980dma_read_factor=0 981dma_write_delay=0 982dma_write_factor=0 983eventq_index=0 984hardware_address=00:90:00:00:00:01 985intr_delay=10000000 986pci_bus=0 987pci_dev=1 988pci_func=0 989pio_latency=30000 990platform=system.tsunami 991rss=false 992rx_delay=1000000 993rx_fifo_size=524288 994rx_filter=true 995rx_thread=false 996system=system 997tx_delay=1000000 998tx_fifo_size=524288 999tx_thread=false 1000config=system.iobus.master[28] 1001dma=system.iobus.slave[2] 1002pio=system.iobus.master[27] 1003 1004[system.tsunami.fake_OROM] 1005type=IsaFake 1006clk_domain=system.clk_domain 1007eventq_index=0 1008fake_mem=false 1009pio_addr=8796093677568 1010pio_latency=100000 1011pio_size=393216 1012ret_bad_addr=false 1013ret_data16=65535 1014ret_data32=4294967295 1015ret_data64=18446744073709551615 1016ret_data8=255 1017system=system 1018update_data=false 1019warn_access= 1020pio=system.iobus.master[8] 1021 1022[system.tsunami.fake_ata0] 1023type=IsaFake 1024clk_domain=system.clk_domain 1025eventq_index=0 1026fake_mem=false 1027pio_addr=8804615848432 1028pio_latency=100000 1029pio_size=8 1030ret_bad_addr=false 1031ret_data16=65535 1032ret_data32=4294967295 1033ret_data64=18446744073709551615 1034ret_data8=255 1035system=system 1036update_data=false 1037warn_access= 1038pio=system.iobus.master[19] 1039 1040[system.tsunami.fake_ata1] 1041type=IsaFake 1042clk_domain=system.clk_domain 1043eventq_index=0 1044fake_mem=false 1045pio_addr=8804615848304 1046pio_latency=100000 1047pio_size=8 1048ret_bad_addr=false 1049ret_data16=65535 1050ret_data32=4294967295 1051ret_data64=18446744073709551615 1052ret_data8=255 1053system=system 1054update_data=false 1055warn_access= 1056pio=system.iobus.master[20] 1057 1058[system.tsunami.fake_pnp_addr] 1059type=IsaFake 1060clk_domain=system.clk_domain 1061eventq_index=0 1062fake_mem=false 1063pio_addr=8804615848569 1064pio_latency=100000 1065pio_size=8 1066ret_bad_addr=false 1067ret_data16=65535 1068ret_data32=4294967295 1069ret_data64=18446744073709551615 1070ret_data8=255 1071system=system 1072update_data=false 1073warn_access= 1074pio=system.iobus.master[9] 1075 1076[system.tsunami.fake_pnp_read0] 1077type=IsaFake 1078clk_domain=system.clk_domain 1079eventq_index=0 1080fake_mem=false 1081pio_addr=8804615848451 1082pio_latency=100000 1083pio_size=8 1084ret_bad_addr=false 1085ret_data16=65535 1086ret_data32=4294967295 1087ret_data64=18446744073709551615 1088ret_data8=255 1089system=system 1090update_data=false 1091warn_access= 1092pio=system.iobus.master[11] 1093 1094[system.tsunami.fake_pnp_read1] 1095type=IsaFake 1096clk_domain=system.clk_domain 1097eventq_index=0 1098fake_mem=false 1099pio_addr=8804615848515 1100pio_latency=100000 1101pio_size=8 1102ret_bad_addr=false 1103ret_data16=65535 1104ret_data32=4294967295 1105ret_data64=18446744073709551615 1106ret_data8=255 1107system=system 1108update_data=false 1109warn_access= 1110pio=system.iobus.master[12] 1111 1112[system.tsunami.fake_pnp_read2] 1113type=IsaFake 1114clk_domain=system.clk_domain 1115eventq_index=0 1116fake_mem=false 1117pio_addr=8804615848579 1118pio_latency=100000 1119pio_size=8 1120ret_bad_addr=false 1121ret_data16=65535 1122ret_data32=4294967295 1123ret_data64=18446744073709551615 1124ret_data8=255 1125system=system 1126update_data=false 1127warn_access= 1128pio=system.iobus.master[13] 1129 1130[system.tsunami.fake_pnp_read3] 1131type=IsaFake 1132clk_domain=system.clk_domain 1133eventq_index=0 1134fake_mem=false 1135pio_addr=8804615848643 1136pio_latency=100000 1137pio_size=8 1138ret_bad_addr=false 1139ret_data16=65535 1140ret_data32=4294967295 1141ret_data64=18446744073709551615 1142ret_data8=255 1143system=system 1144update_data=false 1145warn_access= 1146pio=system.iobus.master[14] 1147 1148[system.tsunami.fake_pnp_read4] 1149type=IsaFake 1150clk_domain=system.clk_domain 1151eventq_index=0 1152fake_mem=false 1153pio_addr=8804615848707 1154pio_latency=100000 1155pio_size=8 1156ret_bad_addr=false 1157ret_data16=65535 1158ret_data32=4294967295 1159ret_data64=18446744073709551615 1160ret_data8=255 1161system=system 1162update_data=false 1163warn_access= 1164pio=system.iobus.master[15] 1165 1166[system.tsunami.fake_pnp_read5] 1167type=IsaFake 1168clk_domain=system.clk_domain 1169eventq_index=0 1170fake_mem=false 1171pio_addr=8804615848771 1172pio_latency=100000 1173pio_size=8 1174ret_bad_addr=false 1175ret_data16=65535 1176ret_data32=4294967295 1177ret_data64=18446744073709551615 1178ret_data8=255 1179system=system 1180update_data=false 1181warn_access= 1182pio=system.iobus.master[16] 1183 1184[system.tsunami.fake_pnp_read6] 1185type=IsaFake 1186clk_domain=system.clk_domain 1187eventq_index=0 1188fake_mem=false 1189pio_addr=8804615848835 1190pio_latency=100000 1191pio_size=8 1192ret_bad_addr=false 1193ret_data16=65535 1194ret_data32=4294967295 1195ret_data64=18446744073709551615 1196ret_data8=255 1197system=system 1198update_data=false 1199warn_access= 1200pio=system.iobus.master[17] 1201 1202[system.tsunami.fake_pnp_read7] 1203type=IsaFake 1204clk_domain=system.clk_domain 1205eventq_index=0 1206fake_mem=false 1207pio_addr=8804615848899 1208pio_latency=100000 1209pio_size=8 1210ret_bad_addr=false 1211ret_data16=65535 1212ret_data32=4294967295 1213ret_data64=18446744073709551615 1214ret_data8=255 1215system=system 1216update_data=false 1217warn_access= 1218pio=system.iobus.master[18] 1219 1220[system.tsunami.fake_pnp_write] 1221type=IsaFake 1222clk_domain=system.clk_domain 1223eventq_index=0 1224fake_mem=false 1225pio_addr=8804615850617 1226pio_latency=100000 1227pio_size=8 1228ret_bad_addr=false 1229ret_data16=65535 1230ret_data32=4294967295 1231ret_data64=18446744073709551615 1232ret_data8=255 1233system=system 1234update_data=false 1235warn_access= 1236pio=system.iobus.master[10] 1237 1238[system.tsunami.fake_ppc] 1239type=IsaFake 1240clk_domain=system.clk_domain 1241eventq_index=0 1242fake_mem=false 1243pio_addr=8804615848891 1244pio_latency=100000 1245pio_size=8 1246ret_bad_addr=false 1247ret_data16=65535 1248ret_data32=4294967295 1249ret_data64=18446744073709551615 1250ret_data8=255 1251system=system 1252update_data=false 1253warn_access= 1254pio=system.iobus.master[7] 1255 1256[system.tsunami.fake_sm_chip] 1257type=IsaFake 1258clk_domain=system.clk_domain 1259eventq_index=0 1260fake_mem=false 1261pio_addr=8804615848816 1262pio_latency=100000 1263pio_size=8 1264ret_bad_addr=false 1265ret_data16=65535 1266ret_data32=4294967295 1267ret_data64=18446744073709551615 1268ret_data8=255 1269system=system 1270update_data=false 1271warn_access= 1272pio=system.iobus.master[2] 1273 1274[system.tsunami.fake_uart1] 1275type=IsaFake 1276clk_domain=system.clk_domain 1277eventq_index=0 1278fake_mem=false 1279pio_addr=8804615848696 1280pio_latency=100000 1281pio_size=8 1282ret_bad_addr=false 1283ret_data16=65535 1284ret_data32=4294967295 1285ret_data64=18446744073709551615 1286ret_data8=255 1287system=system 1288update_data=false 1289warn_access= 1290pio=system.iobus.master[3] 1291 1292[system.tsunami.fake_uart2] 1293type=IsaFake 1294clk_domain=system.clk_domain 1295eventq_index=0 1296fake_mem=false 1297pio_addr=8804615848936 1298pio_latency=100000 1299pio_size=8 1300ret_bad_addr=false 1301ret_data16=65535 1302ret_data32=4294967295 1303ret_data64=18446744073709551615 1304ret_data8=255 1305system=system 1306update_data=false 1307warn_access= 1308pio=system.iobus.master[4] 1309 1310[system.tsunami.fake_uart3] 1311type=IsaFake 1312clk_domain=system.clk_domain 1313eventq_index=0 1314fake_mem=false 1315pio_addr=8804615848680 1316pio_latency=100000 1317pio_size=8 1318ret_bad_addr=false 1319ret_data16=65535 1320ret_data32=4294967295 1321ret_data64=18446744073709551615 1322ret_data8=255 1323system=system 1324update_data=false 1325warn_access= 1326pio=system.iobus.master[5] 1327 1328[system.tsunami.fake_uart4] 1329type=IsaFake 1330clk_domain=system.clk_domain 1331eventq_index=0 1332fake_mem=false 1333pio_addr=8804615848944 1334pio_latency=100000 1335pio_size=8 1336ret_bad_addr=false 1337ret_data16=65535 1338ret_data32=4294967295 1339ret_data64=18446744073709551615 1340ret_data8=255 1341system=system 1342update_data=false 1343warn_access= 1344pio=system.iobus.master[6] 1345 1346[system.tsunami.fb] 1347type=BadDevice 1348clk_domain=system.clk_domain 1349devicename=FrameBuffer 1350eventq_index=0 1351pio_addr=8804615848912 1352pio_latency=100000 1353system=system 1354pio=system.iobus.master[21] 1355 1356[system.tsunami.ide] 1357type=IdeController 1358BAR0=1 1359BAR0LegacyIO=false 1360BAR0Size=8 1361BAR1=1 1362BAR1LegacyIO=false 1363BAR1Size=4 1364BAR2=1 1365BAR2LegacyIO=false 1366BAR2Size=8 1367BAR3=1 1368BAR3LegacyIO=false 1369BAR3Size=4 1370BAR4=1 1371BAR4LegacyIO=false 1372BAR4Size=16 1373BAR5=1 1374BAR5LegacyIO=false 1375BAR5Size=0 1376BIST=0 1377CacheLineSize=0 1378CapabilityPtr=0 1379CardbusCIS=0 1380ClassCode=1 1381Command=0 1382DeviceID=28945 1383ExpansionROM=0 1384HeaderType=0 1385InterruptLine=31 1386InterruptPin=1 1387LatencyTimer=0 1388LegacyIOBase=0 1389MSICAPBaseOffset=0 1390MSICAPCapId=0 1391MSICAPMaskBits=0 1392MSICAPMsgAddr=0 1393MSICAPMsgCtrl=0 1394MSICAPMsgData=0 1395MSICAPMsgUpperAddr=0 1396MSICAPNextCapability=0 1397MSICAPPendingBits=0 1398MSIXCAPBaseOffset=0 1399MSIXCAPCapId=0 1400MSIXCAPNextCapability=0 1401MSIXMsgCtrl=0 1402MSIXPbaOffset=0 1403MSIXTableOffset=0 1404MaximumLatency=0 1405MinimumGrant=0 1406PMCAPBaseOffset=0 1407PMCAPCapId=0 1408PMCAPCapabilities=0 1409PMCAPCtrlStatus=0 1410PMCAPNextCapability=0 1411PXCAPBaseOffset=0 1412PXCAPCapId=0 1413PXCAPCapabilities=0 1414PXCAPDevCap2=0 1415PXCAPDevCapabilities=0 1416PXCAPDevCtrl=0 1417PXCAPDevCtrl2=0 1418PXCAPDevStatus=0 1419PXCAPLinkCap=0 1420PXCAPLinkCtrl=0 1421PXCAPLinkStatus=0 1422PXCAPNextCapability=0 1423ProgIF=133 1424Revision=0 1425Status=640 1426SubClassCode=1 1427SubsystemID=0 1428SubsystemVendorID=0 1429VendorID=32902 1430clk_domain=system.clk_domain 1431config_latency=20000 1432ctrl_offset=0 1433disks=system.disk0 system.disk2 1434eventq_index=0 1435io_shift=0 1436pci_bus=0 1437pci_dev=0 1438pci_func=0 1439pio_latency=30000 1440platform=system.tsunami 1441system=system 1442config=system.iobus.master[26] 1443dma=system.iobus.slave[1] 1444pio=system.iobus.master[25] 1445 1446[system.tsunami.io] 1447type=TsunamiIO 1448clk_domain=system.clk_domain 1449eventq_index=0 1450frequency=976562500 1451pio_addr=8804615847936 1452pio_latency=100000 1453system=system 1454time=Thu Jan 1 00:00:00 2009 1455tsunami=system.tsunami 1456year_is_bcd=false 1457pio=system.iobus.master[22] 1458 1459[system.tsunami.pchip] 1460type=TsunamiPChip 1461clk_domain=system.clk_domain 1462eventq_index=0 1463pio_addr=8802535473152 1464pio_latency=100000 1465system=system 1466tsunami=system.tsunami 1467pio=system.iobus.master[1] 1468 1469[system.tsunami.pciconfig] 1470type=PciConfigAll 1471bus=0 1472clk_domain=system.clk_domain 1473eventq_index=0 1474pio_addr=0 1475pio_latency=30000 1476platform=system.tsunami 1477size=16777216 1478system=system 1479pio=system.iobus.default 1480 1481[system.tsunami.uart] 1482type=Uart8250 1483clk_domain=system.clk_domain 1484eventq_index=0 1485pio_addr=8804615848952 1486pio_latency=100000 1487platform=system.tsunami 1488system=system 1489terminal=system.terminal 1490pio=system.iobus.master[23] 1491 1492[system.voltage_domain] 1493type=VoltageDomain 1494eventq_index=0 1495voltage=1.000000 1496 1497