config.ini revision 10242
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxAlphaSystem 13children=bridge clk_domain cpu cpu_clk_domain disk0 disk2 intrctrl iobus iocache membus physmem simple_disk terminal tsunami voltage_domain 14boot_cpu_frequency=500 15boot_osflags=root=/dev/hda1 console=ttyS0 16cache_line_size=64 17clk_domain=system.clk_domain 18console=/home/stever/m5/m5_system_2.0b3/binaries/console 19eventq_index=0 20init_param=0 21kernel=/home/stever/m5/m5_system_2.0b3/binaries/vmlinux 22load_addr_mask=1099511627775 23load_offset=0 24mem_mode=timing 25mem_ranges=0:134217727 26memories=system.physmem 27num_work_ids=16 28pal=/home/stever/m5/m5_system_2.0b3/binaries/ts_osfpal 29readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh 30symbolfile= 31system_rev=1024 32system_type=34 33work_begin_ckpt_count=0 34work_begin_cpu_id_exit=-1 35work_begin_exit_count=0 36work_cpus_ckpt_count=0 37work_end_ckpt_count=0 38work_end_exit_count=0 39work_item_id=-1 40system_port=system.membus.slave[0] 41 42[system.bridge] 43type=Bridge 44clk_domain=system.clk_domain 45delay=50000 46eventq_index=0 47ranges=8796093022208:18446744073709551615 48req_size=16 49resp_size=16 50master=system.iobus.slave[0] 51slave=system.membus.master[0] 52 53[system.clk_domain] 54type=SrcClockDomain 55clock=1000 56eventq_index=0 57voltage_domain=system.voltage_domain 58 59[system.cpu] 60type=DerivO3CPU 61children=branchPred dcache dtb fuPool icache interrupts isa itb l2cache toL2Bus tracer 62LFSTSize=1024 63LQEntries=32 64LSQCheckLoads=true 65LSQDepCheckShift=4 66SQEntries=32 67SSITSize=1024 68activity=0 69backComSize=5 70branchPred=system.cpu.branchPred 71cachePorts=200 72checker=Null 73clk_domain=system.cpu_clk_domain 74commitToDecodeDelay=1 75commitToFetchDelay=1 76commitToIEWDelay=1 77commitToRenameDelay=1 78commitWidth=8 79cpu_id=0 80decodeToFetchDelay=1 81decodeToRenameDelay=1 82decodeWidth=8 83dispatchWidth=8 84do_checkpoint_insts=true 85do_quiesce=true 86do_statistics_insts=true 87dtb=system.cpu.dtb 88eventq_index=0 89fetchBufferSize=64 90fetchToDecodeDelay=1 91fetchTrapLatency=1 92fetchWidth=8 93forwardComSize=5 94fuPool=system.cpu.fuPool 95function_trace=false 96function_trace_start=0 97iewToCommitDelay=1 98iewToDecodeDelay=1 99iewToFetchDelay=1 100iewToRenameDelay=1 101interrupts=system.cpu.interrupts 102isa=system.cpu.isa 103issueToExecuteDelay=1 104issueWidth=8 105itb=system.cpu.itb 106max_insts_all_threads=0 107max_insts_any_thread=0 108max_loads_all_threads=0 109max_loads_any_thread=0 110needsTSO=false 111numIQEntries=64 112numPhysCCRegs=0 113numPhysFloatRegs=256 114numPhysIntRegs=256 115numROBEntries=192 116numRobs=1 117numThreads=1 118profile=0 119progress_interval=0 120renameToDecodeDelay=1 121renameToFetchDelay=1 122renameToIEWDelay=2 123renameToROBDelay=1 124renameWidth=8 125simpoint_start_insts= 126smtCommitPolicy=RoundRobin 127smtFetchPolicy=SingleThread 128smtIQPolicy=Partitioned 129smtIQThreshold=100 130smtLSQPolicy=Partitioned 131smtLSQThreshold=100 132smtNumFetchingThreads=1 133smtROBPolicy=Partitioned 134smtROBThreshold=100 135socket_id=0 136squashWidth=8 137store_set_clear_period=250000 138switched_out=false 139system=system 140tracer=system.cpu.tracer 141trapLatency=13 142wbDepth=1 143wbWidth=8 144workload= 145dcache_port=system.cpu.dcache.cpu_side 146icache_port=system.cpu.icache.cpu_side 147 148[system.cpu.branchPred] 149type=BranchPredictor 150BTBEntries=4096 151BTBTagSize=16 152RASSize=16 153choiceCtrBits=2 154choicePredictorSize=8192 155eventq_index=0 156globalCtrBits=2 157globalPredictorSize=8192 158instShiftAmt=2 159localCtrBits=2 160localHistoryTableSize=2048 161localPredictorSize=2048 162numThreads=1 163predType=tournament 164 165[system.cpu.dcache] 166type=BaseCache 167children=tags 168addr_ranges=0:18446744073709551615 169assoc=4 170clk_domain=system.cpu_clk_domain 171eventq_index=0 172forward_snoops=true 173hit_latency=2 174is_top_level=true 175max_miss_count=0 176mshrs=4 177prefetch_on_access=false 178prefetcher=Null 179response_latency=2 180sequential_access=false 181size=32768 182system=system 183tags=system.cpu.dcache.tags 184tgts_per_mshr=20 185two_queue=false 186write_buffers=8 187cpu_side=system.cpu.dcache_port 188mem_side=system.cpu.toL2Bus.slave[1] 189 190[system.cpu.dcache.tags] 191type=LRU 192assoc=4 193block_size=64 194clk_domain=system.cpu_clk_domain 195eventq_index=0 196hit_latency=2 197sequential_access=false 198size=32768 199 200[system.cpu.dtb] 201type=AlphaTLB 202eventq_index=0 203size=64 204 205[system.cpu.fuPool] 206type=FUPool 207children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 208FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8 209eventq_index=0 210 211[system.cpu.fuPool.FUList0] 212type=FUDesc 213children=opList 214count=6 215eventq_index=0 216opList=system.cpu.fuPool.FUList0.opList 217 218[system.cpu.fuPool.FUList0.opList] 219type=OpDesc 220eventq_index=0 221issueLat=1 222opClass=IntAlu 223opLat=1 224 225[system.cpu.fuPool.FUList1] 226type=FUDesc 227children=opList0 opList1 228count=2 229eventq_index=0 230opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 231 232[system.cpu.fuPool.FUList1.opList0] 233type=OpDesc 234eventq_index=0 235issueLat=1 236opClass=IntMult 237opLat=3 238 239[system.cpu.fuPool.FUList1.opList1] 240type=OpDesc 241eventq_index=0 242issueLat=19 243opClass=IntDiv 244opLat=20 245 246[system.cpu.fuPool.FUList2] 247type=FUDesc 248children=opList0 opList1 opList2 249count=4 250eventq_index=0 251opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2 252 253[system.cpu.fuPool.FUList2.opList0] 254type=OpDesc 255eventq_index=0 256issueLat=1 257opClass=FloatAdd 258opLat=2 259 260[system.cpu.fuPool.FUList2.opList1] 261type=OpDesc 262eventq_index=0 263issueLat=1 264opClass=FloatCmp 265opLat=2 266 267[system.cpu.fuPool.FUList2.opList2] 268type=OpDesc 269eventq_index=0 270issueLat=1 271opClass=FloatCvt 272opLat=2 273 274[system.cpu.fuPool.FUList3] 275type=FUDesc 276children=opList0 opList1 opList2 277count=2 278eventq_index=0 279opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 280 281[system.cpu.fuPool.FUList3.opList0] 282type=OpDesc 283eventq_index=0 284issueLat=1 285opClass=FloatMult 286opLat=4 287 288[system.cpu.fuPool.FUList3.opList1] 289type=OpDesc 290eventq_index=0 291issueLat=12 292opClass=FloatDiv 293opLat=12 294 295[system.cpu.fuPool.FUList3.opList2] 296type=OpDesc 297eventq_index=0 298issueLat=24 299opClass=FloatSqrt 300opLat=24 301 302[system.cpu.fuPool.FUList4] 303type=FUDesc 304children=opList 305count=0 306eventq_index=0 307opList=system.cpu.fuPool.FUList4.opList 308 309[system.cpu.fuPool.FUList4.opList] 310type=OpDesc 311eventq_index=0 312issueLat=1 313opClass=MemRead 314opLat=1 315 316[system.cpu.fuPool.FUList5] 317type=FUDesc 318children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 319count=4 320eventq_index=0 321opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19 322 323[system.cpu.fuPool.FUList5.opList00] 324type=OpDesc 325eventq_index=0 326issueLat=1 327opClass=SimdAdd 328opLat=1 329 330[system.cpu.fuPool.FUList5.opList01] 331type=OpDesc 332eventq_index=0 333issueLat=1 334opClass=SimdAddAcc 335opLat=1 336 337[system.cpu.fuPool.FUList5.opList02] 338type=OpDesc 339eventq_index=0 340issueLat=1 341opClass=SimdAlu 342opLat=1 343 344[system.cpu.fuPool.FUList5.opList03] 345type=OpDesc 346eventq_index=0 347issueLat=1 348opClass=SimdCmp 349opLat=1 350 351[system.cpu.fuPool.FUList5.opList04] 352type=OpDesc 353eventq_index=0 354issueLat=1 355opClass=SimdCvt 356opLat=1 357 358[system.cpu.fuPool.FUList5.opList05] 359type=OpDesc 360eventq_index=0 361issueLat=1 362opClass=SimdMisc 363opLat=1 364 365[system.cpu.fuPool.FUList5.opList06] 366type=OpDesc 367eventq_index=0 368issueLat=1 369opClass=SimdMult 370opLat=1 371 372[system.cpu.fuPool.FUList5.opList07] 373type=OpDesc 374eventq_index=0 375issueLat=1 376opClass=SimdMultAcc 377opLat=1 378 379[system.cpu.fuPool.FUList5.opList08] 380type=OpDesc 381eventq_index=0 382issueLat=1 383opClass=SimdShift 384opLat=1 385 386[system.cpu.fuPool.FUList5.opList09] 387type=OpDesc 388eventq_index=0 389issueLat=1 390opClass=SimdShiftAcc 391opLat=1 392 393[system.cpu.fuPool.FUList5.opList10] 394type=OpDesc 395eventq_index=0 396issueLat=1 397opClass=SimdSqrt 398opLat=1 399 400[system.cpu.fuPool.FUList5.opList11] 401type=OpDesc 402eventq_index=0 403issueLat=1 404opClass=SimdFloatAdd 405opLat=1 406 407[system.cpu.fuPool.FUList5.opList12] 408type=OpDesc 409eventq_index=0 410issueLat=1 411opClass=SimdFloatAlu 412opLat=1 413 414[system.cpu.fuPool.FUList5.opList13] 415type=OpDesc 416eventq_index=0 417issueLat=1 418opClass=SimdFloatCmp 419opLat=1 420 421[system.cpu.fuPool.FUList5.opList14] 422type=OpDesc 423eventq_index=0 424issueLat=1 425opClass=SimdFloatCvt 426opLat=1 427 428[system.cpu.fuPool.FUList5.opList15] 429type=OpDesc 430eventq_index=0 431issueLat=1 432opClass=SimdFloatDiv 433opLat=1 434 435[system.cpu.fuPool.FUList5.opList16] 436type=OpDesc 437eventq_index=0 438issueLat=1 439opClass=SimdFloatMisc 440opLat=1 441 442[system.cpu.fuPool.FUList5.opList17] 443type=OpDesc 444eventq_index=0 445issueLat=1 446opClass=SimdFloatMult 447opLat=1 448 449[system.cpu.fuPool.FUList5.opList18] 450type=OpDesc 451eventq_index=0 452issueLat=1 453opClass=SimdFloatMultAcc 454opLat=1 455 456[system.cpu.fuPool.FUList5.opList19] 457type=OpDesc 458eventq_index=0 459issueLat=1 460opClass=SimdFloatSqrt 461opLat=1 462 463[system.cpu.fuPool.FUList6] 464type=FUDesc 465children=opList 466count=0 467eventq_index=0 468opList=system.cpu.fuPool.FUList6.opList 469 470[system.cpu.fuPool.FUList6.opList] 471type=OpDesc 472eventq_index=0 473issueLat=1 474opClass=MemWrite 475opLat=1 476 477[system.cpu.fuPool.FUList7] 478type=FUDesc 479children=opList0 opList1 480count=4 481eventq_index=0 482opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1 483 484[system.cpu.fuPool.FUList7.opList0] 485type=OpDesc 486eventq_index=0 487issueLat=1 488opClass=MemRead 489opLat=1 490 491[system.cpu.fuPool.FUList7.opList1] 492type=OpDesc 493eventq_index=0 494issueLat=1 495opClass=MemWrite 496opLat=1 497 498[system.cpu.fuPool.FUList8] 499type=FUDesc 500children=opList 501count=1 502eventq_index=0 503opList=system.cpu.fuPool.FUList8.opList 504 505[system.cpu.fuPool.FUList8.opList] 506type=OpDesc 507eventq_index=0 508issueLat=3 509opClass=IprAccess 510opLat=3 511 512[system.cpu.icache] 513type=BaseCache 514children=tags 515addr_ranges=0:18446744073709551615 516assoc=1 517clk_domain=system.cpu_clk_domain 518eventq_index=0 519forward_snoops=true 520hit_latency=2 521is_top_level=true 522max_miss_count=0 523mshrs=4 524prefetch_on_access=false 525prefetcher=Null 526response_latency=2 527sequential_access=false 528size=32768 529system=system 530tags=system.cpu.icache.tags 531tgts_per_mshr=20 532two_queue=false 533write_buffers=8 534cpu_side=system.cpu.icache_port 535mem_side=system.cpu.toL2Bus.slave[0] 536 537[system.cpu.icache.tags] 538type=LRU 539assoc=1 540block_size=64 541clk_domain=system.cpu_clk_domain 542eventq_index=0 543hit_latency=2 544sequential_access=false 545size=32768 546 547[system.cpu.interrupts] 548type=AlphaInterrupts 549eventq_index=0 550 551[system.cpu.isa] 552type=AlphaISA 553eventq_index=0 554system=system 555 556[system.cpu.itb] 557type=AlphaTLB 558eventq_index=0 559size=48 560 561[system.cpu.l2cache] 562type=BaseCache 563children=tags 564addr_ranges=0:18446744073709551615 565assoc=8 566clk_domain=system.cpu_clk_domain 567eventq_index=0 568forward_snoops=true 569hit_latency=20 570is_top_level=false 571max_miss_count=0 572mshrs=20 573prefetch_on_access=false 574prefetcher=Null 575response_latency=20 576sequential_access=false 577size=4194304 578system=system 579tags=system.cpu.l2cache.tags 580tgts_per_mshr=12 581two_queue=false 582write_buffers=8 583cpu_side=system.cpu.toL2Bus.master[0] 584mem_side=system.membus.slave[1] 585 586[system.cpu.l2cache.tags] 587type=LRU 588assoc=8 589block_size=64 590clk_domain=system.cpu_clk_domain 591eventq_index=0 592hit_latency=20 593sequential_access=false 594size=4194304 595 596[system.cpu.toL2Bus] 597type=CoherentBus 598clk_domain=system.cpu_clk_domain 599eventq_index=0 600header_cycles=1 601system=system 602use_default_range=false 603width=32 604master=system.cpu.l2cache.cpu_side 605slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side 606 607[system.cpu.tracer] 608type=ExeTracer 609eventq_index=0 610 611[system.cpu_clk_domain] 612type=SrcClockDomain 613clock=500 614eventq_index=0 615voltage_domain=system.voltage_domain 616 617[system.disk0] 618type=IdeDisk 619children=image 620delay=1000000 621driveID=master 622eventq_index=0 623image=system.disk0.image 624 625[system.disk0.image] 626type=CowDiskImage 627children=child 628child=system.disk0.image.child 629eventq_index=0 630image_file= 631read_only=false 632table_size=65536 633 634[system.disk0.image.child] 635type=RawDiskImage 636eventq_index=0 637image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-latest.img 638read_only=true 639 640[system.disk2] 641type=IdeDisk 642children=image 643delay=1000000 644driveID=master 645eventq_index=0 646image=system.disk2.image 647 648[system.disk2.image] 649type=CowDiskImage 650children=child 651child=system.disk2.image.child 652eventq_index=0 653image_file= 654read_only=false 655table_size=65536 656 657[system.disk2.image.child] 658type=RawDiskImage 659eventq_index=0 660image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-bigswap2.img 661read_only=true 662 663[system.intrctrl] 664type=IntrControl 665eventq_index=0 666sys=system 667 668[system.iobus] 669type=NoncoherentBus 670clk_domain=system.clk_domain 671eventq_index=0 672header_cycles=1 673use_default_range=true 674width=8 675default=system.tsunami.pciconfig.pio 676master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side 677slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma 678 679[system.iocache] 680type=BaseCache 681children=tags 682addr_ranges=0:134217727 683assoc=8 684clk_domain=system.clk_domain 685eventq_index=0 686forward_snoops=false 687hit_latency=50 688is_top_level=true 689max_miss_count=0 690mshrs=20 691prefetch_on_access=false 692prefetcher=Null 693response_latency=50 694sequential_access=false 695size=1024 696system=system 697tags=system.iocache.tags 698tgts_per_mshr=12 699two_queue=false 700write_buffers=8 701cpu_side=system.iobus.master[29] 702mem_side=system.membus.slave[2] 703 704[system.iocache.tags] 705type=LRU 706assoc=8 707block_size=64 708clk_domain=system.clk_domain 709eventq_index=0 710hit_latency=50 711sequential_access=false 712size=1024 713 714[system.membus] 715type=CoherentBus 716children=badaddr_responder 717clk_domain=system.clk_domain 718eventq_index=0 719header_cycles=1 720system=system 721use_default_range=false 722width=8 723default=system.membus.badaddr_responder.pio 724master=system.bridge.slave system.physmem.port 725slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side 726 727[system.membus.badaddr_responder] 728type=IsaFake 729clk_domain=system.clk_domain 730eventq_index=0 731fake_mem=false 732pio_addr=0 733pio_latency=100000 734pio_size=8 735ret_bad_addr=true 736ret_data16=65535 737ret_data32=4294967295 738ret_data64=18446744073709551615 739ret_data8=255 740system=system 741update_data=false 742warn_access= 743pio=system.membus.default 744 745[system.physmem] 746type=DRAMCtrl 747activation_limit=4 748addr_mapping=RoRaBaChCo 749banks_per_rank=8 750burst_length=8 751channels=1 752clk_domain=system.clk_domain 753conf_table_reported=true 754device_bus_width=8 755device_rowbuffer_size=1024 756devices_per_rank=8 757eventq_index=0 758in_addr_map=true 759max_accesses_per_row=16 760mem_sched_policy=frfcfs 761min_writes_per_switch=16 762null=false 763page_policy=open_adaptive 764range=0:134217727 765ranks_per_channel=2 766read_buffer_size=32 767static_backend_latency=10000 768static_frontend_latency=10000 769tBURST=5000 770tCK=1250 771tCL=13750 772tRAS=35000 773tRCD=13750 774tREFI=7800000 775tRFC=260000 776tRP=13750 777tRRD=6000 778tRTP=7500 779tRTW=2500 780tWR=15000 781tWTR=7500 782tXAW=30000 783write_buffer_size=64 784write_high_thresh_perc=85 785write_low_thresh_perc=50 786port=system.membus.master[1] 787 788[system.simple_disk] 789type=SimpleDisk 790children=disk 791disk=system.simple_disk.disk 792eventq_index=0 793system=system 794 795[system.simple_disk.disk] 796type=RawDiskImage 797eventq_index=0 798image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-latest.img 799read_only=true 800 801[system.terminal] 802type=Terminal 803eventq_index=0 804intr_control=system.intrctrl 805number=0 806output=true 807port=3456 808 809[system.tsunami] 810type=Tsunami 811children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart 812eventq_index=0 813intrctrl=system.intrctrl 814system=system 815 816[system.tsunami.backdoor] 817type=AlphaBackdoor 818clk_domain=system.clk_domain 819cpu=system.cpu 820disk=system.simple_disk 821eventq_index=0 822pio_addr=8804682956800 823pio_latency=100000 824platform=system.tsunami 825system=system 826terminal=system.terminal 827pio=system.iobus.master[24] 828 829[system.tsunami.cchip] 830type=TsunamiCChip 831clk_domain=system.clk_domain 832eventq_index=0 833pio_addr=8803072344064 834pio_latency=100000 835system=system 836tsunami=system.tsunami 837pio=system.iobus.master[0] 838 839[system.tsunami.ethernet] 840type=NSGigE 841BAR0=1 842BAR0LegacyIO=false 843BAR0Size=256 844BAR1=0 845BAR1LegacyIO=false 846BAR1Size=4096 847BAR2=0 848BAR2LegacyIO=false 849BAR2Size=0 850BAR3=0 851BAR3LegacyIO=false 852BAR3Size=0 853BAR4=0 854BAR4LegacyIO=false 855BAR4Size=0 856BAR5=0 857BAR5LegacyIO=false 858BAR5Size=0 859BIST=0 860CacheLineSize=0 861CapabilityPtr=0 862CardbusCIS=0 863ClassCode=2 864Command=0 865DeviceID=34 866ExpansionROM=0 867HeaderType=0 868InterruptLine=30 869InterruptPin=1 870LatencyTimer=0 871MSICAPBaseOffset=0 872MSICAPCapId=0 873MSICAPMaskBits=0 874MSICAPMsgAddr=0 875MSICAPMsgCtrl=0 876MSICAPMsgData=0 877MSICAPMsgUpperAddr=0 878MSICAPNextCapability=0 879MSICAPPendingBits=0 880MSIXCAPBaseOffset=0 881MSIXCAPCapId=0 882MSIXCAPNextCapability=0 883MSIXMsgCtrl=0 884MSIXPbaOffset=0 885MSIXTableOffset=0 886MaximumLatency=52 887MinimumGrant=176 888PMCAPBaseOffset=0 889PMCAPCapId=0 890PMCAPCapabilities=0 891PMCAPCtrlStatus=0 892PMCAPNextCapability=0 893PXCAPBaseOffset=0 894PXCAPCapId=0 895PXCAPCapabilities=0 896PXCAPDevCap2=0 897PXCAPDevCapabilities=0 898PXCAPDevCtrl=0 899PXCAPDevCtrl2=0 900PXCAPDevStatus=0 901PXCAPLinkCap=0 902PXCAPLinkCtrl=0 903PXCAPLinkStatus=0 904PXCAPNextCapability=0 905ProgIF=0 906Revision=0 907Status=656 908SubClassCode=0 909SubsystemID=0 910SubsystemVendorID=0 911VendorID=4107 912clk_domain=system.clk_domain 913config_latency=20000 914dma_data_free=false 915dma_desc_free=false 916dma_no_allocate=true 917dma_read_delay=0 918dma_read_factor=0 919dma_write_delay=0 920dma_write_factor=0 921eventq_index=0 922hardware_address=00:90:00:00:00:01 923intr_delay=10000000 924pci_bus=0 925pci_dev=1 926pci_func=0 927pio_latency=30000 928platform=system.tsunami 929rss=false 930rx_delay=1000000 931rx_fifo_size=524288 932rx_filter=true 933rx_thread=false 934system=system 935tx_delay=1000000 936tx_fifo_size=524288 937tx_thread=false 938config=system.iobus.master[28] 939dma=system.iobus.slave[2] 940pio=system.iobus.master[27] 941 942[system.tsunami.fake_OROM] 943type=IsaFake 944clk_domain=system.clk_domain 945eventq_index=0 946fake_mem=false 947pio_addr=8796093677568 948pio_latency=100000 949pio_size=393216 950ret_bad_addr=false 951ret_data16=65535 952ret_data32=4294967295 953ret_data64=18446744073709551615 954ret_data8=255 955system=system 956update_data=false 957warn_access= 958pio=system.iobus.master[8] 959 960[system.tsunami.fake_ata0] 961type=IsaFake 962clk_domain=system.clk_domain 963eventq_index=0 964fake_mem=false 965pio_addr=8804615848432 966pio_latency=100000 967pio_size=8 968ret_bad_addr=false 969ret_data16=65535 970ret_data32=4294967295 971ret_data64=18446744073709551615 972ret_data8=255 973system=system 974update_data=false 975warn_access= 976pio=system.iobus.master[19] 977 978[system.tsunami.fake_ata1] 979type=IsaFake 980clk_domain=system.clk_domain 981eventq_index=0 982fake_mem=false 983pio_addr=8804615848304 984pio_latency=100000 985pio_size=8 986ret_bad_addr=false 987ret_data16=65535 988ret_data32=4294967295 989ret_data64=18446744073709551615 990ret_data8=255 991system=system 992update_data=false 993warn_access= 994pio=system.iobus.master[20] 995 996[system.tsunami.fake_pnp_addr] 997type=IsaFake 998clk_domain=system.clk_domain 999eventq_index=0 1000fake_mem=false 1001pio_addr=8804615848569 1002pio_latency=100000 1003pio_size=8 1004ret_bad_addr=false 1005ret_data16=65535 1006ret_data32=4294967295 1007ret_data64=18446744073709551615 1008ret_data8=255 1009system=system 1010update_data=false 1011warn_access= 1012pio=system.iobus.master[9] 1013 1014[system.tsunami.fake_pnp_read0] 1015type=IsaFake 1016clk_domain=system.clk_domain 1017eventq_index=0 1018fake_mem=false 1019pio_addr=8804615848451 1020pio_latency=100000 1021pio_size=8 1022ret_bad_addr=false 1023ret_data16=65535 1024ret_data32=4294967295 1025ret_data64=18446744073709551615 1026ret_data8=255 1027system=system 1028update_data=false 1029warn_access= 1030pio=system.iobus.master[11] 1031 1032[system.tsunami.fake_pnp_read1] 1033type=IsaFake 1034clk_domain=system.clk_domain 1035eventq_index=0 1036fake_mem=false 1037pio_addr=8804615848515 1038pio_latency=100000 1039pio_size=8 1040ret_bad_addr=false 1041ret_data16=65535 1042ret_data32=4294967295 1043ret_data64=18446744073709551615 1044ret_data8=255 1045system=system 1046update_data=false 1047warn_access= 1048pio=system.iobus.master[12] 1049 1050[system.tsunami.fake_pnp_read2] 1051type=IsaFake 1052clk_domain=system.clk_domain 1053eventq_index=0 1054fake_mem=false 1055pio_addr=8804615848579 1056pio_latency=100000 1057pio_size=8 1058ret_bad_addr=false 1059ret_data16=65535 1060ret_data32=4294967295 1061ret_data64=18446744073709551615 1062ret_data8=255 1063system=system 1064update_data=false 1065warn_access= 1066pio=system.iobus.master[13] 1067 1068[system.tsunami.fake_pnp_read3] 1069type=IsaFake 1070clk_domain=system.clk_domain 1071eventq_index=0 1072fake_mem=false 1073pio_addr=8804615848643 1074pio_latency=100000 1075pio_size=8 1076ret_bad_addr=false 1077ret_data16=65535 1078ret_data32=4294967295 1079ret_data64=18446744073709551615 1080ret_data8=255 1081system=system 1082update_data=false 1083warn_access= 1084pio=system.iobus.master[14] 1085 1086[system.tsunami.fake_pnp_read4] 1087type=IsaFake 1088clk_domain=system.clk_domain 1089eventq_index=0 1090fake_mem=false 1091pio_addr=8804615848707 1092pio_latency=100000 1093pio_size=8 1094ret_bad_addr=false 1095ret_data16=65535 1096ret_data32=4294967295 1097ret_data64=18446744073709551615 1098ret_data8=255 1099system=system 1100update_data=false 1101warn_access= 1102pio=system.iobus.master[15] 1103 1104[system.tsunami.fake_pnp_read5] 1105type=IsaFake 1106clk_domain=system.clk_domain 1107eventq_index=0 1108fake_mem=false 1109pio_addr=8804615848771 1110pio_latency=100000 1111pio_size=8 1112ret_bad_addr=false 1113ret_data16=65535 1114ret_data32=4294967295 1115ret_data64=18446744073709551615 1116ret_data8=255 1117system=system 1118update_data=false 1119warn_access= 1120pio=system.iobus.master[16] 1121 1122[system.tsunami.fake_pnp_read6] 1123type=IsaFake 1124clk_domain=system.clk_domain 1125eventq_index=0 1126fake_mem=false 1127pio_addr=8804615848835 1128pio_latency=100000 1129pio_size=8 1130ret_bad_addr=false 1131ret_data16=65535 1132ret_data32=4294967295 1133ret_data64=18446744073709551615 1134ret_data8=255 1135system=system 1136update_data=false 1137warn_access= 1138pio=system.iobus.master[17] 1139 1140[system.tsunami.fake_pnp_read7] 1141type=IsaFake 1142clk_domain=system.clk_domain 1143eventq_index=0 1144fake_mem=false 1145pio_addr=8804615848899 1146pio_latency=100000 1147pio_size=8 1148ret_bad_addr=false 1149ret_data16=65535 1150ret_data32=4294967295 1151ret_data64=18446744073709551615 1152ret_data8=255 1153system=system 1154update_data=false 1155warn_access= 1156pio=system.iobus.master[18] 1157 1158[system.tsunami.fake_pnp_write] 1159type=IsaFake 1160clk_domain=system.clk_domain 1161eventq_index=0 1162fake_mem=false 1163pio_addr=8804615850617 1164pio_latency=100000 1165pio_size=8 1166ret_bad_addr=false 1167ret_data16=65535 1168ret_data32=4294967295 1169ret_data64=18446744073709551615 1170ret_data8=255 1171system=system 1172update_data=false 1173warn_access= 1174pio=system.iobus.master[10] 1175 1176[system.tsunami.fake_ppc] 1177type=IsaFake 1178clk_domain=system.clk_domain 1179eventq_index=0 1180fake_mem=false 1181pio_addr=8804615848891 1182pio_latency=100000 1183pio_size=8 1184ret_bad_addr=false 1185ret_data16=65535 1186ret_data32=4294967295 1187ret_data64=18446744073709551615 1188ret_data8=255 1189system=system 1190update_data=false 1191warn_access= 1192pio=system.iobus.master[7] 1193 1194[system.tsunami.fake_sm_chip] 1195type=IsaFake 1196clk_domain=system.clk_domain 1197eventq_index=0 1198fake_mem=false 1199pio_addr=8804615848816 1200pio_latency=100000 1201pio_size=8 1202ret_bad_addr=false 1203ret_data16=65535 1204ret_data32=4294967295 1205ret_data64=18446744073709551615 1206ret_data8=255 1207system=system 1208update_data=false 1209warn_access= 1210pio=system.iobus.master[2] 1211 1212[system.tsunami.fake_uart1] 1213type=IsaFake 1214clk_domain=system.clk_domain 1215eventq_index=0 1216fake_mem=false 1217pio_addr=8804615848696 1218pio_latency=100000 1219pio_size=8 1220ret_bad_addr=false 1221ret_data16=65535 1222ret_data32=4294967295 1223ret_data64=18446744073709551615 1224ret_data8=255 1225system=system 1226update_data=false 1227warn_access= 1228pio=system.iobus.master[3] 1229 1230[system.tsunami.fake_uart2] 1231type=IsaFake 1232clk_domain=system.clk_domain 1233eventq_index=0 1234fake_mem=false 1235pio_addr=8804615848936 1236pio_latency=100000 1237pio_size=8 1238ret_bad_addr=false 1239ret_data16=65535 1240ret_data32=4294967295 1241ret_data64=18446744073709551615 1242ret_data8=255 1243system=system 1244update_data=false 1245warn_access= 1246pio=system.iobus.master[4] 1247 1248[system.tsunami.fake_uart3] 1249type=IsaFake 1250clk_domain=system.clk_domain 1251eventq_index=0 1252fake_mem=false 1253pio_addr=8804615848680 1254pio_latency=100000 1255pio_size=8 1256ret_bad_addr=false 1257ret_data16=65535 1258ret_data32=4294967295 1259ret_data64=18446744073709551615 1260ret_data8=255 1261system=system 1262update_data=false 1263warn_access= 1264pio=system.iobus.master[5] 1265 1266[system.tsunami.fake_uart4] 1267type=IsaFake 1268clk_domain=system.clk_domain 1269eventq_index=0 1270fake_mem=false 1271pio_addr=8804615848944 1272pio_latency=100000 1273pio_size=8 1274ret_bad_addr=false 1275ret_data16=65535 1276ret_data32=4294967295 1277ret_data64=18446744073709551615 1278ret_data8=255 1279system=system 1280update_data=false 1281warn_access= 1282pio=system.iobus.master[6] 1283 1284[system.tsunami.fb] 1285type=BadDevice 1286clk_domain=system.clk_domain 1287devicename=FrameBuffer 1288eventq_index=0 1289pio_addr=8804615848912 1290pio_latency=100000 1291system=system 1292pio=system.iobus.master[21] 1293 1294[system.tsunami.ide] 1295type=IdeController 1296BAR0=1 1297BAR0LegacyIO=false 1298BAR0Size=8 1299BAR1=1 1300BAR1LegacyIO=false 1301BAR1Size=4 1302BAR2=1 1303BAR2LegacyIO=false 1304BAR2Size=8 1305BAR3=1 1306BAR3LegacyIO=false 1307BAR3Size=4 1308BAR4=1 1309BAR4LegacyIO=false 1310BAR4Size=16 1311BAR5=1 1312BAR5LegacyIO=false 1313BAR5Size=0 1314BIST=0 1315CacheLineSize=0 1316CapabilityPtr=0 1317CardbusCIS=0 1318ClassCode=1 1319Command=0 1320DeviceID=28945 1321ExpansionROM=0 1322HeaderType=0 1323InterruptLine=31 1324InterruptPin=1 1325LatencyTimer=0 1326MSICAPBaseOffset=0 1327MSICAPCapId=0 1328MSICAPMaskBits=0 1329MSICAPMsgAddr=0 1330MSICAPMsgCtrl=0 1331MSICAPMsgData=0 1332MSICAPMsgUpperAddr=0 1333MSICAPNextCapability=0 1334MSICAPPendingBits=0 1335MSIXCAPBaseOffset=0 1336MSIXCAPCapId=0 1337MSIXCAPNextCapability=0 1338MSIXMsgCtrl=0 1339MSIXPbaOffset=0 1340MSIXTableOffset=0 1341MaximumLatency=0 1342MinimumGrant=0 1343PMCAPBaseOffset=0 1344PMCAPCapId=0 1345PMCAPCapabilities=0 1346PMCAPCtrlStatus=0 1347PMCAPNextCapability=0 1348PXCAPBaseOffset=0 1349PXCAPCapId=0 1350PXCAPCapabilities=0 1351PXCAPDevCap2=0 1352PXCAPDevCapabilities=0 1353PXCAPDevCtrl=0 1354PXCAPDevCtrl2=0 1355PXCAPDevStatus=0 1356PXCAPLinkCap=0 1357PXCAPLinkCtrl=0 1358PXCAPLinkStatus=0 1359PXCAPNextCapability=0 1360ProgIF=133 1361Revision=0 1362Status=640 1363SubClassCode=1 1364SubsystemID=0 1365SubsystemVendorID=0 1366VendorID=32902 1367clk_domain=system.clk_domain 1368config_latency=20000 1369ctrl_offset=0 1370disks=system.disk0 system.disk2 1371eventq_index=0 1372io_shift=0 1373pci_bus=0 1374pci_dev=0 1375pci_func=0 1376pio_latency=30000 1377platform=system.tsunami 1378system=system 1379config=system.iobus.master[26] 1380dma=system.iobus.slave[1] 1381pio=system.iobus.master[25] 1382 1383[system.tsunami.io] 1384type=TsunamiIO 1385clk_domain=system.clk_domain 1386eventq_index=0 1387frequency=976562500 1388pio_addr=8804615847936 1389pio_latency=100000 1390system=system 1391time=Thu Jan 1 00:00:00 2009 1392tsunami=system.tsunami 1393year_is_bcd=false 1394pio=system.iobus.master[22] 1395 1396[system.tsunami.pchip] 1397type=TsunamiPChip 1398clk_domain=system.clk_domain 1399eventq_index=0 1400pio_addr=8802535473152 1401pio_latency=100000 1402system=system 1403tsunami=system.tsunami 1404pio=system.iobus.master[1] 1405 1406[system.tsunami.pciconfig] 1407type=PciConfigAll 1408bus=0 1409clk_domain=system.clk_domain 1410eventq_index=0 1411pio_addr=0 1412pio_latency=30000 1413platform=system.tsunami 1414size=16777216 1415system=system 1416pio=system.iobus.default 1417 1418[system.tsunami.uart] 1419type=Uart8250 1420clk_domain=system.clk_domain 1421eventq_index=0 1422pio_addr=8804615848952 1423pio_latency=100000 1424platform=system.tsunami 1425system=system 1426terminal=system.terminal 1427pio=system.iobus.master[23] 1428 1429[system.voltage_domain] 1430type=VoltageDomain 1431eventq_index=0 1432voltage=1.000000 1433 1434