config.ini revision 10242
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxAlphaSystem 13children=bridge clk_domain cpu0 cpu1 cpu_clk_domain disk0 disk2 intrctrl iobus iocache l2c membus physmem simple_disk terminal toL2Bus tsunami voltage_domain 14boot_cpu_frequency=500 15boot_osflags=root=/dev/hda1 console=ttyS0 16cache_line_size=64 17clk_domain=system.clk_domain 18console=/home/stever/m5/m5_system_2.0b3/binaries/console 19eventq_index=0 20init_param=0 21kernel=/home/stever/m5/m5_system_2.0b3/binaries/vmlinux 22load_addr_mask=1099511627775 23load_offset=0 24mem_mode=timing 25mem_ranges=0:134217727 26memories=system.physmem 27num_work_ids=16 28pal=/home/stever/m5/m5_system_2.0b3/binaries/ts_osfpal 29readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh 30symbolfile= 31system_rev=1024 32system_type=34 33work_begin_ckpt_count=0 34work_begin_cpu_id_exit=-1 35work_begin_exit_count=0 36work_cpus_ckpt_count=0 37work_end_ckpt_count=0 38work_end_exit_count=0 39work_item_id=-1 40system_port=system.membus.slave[0] 41 42[system.bridge] 43type=Bridge 44clk_domain=system.clk_domain 45delay=50000 46eventq_index=0 47ranges=8796093022208:18446744073709551615 48req_size=16 49resp_size=16 50master=system.iobus.slave[0] 51slave=system.membus.master[0] 52 53[system.clk_domain] 54type=SrcClockDomain 55clock=1000 56eventq_index=0 57voltage_domain=system.voltage_domain 58 59[system.cpu0] 60type=DerivO3CPU 61children=branchPred dcache dtb fuPool icache interrupts isa itb tracer 62LFSTSize=1024 63LQEntries=32 64LSQCheckLoads=true 65LSQDepCheckShift=4 66SQEntries=32 67SSITSize=1024 68activity=0 69backComSize=5 70branchPred=system.cpu0.branchPred 71cachePorts=200 72checker=Null 73clk_domain=system.cpu_clk_domain 74commitToDecodeDelay=1 75commitToFetchDelay=1 76commitToIEWDelay=1 77commitToRenameDelay=1 78commitWidth=8 79cpu_id=0 80decodeToFetchDelay=1 81decodeToRenameDelay=1 82decodeWidth=8 83dispatchWidth=8 84do_checkpoint_insts=true 85do_quiesce=true 86do_statistics_insts=true 87dtb=system.cpu0.dtb 88eventq_index=0 89fetchBufferSize=64 90fetchToDecodeDelay=1 91fetchTrapLatency=1 92fetchWidth=8 93forwardComSize=5 94fuPool=system.cpu0.fuPool 95function_trace=false 96function_trace_start=0 97iewToCommitDelay=1 98iewToDecodeDelay=1 99iewToFetchDelay=1 100iewToRenameDelay=1 101interrupts=system.cpu0.interrupts 102isa=system.cpu0.isa 103issueToExecuteDelay=1 104issueWidth=8 105itb=system.cpu0.itb 106max_insts_all_threads=0 107max_insts_any_thread=0 108max_loads_all_threads=0 109max_loads_any_thread=0 110needsTSO=false 111numIQEntries=64 112numPhysCCRegs=0 113numPhysFloatRegs=256 114numPhysIntRegs=256 115numROBEntries=192 116numRobs=1 117numThreads=1 118profile=0 119progress_interval=0 120renameToDecodeDelay=1 121renameToFetchDelay=1 122renameToIEWDelay=2 123renameToROBDelay=1 124renameWidth=8 125simpoint_start_insts= 126smtCommitPolicy=RoundRobin 127smtFetchPolicy=SingleThread 128smtIQPolicy=Partitioned 129smtIQThreshold=100 130smtLSQPolicy=Partitioned 131smtLSQThreshold=100 132smtNumFetchingThreads=1 133smtROBPolicy=Partitioned 134smtROBThreshold=100 135socket_id=0 136squashWidth=8 137store_set_clear_period=250000 138switched_out=false 139system=system 140tracer=system.cpu0.tracer 141trapLatency=13 142wbDepth=1 143wbWidth=8 144workload= 145dcache_port=system.cpu0.dcache.cpu_side 146icache_port=system.cpu0.icache.cpu_side 147 148[system.cpu0.branchPred] 149type=BranchPredictor 150BTBEntries=4096 151BTBTagSize=16 152RASSize=16 153choiceCtrBits=2 154choicePredictorSize=8192 155eventq_index=0 156globalCtrBits=2 157globalPredictorSize=8192 158instShiftAmt=2 159localCtrBits=2 160localHistoryTableSize=2048 161localPredictorSize=2048 162numThreads=1 163predType=tournament 164 165[system.cpu0.dcache] 166type=BaseCache 167children=tags 168addr_ranges=0:18446744073709551615 169assoc=4 170clk_domain=system.cpu_clk_domain 171eventq_index=0 172forward_snoops=true 173hit_latency=2 174is_top_level=true 175max_miss_count=0 176mshrs=4 177prefetch_on_access=false 178prefetcher=Null 179response_latency=2 180sequential_access=false 181size=32768 182system=system 183tags=system.cpu0.dcache.tags 184tgts_per_mshr=20 185two_queue=false 186write_buffers=8 187cpu_side=system.cpu0.dcache_port 188mem_side=system.toL2Bus.slave[1] 189 190[system.cpu0.dcache.tags] 191type=LRU 192assoc=4 193block_size=64 194clk_domain=system.cpu_clk_domain 195eventq_index=0 196hit_latency=2 197sequential_access=false 198size=32768 199 200[system.cpu0.dtb] 201type=AlphaTLB 202eventq_index=0 203size=64 204 205[system.cpu0.fuPool] 206type=FUPool 207children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 208FUList=system.cpu0.fuPool.FUList0 system.cpu0.fuPool.FUList1 system.cpu0.fuPool.FUList2 system.cpu0.fuPool.FUList3 system.cpu0.fuPool.FUList4 system.cpu0.fuPool.FUList5 system.cpu0.fuPool.FUList6 system.cpu0.fuPool.FUList7 system.cpu0.fuPool.FUList8 209eventq_index=0 210 211[system.cpu0.fuPool.FUList0] 212type=FUDesc 213children=opList 214count=6 215eventq_index=0 216opList=system.cpu0.fuPool.FUList0.opList 217 218[system.cpu0.fuPool.FUList0.opList] 219type=OpDesc 220eventq_index=0 221issueLat=1 222opClass=IntAlu 223opLat=1 224 225[system.cpu0.fuPool.FUList1] 226type=FUDesc 227children=opList0 opList1 228count=2 229eventq_index=0 230opList=system.cpu0.fuPool.FUList1.opList0 system.cpu0.fuPool.FUList1.opList1 231 232[system.cpu0.fuPool.FUList1.opList0] 233type=OpDesc 234eventq_index=0 235issueLat=1 236opClass=IntMult 237opLat=3 238 239[system.cpu0.fuPool.FUList1.opList1] 240type=OpDesc 241eventq_index=0 242issueLat=19 243opClass=IntDiv 244opLat=20 245 246[system.cpu0.fuPool.FUList2] 247type=FUDesc 248children=opList0 opList1 opList2 249count=4 250eventq_index=0 251opList=system.cpu0.fuPool.FUList2.opList0 system.cpu0.fuPool.FUList2.opList1 system.cpu0.fuPool.FUList2.opList2 252 253[system.cpu0.fuPool.FUList2.opList0] 254type=OpDesc 255eventq_index=0 256issueLat=1 257opClass=FloatAdd 258opLat=2 259 260[system.cpu0.fuPool.FUList2.opList1] 261type=OpDesc 262eventq_index=0 263issueLat=1 264opClass=FloatCmp 265opLat=2 266 267[system.cpu0.fuPool.FUList2.opList2] 268type=OpDesc 269eventq_index=0 270issueLat=1 271opClass=FloatCvt 272opLat=2 273 274[system.cpu0.fuPool.FUList3] 275type=FUDesc 276children=opList0 opList1 opList2 277count=2 278eventq_index=0 279opList=system.cpu0.fuPool.FUList3.opList0 system.cpu0.fuPool.FUList3.opList1 system.cpu0.fuPool.FUList3.opList2 280 281[system.cpu0.fuPool.FUList3.opList0] 282type=OpDesc 283eventq_index=0 284issueLat=1 285opClass=FloatMult 286opLat=4 287 288[system.cpu0.fuPool.FUList3.opList1] 289type=OpDesc 290eventq_index=0 291issueLat=12 292opClass=FloatDiv 293opLat=12 294 295[system.cpu0.fuPool.FUList3.opList2] 296type=OpDesc 297eventq_index=0 298issueLat=24 299opClass=FloatSqrt 300opLat=24 301 302[system.cpu0.fuPool.FUList4] 303type=FUDesc 304children=opList 305count=0 306eventq_index=0 307opList=system.cpu0.fuPool.FUList4.opList 308 309[system.cpu0.fuPool.FUList4.opList] 310type=OpDesc 311eventq_index=0 312issueLat=1 313opClass=MemRead 314opLat=1 315 316[system.cpu0.fuPool.FUList5] 317type=FUDesc 318children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 319count=4 320eventq_index=0 321opList=system.cpu0.fuPool.FUList5.opList00 system.cpu0.fuPool.FUList5.opList01 system.cpu0.fuPool.FUList5.opList02 system.cpu0.fuPool.FUList5.opList03 system.cpu0.fuPool.FUList5.opList04 system.cpu0.fuPool.FUList5.opList05 system.cpu0.fuPool.FUList5.opList06 system.cpu0.fuPool.FUList5.opList07 system.cpu0.fuPool.FUList5.opList08 system.cpu0.fuPool.FUList5.opList09 system.cpu0.fuPool.FUList5.opList10 system.cpu0.fuPool.FUList5.opList11 system.cpu0.fuPool.FUList5.opList12 system.cpu0.fuPool.FUList5.opList13 system.cpu0.fuPool.FUList5.opList14 system.cpu0.fuPool.FUList5.opList15 system.cpu0.fuPool.FUList5.opList16 system.cpu0.fuPool.FUList5.opList17 system.cpu0.fuPool.FUList5.opList18 system.cpu0.fuPool.FUList5.opList19 322 323[system.cpu0.fuPool.FUList5.opList00] 324type=OpDesc 325eventq_index=0 326issueLat=1 327opClass=SimdAdd 328opLat=1 329 330[system.cpu0.fuPool.FUList5.opList01] 331type=OpDesc 332eventq_index=0 333issueLat=1 334opClass=SimdAddAcc 335opLat=1 336 337[system.cpu0.fuPool.FUList5.opList02] 338type=OpDesc 339eventq_index=0 340issueLat=1 341opClass=SimdAlu 342opLat=1 343 344[system.cpu0.fuPool.FUList5.opList03] 345type=OpDesc 346eventq_index=0 347issueLat=1 348opClass=SimdCmp 349opLat=1 350 351[system.cpu0.fuPool.FUList5.opList04] 352type=OpDesc 353eventq_index=0 354issueLat=1 355opClass=SimdCvt 356opLat=1 357 358[system.cpu0.fuPool.FUList5.opList05] 359type=OpDesc 360eventq_index=0 361issueLat=1 362opClass=SimdMisc 363opLat=1 364 365[system.cpu0.fuPool.FUList5.opList06] 366type=OpDesc 367eventq_index=0 368issueLat=1 369opClass=SimdMult 370opLat=1 371 372[system.cpu0.fuPool.FUList5.opList07] 373type=OpDesc 374eventq_index=0 375issueLat=1 376opClass=SimdMultAcc 377opLat=1 378 379[system.cpu0.fuPool.FUList5.opList08] 380type=OpDesc 381eventq_index=0 382issueLat=1 383opClass=SimdShift 384opLat=1 385 386[system.cpu0.fuPool.FUList5.opList09] 387type=OpDesc 388eventq_index=0 389issueLat=1 390opClass=SimdShiftAcc 391opLat=1 392 393[system.cpu0.fuPool.FUList5.opList10] 394type=OpDesc 395eventq_index=0 396issueLat=1 397opClass=SimdSqrt 398opLat=1 399 400[system.cpu0.fuPool.FUList5.opList11] 401type=OpDesc 402eventq_index=0 403issueLat=1 404opClass=SimdFloatAdd 405opLat=1 406 407[system.cpu0.fuPool.FUList5.opList12] 408type=OpDesc 409eventq_index=0 410issueLat=1 411opClass=SimdFloatAlu 412opLat=1 413 414[system.cpu0.fuPool.FUList5.opList13] 415type=OpDesc 416eventq_index=0 417issueLat=1 418opClass=SimdFloatCmp 419opLat=1 420 421[system.cpu0.fuPool.FUList5.opList14] 422type=OpDesc 423eventq_index=0 424issueLat=1 425opClass=SimdFloatCvt 426opLat=1 427 428[system.cpu0.fuPool.FUList5.opList15] 429type=OpDesc 430eventq_index=0 431issueLat=1 432opClass=SimdFloatDiv 433opLat=1 434 435[system.cpu0.fuPool.FUList5.opList16] 436type=OpDesc 437eventq_index=0 438issueLat=1 439opClass=SimdFloatMisc 440opLat=1 441 442[system.cpu0.fuPool.FUList5.opList17] 443type=OpDesc 444eventq_index=0 445issueLat=1 446opClass=SimdFloatMult 447opLat=1 448 449[system.cpu0.fuPool.FUList5.opList18] 450type=OpDesc 451eventq_index=0 452issueLat=1 453opClass=SimdFloatMultAcc 454opLat=1 455 456[system.cpu0.fuPool.FUList5.opList19] 457type=OpDesc 458eventq_index=0 459issueLat=1 460opClass=SimdFloatSqrt 461opLat=1 462 463[system.cpu0.fuPool.FUList6] 464type=FUDesc 465children=opList 466count=0 467eventq_index=0 468opList=system.cpu0.fuPool.FUList6.opList 469 470[system.cpu0.fuPool.FUList6.opList] 471type=OpDesc 472eventq_index=0 473issueLat=1 474opClass=MemWrite 475opLat=1 476 477[system.cpu0.fuPool.FUList7] 478type=FUDesc 479children=opList0 opList1 480count=4 481eventq_index=0 482opList=system.cpu0.fuPool.FUList7.opList0 system.cpu0.fuPool.FUList7.opList1 483 484[system.cpu0.fuPool.FUList7.opList0] 485type=OpDesc 486eventq_index=0 487issueLat=1 488opClass=MemRead 489opLat=1 490 491[system.cpu0.fuPool.FUList7.opList1] 492type=OpDesc 493eventq_index=0 494issueLat=1 495opClass=MemWrite 496opLat=1 497 498[system.cpu0.fuPool.FUList8] 499type=FUDesc 500children=opList 501count=1 502eventq_index=0 503opList=system.cpu0.fuPool.FUList8.opList 504 505[system.cpu0.fuPool.FUList8.opList] 506type=OpDesc 507eventq_index=0 508issueLat=3 509opClass=IprAccess 510opLat=3 511 512[system.cpu0.icache] 513type=BaseCache 514children=tags 515addr_ranges=0:18446744073709551615 516assoc=1 517clk_domain=system.cpu_clk_domain 518eventq_index=0 519forward_snoops=true 520hit_latency=2 521is_top_level=true 522max_miss_count=0 523mshrs=4 524prefetch_on_access=false 525prefetcher=Null 526response_latency=2 527sequential_access=false 528size=32768 529system=system 530tags=system.cpu0.icache.tags 531tgts_per_mshr=20 532two_queue=false 533write_buffers=8 534cpu_side=system.cpu0.icache_port 535mem_side=system.toL2Bus.slave[0] 536 537[system.cpu0.icache.tags] 538type=LRU 539assoc=1 540block_size=64 541clk_domain=system.cpu_clk_domain 542eventq_index=0 543hit_latency=2 544sequential_access=false 545size=32768 546 547[system.cpu0.interrupts] 548type=AlphaInterrupts 549eventq_index=0 550 551[system.cpu0.isa] 552type=AlphaISA 553eventq_index=0 554system=system 555 556[system.cpu0.itb] 557type=AlphaTLB 558eventq_index=0 559size=48 560 561[system.cpu0.tracer] 562type=ExeTracer 563eventq_index=0 564 565[system.cpu1] 566type=DerivO3CPU 567children=branchPred dcache dtb fuPool icache interrupts isa itb tracer 568LFSTSize=1024 569LQEntries=32 570LSQCheckLoads=true 571LSQDepCheckShift=4 572SQEntries=32 573SSITSize=1024 574activity=0 575backComSize=5 576branchPred=system.cpu1.branchPred 577cachePorts=200 578checker=Null 579clk_domain=system.cpu_clk_domain 580commitToDecodeDelay=1 581commitToFetchDelay=1 582commitToIEWDelay=1 583commitToRenameDelay=1 584commitWidth=8 585cpu_id=1 586decodeToFetchDelay=1 587decodeToRenameDelay=1 588decodeWidth=8 589dispatchWidth=8 590do_checkpoint_insts=true 591do_quiesce=true 592do_statistics_insts=true 593dtb=system.cpu1.dtb 594eventq_index=0 595fetchBufferSize=64 596fetchToDecodeDelay=1 597fetchTrapLatency=1 598fetchWidth=8 599forwardComSize=5 600fuPool=system.cpu1.fuPool 601function_trace=false 602function_trace_start=0 603iewToCommitDelay=1 604iewToDecodeDelay=1 605iewToFetchDelay=1 606iewToRenameDelay=1 607interrupts=system.cpu1.interrupts 608isa=system.cpu1.isa 609issueToExecuteDelay=1 610issueWidth=8 611itb=system.cpu1.itb 612max_insts_all_threads=0 613max_insts_any_thread=0 614max_loads_all_threads=0 615max_loads_any_thread=0 616needsTSO=false 617numIQEntries=64 618numPhysCCRegs=0 619numPhysFloatRegs=256 620numPhysIntRegs=256 621numROBEntries=192 622numRobs=1 623numThreads=1 624profile=0 625progress_interval=0 626renameToDecodeDelay=1 627renameToFetchDelay=1 628renameToIEWDelay=2 629renameToROBDelay=1 630renameWidth=8 631simpoint_start_insts= 632smtCommitPolicy=RoundRobin 633smtFetchPolicy=SingleThread 634smtIQPolicy=Partitioned 635smtIQThreshold=100 636smtLSQPolicy=Partitioned 637smtLSQThreshold=100 638smtNumFetchingThreads=1 639smtROBPolicy=Partitioned 640smtROBThreshold=100 641socket_id=0 642squashWidth=8 643store_set_clear_period=250000 644switched_out=false 645system=system 646tracer=system.cpu1.tracer 647trapLatency=13 648wbDepth=1 649wbWidth=8 650workload= 651dcache_port=system.cpu1.dcache.cpu_side 652icache_port=system.cpu1.icache.cpu_side 653 654[system.cpu1.branchPred] 655type=BranchPredictor 656BTBEntries=4096 657BTBTagSize=16 658RASSize=16 659choiceCtrBits=2 660choicePredictorSize=8192 661eventq_index=0 662globalCtrBits=2 663globalPredictorSize=8192 664instShiftAmt=2 665localCtrBits=2 666localHistoryTableSize=2048 667localPredictorSize=2048 668numThreads=1 669predType=tournament 670 671[system.cpu1.dcache] 672type=BaseCache 673children=tags 674addr_ranges=0:18446744073709551615 675assoc=4 676clk_domain=system.cpu_clk_domain 677eventq_index=0 678forward_snoops=true 679hit_latency=2 680is_top_level=true 681max_miss_count=0 682mshrs=4 683prefetch_on_access=false 684prefetcher=Null 685response_latency=2 686sequential_access=false 687size=32768 688system=system 689tags=system.cpu1.dcache.tags 690tgts_per_mshr=20 691two_queue=false 692write_buffers=8 693cpu_side=system.cpu1.dcache_port 694mem_side=system.toL2Bus.slave[3] 695 696[system.cpu1.dcache.tags] 697type=LRU 698assoc=4 699block_size=64 700clk_domain=system.cpu_clk_domain 701eventq_index=0 702hit_latency=2 703sequential_access=false 704size=32768 705 706[system.cpu1.dtb] 707type=AlphaTLB 708eventq_index=0 709size=64 710 711[system.cpu1.fuPool] 712type=FUPool 713children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 714FUList=system.cpu1.fuPool.FUList0 system.cpu1.fuPool.FUList1 system.cpu1.fuPool.FUList2 system.cpu1.fuPool.FUList3 system.cpu1.fuPool.FUList4 system.cpu1.fuPool.FUList5 system.cpu1.fuPool.FUList6 system.cpu1.fuPool.FUList7 system.cpu1.fuPool.FUList8 715eventq_index=0 716 717[system.cpu1.fuPool.FUList0] 718type=FUDesc 719children=opList 720count=6 721eventq_index=0 722opList=system.cpu1.fuPool.FUList0.opList 723 724[system.cpu1.fuPool.FUList0.opList] 725type=OpDesc 726eventq_index=0 727issueLat=1 728opClass=IntAlu 729opLat=1 730 731[system.cpu1.fuPool.FUList1] 732type=FUDesc 733children=opList0 opList1 734count=2 735eventq_index=0 736opList=system.cpu1.fuPool.FUList1.opList0 system.cpu1.fuPool.FUList1.opList1 737 738[system.cpu1.fuPool.FUList1.opList0] 739type=OpDesc 740eventq_index=0 741issueLat=1 742opClass=IntMult 743opLat=3 744 745[system.cpu1.fuPool.FUList1.opList1] 746type=OpDesc 747eventq_index=0 748issueLat=19 749opClass=IntDiv 750opLat=20 751 752[system.cpu1.fuPool.FUList2] 753type=FUDesc 754children=opList0 opList1 opList2 755count=4 756eventq_index=0 757opList=system.cpu1.fuPool.FUList2.opList0 system.cpu1.fuPool.FUList2.opList1 system.cpu1.fuPool.FUList2.opList2 758 759[system.cpu1.fuPool.FUList2.opList0] 760type=OpDesc 761eventq_index=0 762issueLat=1 763opClass=FloatAdd 764opLat=2 765 766[system.cpu1.fuPool.FUList2.opList1] 767type=OpDesc 768eventq_index=0 769issueLat=1 770opClass=FloatCmp 771opLat=2 772 773[system.cpu1.fuPool.FUList2.opList2] 774type=OpDesc 775eventq_index=0 776issueLat=1 777opClass=FloatCvt 778opLat=2 779 780[system.cpu1.fuPool.FUList3] 781type=FUDesc 782children=opList0 opList1 opList2 783count=2 784eventq_index=0 785opList=system.cpu1.fuPool.FUList3.opList0 system.cpu1.fuPool.FUList3.opList1 system.cpu1.fuPool.FUList3.opList2 786 787[system.cpu1.fuPool.FUList3.opList0] 788type=OpDesc 789eventq_index=0 790issueLat=1 791opClass=FloatMult 792opLat=4 793 794[system.cpu1.fuPool.FUList3.opList1] 795type=OpDesc 796eventq_index=0 797issueLat=12 798opClass=FloatDiv 799opLat=12 800 801[system.cpu1.fuPool.FUList3.opList2] 802type=OpDesc 803eventq_index=0 804issueLat=24 805opClass=FloatSqrt 806opLat=24 807 808[system.cpu1.fuPool.FUList4] 809type=FUDesc 810children=opList 811count=0 812eventq_index=0 813opList=system.cpu1.fuPool.FUList4.opList 814 815[system.cpu1.fuPool.FUList4.opList] 816type=OpDesc 817eventq_index=0 818issueLat=1 819opClass=MemRead 820opLat=1 821 822[system.cpu1.fuPool.FUList5] 823type=FUDesc 824children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 825count=4 826eventq_index=0 827opList=system.cpu1.fuPool.FUList5.opList00 system.cpu1.fuPool.FUList5.opList01 system.cpu1.fuPool.FUList5.opList02 system.cpu1.fuPool.FUList5.opList03 system.cpu1.fuPool.FUList5.opList04 system.cpu1.fuPool.FUList5.opList05 system.cpu1.fuPool.FUList5.opList06 system.cpu1.fuPool.FUList5.opList07 system.cpu1.fuPool.FUList5.opList08 system.cpu1.fuPool.FUList5.opList09 system.cpu1.fuPool.FUList5.opList10 system.cpu1.fuPool.FUList5.opList11 system.cpu1.fuPool.FUList5.opList12 system.cpu1.fuPool.FUList5.opList13 system.cpu1.fuPool.FUList5.opList14 system.cpu1.fuPool.FUList5.opList15 system.cpu1.fuPool.FUList5.opList16 system.cpu1.fuPool.FUList5.opList17 system.cpu1.fuPool.FUList5.opList18 system.cpu1.fuPool.FUList5.opList19 828 829[system.cpu1.fuPool.FUList5.opList00] 830type=OpDesc 831eventq_index=0 832issueLat=1 833opClass=SimdAdd 834opLat=1 835 836[system.cpu1.fuPool.FUList5.opList01] 837type=OpDesc 838eventq_index=0 839issueLat=1 840opClass=SimdAddAcc 841opLat=1 842 843[system.cpu1.fuPool.FUList5.opList02] 844type=OpDesc 845eventq_index=0 846issueLat=1 847opClass=SimdAlu 848opLat=1 849 850[system.cpu1.fuPool.FUList5.opList03] 851type=OpDesc 852eventq_index=0 853issueLat=1 854opClass=SimdCmp 855opLat=1 856 857[system.cpu1.fuPool.FUList5.opList04] 858type=OpDesc 859eventq_index=0 860issueLat=1 861opClass=SimdCvt 862opLat=1 863 864[system.cpu1.fuPool.FUList5.opList05] 865type=OpDesc 866eventq_index=0 867issueLat=1 868opClass=SimdMisc 869opLat=1 870 871[system.cpu1.fuPool.FUList5.opList06] 872type=OpDesc 873eventq_index=0 874issueLat=1 875opClass=SimdMult 876opLat=1 877 878[system.cpu1.fuPool.FUList5.opList07] 879type=OpDesc 880eventq_index=0 881issueLat=1 882opClass=SimdMultAcc 883opLat=1 884 885[system.cpu1.fuPool.FUList5.opList08] 886type=OpDesc 887eventq_index=0 888issueLat=1 889opClass=SimdShift 890opLat=1 891 892[system.cpu1.fuPool.FUList5.opList09] 893type=OpDesc 894eventq_index=0 895issueLat=1 896opClass=SimdShiftAcc 897opLat=1 898 899[system.cpu1.fuPool.FUList5.opList10] 900type=OpDesc 901eventq_index=0 902issueLat=1 903opClass=SimdSqrt 904opLat=1 905 906[system.cpu1.fuPool.FUList5.opList11] 907type=OpDesc 908eventq_index=0 909issueLat=1 910opClass=SimdFloatAdd 911opLat=1 912 913[system.cpu1.fuPool.FUList5.opList12] 914type=OpDesc 915eventq_index=0 916issueLat=1 917opClass=SimdFloatAlu 918opLat=1 919 920[system.cpu1.fuPool.FUList5.opList13] 921type=OpDesc 922eventq_index=0 923issueLat=1 924opClass=SimdFloatCmp 925opLat=1 926 927[system.cpu1.fuPool.FUList5.opList14] 928type=OpDesc 929eventq_index=0 930issueLat=1 931opClass=SimdFloatCvt 932opLat=1 933 934[system.cpu1.fuPool.FUList5.opList15] 935type=OpDesc 936eventq_index=0 937issueLat=1 938opClass=SimdFloatDiv 939opLat=1 940 941[system.cpu1.fuPool.FUList5.opList16] 942type=OpDesc 943eventq_index=0 944issueLat=1 945opClass=SimdFloatMisc 946opLat=1 947 948[system.cpu1.fuPool.FUList5.opList17] 949type=OpDesc 950eventq_index=0 951issueLat=1 952opClass=SimdFloatMult 953opLat=1 954 955[system.cpu1.fuPool.FUList5.opList18] 956type=OpDesc 957eventq_index=0 958issueLat=1 959opClass=SimdFloatMultAcc 960opLat=1 961 962[system.cpu1.fuPool.FUList5.opList19] 963type=OpDesc 964eventq_index=0 965issueLat=1 966opClass=SimdFloatSqrt 967opLat=1 968 969[system.cpu1.fuPool.FUList6] 970type=FUDesc 971children=opList 972count=0 973eventq_index=0 974opList=system.cpu1.fuPool.FUList6.opList 975 976[system.cpu1.fuPool.FUList6.opList] 977type=OpDesc 978eventq_index=0 979issueLat=1 980opClass=MemWrite 981opLat=1 982 983[system.cpu1.fuPool.FUList7] 984type=FUDesc 985children=opList0 opList1 986count=4 987eventq_index=0 988opList=system.cpu1.fuPool.FUList7.opList0 system.cpu1.fuPool.FUList7.opList1 989 990[system.cpu1.fuPool.FUList7.opList0] 991type=OpDesc 992eventq_index=0 993issueLat=1 994opClass=MemRead 995opLat=1 996 997[system.cpu1.fuPool.FUList7.opList1] 998type=OpDesc 999eventq_index=0 1000issueLat=1 1001opClass=MemWrite 1002opLat=1 1003 1004[system.cpu1.fuPool.FUList8] 1005type=FUDesc 1006children=opList 1007count=1 1008eventq_index=0 1009opList=system.cpu1.fuPool.FUList8.opList 1010 1011[system.cpu1.fuPool.FUList8.opList] 1012type=OpDesc 1013eventq_index=0 1014issueLat=3 1015opClass=IprAccess 1016opLat=3 1017 1018[system.cpu1.icache] 1019type=BaseCache 1020children=tags 1021addr_ranges=0:18446744073709551615 1022assoc=1 1023clk_domain=system.cpu_clk_domain 1024eventq_index=0 1025forward_snoops=true 1026hit_latency=2 1027is_top_level=true 1028max_miss_count=0 1029mshrs=4 1030prefetch_on_access=false 1031prefetcher=Null 1032response_latency=2 1033sequential_access=false 1034size=32768 1035system=system 1036tags=system.cpu1.icache.tags 1037tgts_per_mshr=20 1038two_queue=false 1039write_buffers=8 1040cpu_side=system.cpu1.icache_port 1041mem_side=system.toL2Bus.slave[2] 1042 1043[system.cpu1.icache.tags] 1044type=LRU 1045assoc=1 1046block_size=64 1047clk_domain=system.cpu_clk_domain 1048eventq_index=0 1049hit_latency=2 1050sequential_access=false 1051size=32768 1052 1053[system.cpu1.interrupts] 1054type=AlphaInterrupts 1055eventq_index=0 1056 1057[system.cpu1.isa] 1058type=AlphaISA 1059eventq_index=0 1060system=system 1061 1062[system.cpu1.itb] 1063type=AlphaTLB 1064eventq_index=0 1065size=48 1066 1067[system.cpu1.tracer] 1068type=ExeTracer 1069eventq_index=0 1070 1071[system.cpu_clk_domain] 1072type=SrcClockDomain 1073clock=500 1074eventq_index=0 1075voltage_domain=system.voltage_domain 1076 1077[system.disk0] 1078type=IdeDisk 1079children=image 1080delay=1000000 1081driveID=master 1082eventq_index=0 1083image=system.disk0.image 1084 1085[system.disk0.image] 1086type=CowDiskImage 1087children=child 1088child=system.disk0.image.child 1089eventq_index=0 1090image_file= 1091read_only=false 1092table_size=65536 1093 1094[system.disk0.image.child] 1095type=RawDiskImage 1096eventq_index=0 1097image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-latest.img 1098read_only=true 1099 1100[system.disk2] 1101type=IdeDisk 1102children=image 1103delay=1000000 1104driveID=master 1105eventq_index=0 1106image=system.disk2.image 1107 1108[system.disk2.image] 1109type=CowDiskImage 1110children=child 1111child=system.disk2.image.child 1112eventq_index=0 1113image_file= 1114read_only=false 1115table_size=65536 1116 1117[system.disk2.image.child] 1118type=RawDiskImage 1119eventq_index=0 1120image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-bigswap2.img 1121read_only=true 1122 1123[system.intrctrl] 1124type=IntrControl 1125eventq_index=0 1126sys=system 1127 1128[system.iobus] 1129type=NoncoherentBus 1130clk_domain=system.clk_domain 1131eventq_index=0 1132header_cycles=1 1133use_default_range=true 1134width=8 1135default=system.tsunami.pciconfig.pio 1136master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side 1137slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma 1138 1139[system.iocache] 1140type=BaseCache 1141children=tags 1142addr_ranges=0:134217727 1143assoc=8 1144clk_domain=system.clk_domain 1145eventq_index=0 1146forward_snoops=false 1147hit_latency=50 1148is_top_level=true 1149max_miss_count=0 1150mshrs=20 1151prefetch_on_access=false 1152prefetcher=Null 1153response_latency=50 1154sequential_access=false 1155size=1024 1156system=system 1157tags=system.iocache.tags 1158tgts_per_mshr=12 1159two_queue=false 1160write_buffers=8 1161cpu_side=system.iobus.master[29] 1162mem_side=system.membus.slave[2] 1163 1164[system.iocache.tags] 1165type=LRU 1166assoc=8 1167block_size=64 1168clk_domain=system.clk_domain 1169eventq_index=0 1170hit_latency=50 1171sequential_access=false 1172size=1024 1173 1174[system.l2c] 1175type=BaseCache 1176children=tags 1177addr_ranges=0:18446744073709551615 1178assoc=8 1179clk_domain=system.cpu_clk_domain 1180eventq_index=0 1181forward_snoops=true 1182hit_latency=20 1183is_top_level=false 1184max_miss_count=0 1185mshrs=20 1186prefetch_on_access=false 1187prefetcher=Null 1188response_latency=20 1189sequential_access=false 1190size=4194304 1191system=system 1192tags=system.l2c.tags 1193tgts_per_mshr=12 1194two_queue=false 1195write_buffers=8 1196cpu_side=system.toL2Bus.master[0] 1197mem_side=system.membus.slave[1] 1198 1199[system.l2c.tags] 1200type=LRU 1201assoc=8 1202block_size=64 1203clk_domain=system.cpu_clk_domain 1204eventq_index=0 1205hit_latency=20 1206sequential_access=false 1207size=4194304 1208 1209[system.membus] 1210type=CoherentBus 1211children=badaddr_responder 1212clk_domain=system.clk_domain 1213eventq_index=0 1214header_cycles=1 1215system=system 1216use_default_range=false 1217width=8 1218default=system.membus.badaddr_responder.pio 1219master=system.bridge.slave system.physmem.port 1220slave=system.system_port system.l2c.mem_side system.iocache.mem_side 1221 1222[system.membus.badaddr_responder] 1223type=IsaFake 1224clk_domain=system.clk_domain 1225eventq_index=0 1226fake_mem=false 1227pio_addr=0 1228pio_latency=100000 1229pio_size=8 1230ret_bad_addr=true 1231ret_data16=65535 1232ret_data32=4294967295 1233ret_data64=18446744073709551615 1234ret_data8=255 1235system=system 1236update_data=false 1237warn_access= 1238pio=system.membus.default 1239 1240[system.physmem] 1241type=DRAMCtrl 1242activation_limit=4 1243addr_mapping=RoRaBaChCo 1244banks_per_rank=8 1245burst_length=8 1246channels=1 1247clk_domain=system.clk_domain 1248conf_table_reported=true 1249device_bus_width=8 1250device_rowbuffer_size=1024 1251devices_per_rank=8 1252eventq_index=0 1253in_addr_map=true 1254max_accesses_per_row=16 1255mem_sched_policy=frfcfs 1256min_writes_per_switch=16 1257null=false 1258page_policy=open_adaptive 1259range=0:134217727 1260ranks_per_channel=2 1261read_buffer_size=32 1262static_backend_latency=10000 1263static_frontend_latency=10000 1264tBURST=5000 1265tCK=1250 1266tCL=13750 1267tRAS=35000 1268tRCD=13750 1269tREFI=7800000 1270tRFC=260000 1271tRP=13750 1272tRRD=6000 1273tRTP=7500 1274tRTW=2500 1275tWR=15000 1276tWTR=7500 1277tXAW=30000 1278write_buffer_size=64 1279write_high_thresh_perc=85 1280write_low_thresh_perc=50 1281port=system.membus.master[1] 1282 1283[system.simple_disk] 1284type=SimpleDisk 1285children=disk 1286disk=system.simple_disk.disk 1287eventq_index=0 1288system=system 1289 1290[system.simple_disk.disk] 1291type=RawDiskImage 1292eventq_index=0 1293image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-latest.img 1294read_only=true 1295 1296[system.terminal] 1297type=Terminal 1298eventq_index=0 1299intr_control=system.intrctrl 1300number=0 1301output=true 1302port=3456 1303 1304[system.toL2Bus] 1305type=CoherentBus 1306clk_domain=system.cpu_clk_domain 1307eventq_index=0 1308header_cycles=1 1309system=system 1310use_default_range=false 1311width=8 1312master=system.l2c.cpu_side 1313slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side 1314 1315[system.tsunami] 1316type=Tsunami 1317children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart 1318eventq_index=0 1319intrctrl=system.intrctrl 1320system=system 1321 1322[system.tsunami.backdoor] 1323type=AlphaBackdoor 1324clk_domain=system.clk_domain 1325cpu=system.cpu0 1326disk=system.simple_disk 1327eventq_index=0 1328pio_addr=8804682956800 1329pio_latency=100000 1330platform=system.tsunami 1331system=system 1332terminal=system.terminal 1333pio=system.iobus.master[24] 1334 1335[system.tsunami.cchip] 1336type=TsunamiCChip 1337clk_domain=system.clk_domain 1338eventq_index=0 1339pio_addr=8803072344064 1340pio_latency=100000 1341system=system 1342tsunami=system.tsunami 1343pio=system.iobus.master[0] 1344 1345[system.tsunami.ethernet] 1346type=NSGigE 1347BAR0=1 1348BAR0LegacyIO=false 1349BAR0Size=256 1350BAR1=0 1351BAR1LegacyIO=false 1352BAR1Size=4096 1353BAR2=0 1354BAR2LegacyIO=false 1355BAR2Size=0 1356BAR3=0 1357BAR3LegacyIO=false 1358BAR3Size=0 1359BAR4=0 1360BAR4LegacyIO=false 1361BAR4Size=0 1362BAR5=0 1363BAR5LegacyIO=false 1364BAR5Size=0 1365BIST=0 1366CacheLineSize=0 1367CapabilityPtr=0 1368CardbusCIS=0 1369ClassCode=2 1370Command=0 1371DeviceID=34 1372ExpansionROM=0 1373HeaderType=0 1374InterruptLine=30 1375InterruptPin=1 1376LatencyTimer=0 1377MSICAPBaseOffset=0 1378MSICAPCapId=0 1379MSICAPMaskBits=0 1380MSICAPMsgAddr=0 1381MSICAPMsgCtrl=0 1382MSICAPMsgData=0 1383MSICAPMsgUpperAddr=0 1384MSICAPNextCapability=0 1385MSICAPPendingBits=0 1386MSIXCAPBaseOffset=0 1387MSIXCAPCapId=0 1388MSIXCAPNextCapability=0 1389MSIXMsgCtrl=0 1390MSIXPbaOffset=0 1391MSIXTableOffset=0 1392MaximumLatency=52 1393MinimumGrant=176 1394PMCAPBaseOffset=0 1395PMCAPCapId=0 1396PMCAPCapabilities=0 1397PMCAPCtrlStatus=0 1398PMCAPNextCapability=0 1399PXCAPBaseOffset=0 1400PXCAPCapId=0 1401PXCAPCapabilities=0 1402PXCAPDevCap2=0 1403PXCAPDevCapabilities=0 1404PXCAPDevCtrl=0 1405PXCAPDevCtrl2=0 1406PXCAPDevStatus=0 1407PXCAPLinkCap=0 1408PXCAPLinkCtrl=0 1409PXCAPLinkStatus=0 1410PXCAPNextCapability=0 1411ProgIF=0 1412Revision=0 1413Status=656 1414SubClassCode=0 1415SubsystemID=0 1416SubsystemVendorID=0 1417VendorID=4107 1418clk_domain=system.clk_domain 1419config_latency=20000 1420dma_data_free=false 1421dma_desc_free=false 1422dma_no_allocate=true 1423dma_read_delay=0 1424dma_read_factor=0 1425dma_write_delay=0 1426dma_write_factor=0 1427eventq_index=0 1428hardware_address=00:90:00:00:00:01 1429intr_delay=10000000 1430pci_bus=0 1431pci_dev=1 1432pci_func=0 1433pio_latency=30000 1434platform=system.tsunami 1435rss=false 1436rx_delay=1000000 1437rx_fifo_size=524288 1438rx_filter=true 1439rx_thread=false 1440system=system 1441tx_delay=1000000 1442tx_fifo_size=524288 1443tx_thread=false 1444config=system.iobus.master[28] 1445dma=system.iobus.slave[2] 1446pio=system.iobus.master[27] 1447 1448[system.tsunami.fake_OROM] 1449type=IsaFake 1450clk_domain=system.clk_domain 1451eventq_index=0 1452fake_mem=false 1453pio_addr=8796093677568 1454pio_latency=100000 1455pio_size=393216 1456ret_bad_addr=false 1457ret_data16=65535 1458ret_data32=4294967295 1459ret_data64=18446744073709551615 1460ret_data8=255 1461system=system 1462update_data=false 1463warn_access= 1464pio=system.iobus.master[8] 1465 1466[system.tsunami.fake_ata0] 1467type=IsaFake 1468clk_domain=system.clk_domain 1469eventq_index=0 1470fake_mem=false 1471pio_addr=8804615848432 1472pio_latency=100000 1473pio_size=8 1474ret_bad_addr=false 1475ret_data16=65535 1476ret_data32=4294967295 1477ret_data64=18446744073709551615 1478ret_data8=255 1479system=system 1480update_data=false 1481warn_access= 1482pio=system.iobus.master[19] 1483 1484[system.tsunami.fake_ata1] 1485type=IsaFake 1486clk_domain=system.clk_domain 1487eventq_index=0 1488fake_mem=false 1489pio_addr=8804615848304 1490pio_latency=100000 1491pio_size=8 1492ret_bad_addr=false 1493ret_data16=65535 1494ret_data32=4294967295 1495ret_data64=18446744073709551615 1496ret_data8=255 1497system=system 1498update_data=false 1499warn_access= 1500pio=system.iobus.master[20] 1501 1502[system.tsunami.fake_pnp_addr] 1503type=IsaFake 1504clk_domain=system.clk_domain 1505eventq_index=0 1506fake_mem=false 1507pio_addr=8804615848569 1508pio_latency=100000 1509pio_size=8 1510ret_bad_addr=false 1511ret_data16=65535 1512ret_data32=4294967295 1513ret_data64=18446744073709551615 1514ret_data8=255 1515system=system 1516update_data=false 1517warn_access= 1518pio=system.iobus.master[9] 1519 1520[system.tsunami.fake_pnp_read0] 1521type=IsaFake 1522clk_domain=system.clk_domain 1523eventq_index=0 1524fake_mem=false 1525pio_addr=8804615848451 1526pio_latency=100000 1527pio_size=8 1528ret_bad_addr=false 1529ret_data16=65535 1530ret_data32=4294967295 1531ret_data64=18446744073709551615 1532ret_data8=255 1533system=system 1534update_data=false 1535warn_access= 1536pio=system.iobus.master[11] 1537 1538[system.tsunami.fake_pnp_read1] 1539type=IsaFake 1540clk_domain=system.clk_domain 1541eventq_index=0 1542fake_mem=false 1543pio_addr=8804615848515 1544pio_latency=100000 1545pio_size=8 1546ret_bad_addr=false 1547ret_data16=65535 1548ret_data32=4294967295 1549ret_data64=18446744073709551615 1550ret_data8=255 1551system=system 1552update_data=false 1553warn_access= 1554pio=system.iobus.master[12] 1555 1556[system.tsunami.fake_pnp_read2] 1557type=IsaFake 1558clk_domain=system.clk_domain 1559eventq_index=0 1560fake_mem=false 1561pio_addr=8804615848579 1562pio_latency=100000 1563pio_size=8 1564ret_bad_addr=false 1565ret_data16=65535 1566ret_data32=4294967295 1567ret_data64=18446744073709551615 1568ret_data8=255 1569system=system 1570update_data=false 1571warn_access= 1572pio=system.iobus.master[13] 1573 1574[system.tsunami.fake_pnp_read3] 1575type=IsaFake 1576clk_domain=system.clk_domain 1577eventq_index=0 1578fake_mem=false 1579pio_addr=8804615848643 1580pio_latency=100000 1581pio_size=8 1582ret_bad_addr=false 1583ret_data16=65535 1584ret_data32=4294967295 1585ret_data64=18446744073709551615 1586ret_data8=255 1587system=system 1588update_data=false 1589warn_access= 1590pio=system.iobus.master[14] 1591 1592[system.tsunami.fake_pnp_read4] 1593type=IsaFake 1594clk_domain=system.clk_domain 1595eventq_index=0 1596fake_mem=false 1597pio_addr=8804615848707 1598pio_latency=100000 1599pio_size=8 1600ret_bad_addr=false 1601ret_data16=65535 1602ret_data32=4294967295 1603ret_data64=18446744073709551615 1604ret_data8=255 1605system=system 1606update_data=false 1607warn_access= 1608pio=system.iobus.master[15] 1609 1610[system.tsunami.fake_pnp_read5] 1611type=IsaFake 1612clk_domain=system.clk_domain 1613eventq_index=0 1614fake_mem=false 1615pio_addr=8804615848771 1616pio_latency=100000 1617pio_size=8 1618ret_bad_addr=false 1619ret_data16=65535 1620ret_data32=4294967295 1621ret_data64=18446744073709551615 1622ret_data8=255 1623system=system 1624update_data=false 1625warn_access= 1626pio=system.iobus.master[16] 1627 1628[system.tsunami.fake_pnp_read6] 1629type=IsaFake 1630clk_domain=system.clk_domain 1631eventq_index=0 1632fake_mem=false 1633pio_addr=8804615848835 1634pio_latency=100000 1635pio_size=8 1636ret_bad_addr=false 1637ret_data16=65535 1638ret_data32=4294967295 1639ret_data64=18446744073709551615 1640ret_data8=255 1641system=system 1642update_data=false 1643warn_access= 1644pio=system.iobus.master[17] 1645 1646[system.tsunami.fake_pnp_read7] 1647type=IsaFake 1648clk_domain=system.clk_domain 1649eventq_index=0 1650fake_mem=false 1651pio_addr=8804615848899 1652pio_latency=100000 1653pio_size=8 1654ret_bad_addr=false 1655ret_data16=65535 1656ret_data32=4294967295 1657ret_data64=18446744073709551615 1658ret_data8=255 1659system=system 1660update_data=false 1661warn_access= 1662pio=system.iobus.master[18] 1663 1664[system.tsunami.fake_pnp_write] 1665type=IsaFake 1666clk_domain=system.clk_domain 1667eventq_index=0 1668fake_mem=false 1669pio_addr=8804615850617 1670pio_latency=100000 1671pio_size=8 1672ret_bad_addr=false 1673ret_data16=65535 1674ret_data32=4294967295 1675ret_data64=18446744073709551615 1676ret_data8=255 1677system=system 1678update_data=false 1679warn_access= 1680pio=system.iobus.master[10] 1681 1682[system.tsunami.fake_ppc] 1683type=IsaFake 1684clk_domain=system.clk_domain 1685eventq_index=0 1686fake_mem=false 1687pio_addr=8804615848891 1688pio_latency=100000 1689pio_size=8 1690ret_bad_addr=false 1691ret_data16=65535 1692ret_data32=4294967295 1693ret_data64=18446744073709551615 1694ret_data8=255 1695system=system 1696update_data=false 1697warn_access= 1698pio=system.iobus.master[7] 1699 1700[system.tsunami.fake_sm_chip] 1701type=IsaFake 1702clk_domain=system.clk_domain 1703eventq_index=0 1704fake_mem=false 1705pio_addr=8804615848816 1706pio_latency=100000 1707pio_size=8 1708ret_bad_addr=false 1709ret_data16=65535 1710ret_data32=4294967295 1711ret_data64=18446744073709551615 1712ret_data8=255 1713system=system 1714update_data=false 1715warn_access= 1716pio=system.iobus.master[2] 1717 1718[system.tsunami.fake_uart1] 1719type=IsaFake 1720clk_domain=system.clk_domain 1721eventq_index=0 1722fake_mem=false 1723pio_addr=8804615848696 1724pio_latency=100000 1725pio_size=8 1726ret_bad_addr=false 1727ret_data16=65535 1728ret_data32=4294967295 1729ret_data64=18446744073709551615 1730ret_data8=255 1731system=system 1732update_data=false 1733warn_access= 1734pio=system.iobus.master[3] 1735 1736[system.tsunami.fake_uart2] 1737type=IsaFake 1738clk_domain=system.clk_domain 1739eventq_index=0 1740fake_mem=false 1741pio_addr=8804615848936 1742pio_latency=100000 1743pio_size=8 1744ret_bad_addr=false 1745ret_data16=65535 1746ret_data32=4294967295 1747ret_data64=18446744073709551615 1748ret_data8=255 1749system=system 1750update_data=false 1751warn_access= 1752pio=system.iobus.master[4] 1753 1754[system.tsunami.fake_uart3] 1755type=IsaFake 1756clk_domain=system.clk_domain 1757eventq_index=0 1758fake_mem=false 1759pio_addr=8804615848680 1760pio_latency=100000 1761pio_size=8 1762ret_bad_addr=false 1763ret_data16=65535 1764ret_data32=4294967295 1765ret_data64=18446744073709551615 1766ret_data8=255 1767system=system 1768update_data=false 1769warn_access= 1770pio=system.iobus.master[5] 1771 1772[system.tsunami.fake_uart4] 1773type=IsaFake 1774clk_domain=system.clk_domain 1775eventq_index=0 1776fake_mem=false 1777pio_addr=8804615848944 1778pio_latency=100000 1779pio_size=8 1780ret_bad_addr=false 1781ret_data16=65535 1782ret_data32=4294967295 1783ret_data64=18446744073709551615 1784ret_data8=255 1785system=system 1786update_data=false 1787warn_access= 1788pio=system.iobus.master[6] 1789 1790[system.tsunami.fb] 1791type=BadDevice 1792clk_domain=system.clk_domain 1793devicename=FrameBuffer 1794eventq_index=0 1795pio_addr=8804615848912 1796pio_latency=100000 1797system=system 1798pio=system.iobus.master[21] 1799 1800[system.tsunami.ide] 1801type=IdeController 1802BAR0=1 1803BAR0LegacyIO=false 1804BAR0Size=8 1805BAR1=1 1806BAR1LegacyIO=false 1807BAR1Size=4 1808BAR2=1 1809BAR2LegacyIO=false 1810BAR2Size=8 1811BAR3=1 1812BAR3LegacyIO=false 1813BAR3Size=4 1814BAR4=1 1815BAR4LegacyIO=false 1816BAR4Size=16 1817BAR5=1 1818BAR5LegacyIO=false 1819BAR5Size=0 1820BIST=0 1821CacheLineSize=0 1822CapabilityPtr=0 1823CardbusCIS=0 1824ClassCode=1 1825Command=0 1826DeviceID=28945 1827ExpansionROM=0 1828HeaderType=0 1829InterruptLine=31 1830InterruptPin=1 1831LatencyTimer=0 1832MSICAPBaseOffset=0 1833MSICAPCapId=0 1834MSICAPMaskBits=0 1835MSICAPMsgAddr=0 1836MSICAPMsgCtrl=0 1837MSICAPMsgData=0 1838MSICAPMsgUpperAddr=0 1839MSICAPNextCapability=0 1840MSICAPPendingBits=0 1841MSIXCAPBaseOffset=0 1842MSIXCAPCapId=0 1843MSIXCAPNextCapability=0 1844MSIXMsgCtrl=0 1845MSIXPbaOffset=0 1846MSIXTableOffset=0 1847MaximumLatency=0 1848MinimumGrant=0 1849PMCAPBaseOffset=0 1850PMCAPCapId=0 1851PMCAPCapabilities=0 1852PMCAPCtrlStatus=0 1853PMCAPNextCapability=0 1854PXCAPBaseOffset=0 1855PXCAPCapId=0 1856PXCAPCapabilities=0 1857PXCAPDevCap2=0 1858PXCAPDevCapabilities=0 1859PXCAPDevCtrl=0 1860PXCAPDevCtrl2=0 1861PXCAPDevStatus=0 1862PXCAPLinkCap=0 1863PXCAPLinkCtrl=0 1864PXCAPLinkStatus=0 1865PXCAPNextCapability=0 1866ProgIF=133 1867Revision=0 1868Status=640 1869SubClassCode=1 1870SubsystemID=0 1871SubsystemVendorID=0 1872VendorID=32902 1873clk_domain=system.clk_domain 1874config_latency=20000 1875ctrl_offset=0 1876disks=system.disk0 system.disk2 1877eventq_index=0 1878io_shift=0 1879pci_bus=0 1880pci_dev=0 1881pci_func=0 1882pio_latency=30000 1883platform=system.tsunami 1884system=system 1885config=system.iobus.master[26] 1886dma=system.iobus.slave[1] 1887pio=system.iobus.master[25] 1888 1889[system.tsunami.io] 1890type=TsunamiIO 1891clk_domain=system.clk_domain 1892eventq_index=0 1893frequency=976562500 1894pio_addr=8804615847936 1895pio_latency=100000 1896system=system 1897time=Thu Jan 1 00:00:00 2009 1898tsunami=system.tsunami 1899year_is_bcd=false 1900pio=system.iobus.master[22] 1901 1902[system.tsunami.pchip] 1903type=TsunamiPChip 1904clk_domain=system.clk_domain 1905eventq_index=0 1906pio_addr=8802535473152 1907pio_latency=100000 1908system=system 1909tsunami=system.tsunami 1910pio=system.iobus.master[1] 1911 1912[system.tsunami.pciconfig] 1913type=PciConfigAll 1914bus=0 1915clk_domain=system.clk_domain 1916eventq_index=0 1917pio_addr=0 1918pio_latency=30000 1919platform=system.tsunami 1920size=16777216 1921system=system 1922pio=system.iobus.default 1923 1924[system.tsunami.uart] 1925type=Uart8250 1926clk_domain=system.clk_domain 1927eventq_index=0 1928pio_addr=8804615848952 1929pio_latency=100000 1930platform=system.tsunami 1931system=system 1932terminal=system.terminal 1933pio=system.iobus.master[23] 1934 1935[system.voltage_domain] 1936type=VoltageDomain 1937eventq_index=0 1938voltage=1.000000 1939 1940