rubytest-ruby.py revision 9790:ccc428657233
15353Svilas.sridharan@gmail.com# Copyright (c) 2006-2007 The Regents of The University of Michigan
23395Shsul@eecs.umich.edu# Copyright (c) 2009 Advanced Micro Devices, Inc.
33395Shsul@eecs.umich.edu# All rights reserved.
43395Shsul@eecs.umich.edu#
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63395Shsul@eecs.umich.edu# modification, are permitted provided that the following conditions are
73395Shsul@eecs.umich.edu# met: redistributions of source code must retain the above copyright
83395Shsul@eecs.umich.edu# notice, this list of conditions and the following disclaimer;
93395Shsul@eecs.umich.edu# redistributions in binary form must reproduce the above copyright
103395Shsul@eecs.umich.edu# notice, this list of conditions and the following disclaimer in the
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133395Shsul@eecs.umich.edu# contributors may be used to endorse or promote products derived from
143395Shsul@eecs.umich.edu# this software without specific prior written permission.
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263395Shsul@eecs.umich.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
273395Shsul@eecs.umich.edu#
283395Shsul@eecs.umich.edu# Authors: Ron Dreslinski
293395Shsul@eecs.umich.edu#          Brad Beckmann
303395Shsul@eecs.umich.edu
313395Shsul@eecs.umich.eduimport m5
325869Sksewell@umich.edufrom m5.objects import *
335361Srstrong@cs.ucsd.edufrom m5.defines import buildEnv
343395Shsul@eecs.umich.edufrom m5.util import addToPath
354455Ssaidi@eecs.umich.eduimport os, optparse, sys
364968Sacolyte@umich.edu
373395Shsul@eecs.umich.edu# Get paths we might need.  It's expected this file is in m5/configs/example.
383395Shsul@eecs.umich.educonfig_path = os.path.dirname(os.path.abspath(__file__))
393395Shsul@eecs.umich.educonfig_root = os.path.dirname(config_path)
403395Shsul@eecs.umich.edum5_root = os.path.dirname(config_root)
416641Sksewell@umich.eduaddToPath(config_root+'/configs/common')
426144Sksewell@umich.eduaddToPath(config_root+'/configs/ruby')
436144Sksewell@umich.eduaddToPath(config_root+'/configs/topologies')
443395Shsul@eecs.umich.edu
453395Shsul@eecs.umich.eduimport Ruby
463395Shsul@eecs.umich.eduimport Options
473395Shsul@eecs.umich.edu
485361Srstrong@cs.ucsd.eduparser = optparse.OptionParser()
495361Srstrong@cs.ucsd.eduOptions.addCommonOptions(parser)
505361Srstrong@cs.ucsd.edu
515361Srstrong@cs.ucsd.edu# Add the ruby specific and protocol specific options
525361Srstrong@cs.ucsd.eduRuby.define_options(parser)
535361Srstrong@cs.ucsd.edu
545361Srstrong@cs.ucsd.edu(options, args) = parser.parse_args()
555361Srstrong@cs.ucsd.edu
563395Shsul@eecs.umich.edu#
573395Shsul@eecs.umich.edu# Set the default cache size and associativity to be very small to encourage
583395Shsul@eecs.umich.edu# races between requests and writebacks.
593395Shsul@eecs.umich.edu#
605361Srstrong@cs.ucsd.eduoptions.l1d_size="256B"
615361Srstrong@cs.ucsd.eduoptions.l1i_size="256B"
623445Shsul@eecs.umich.eduoptions.l2_size="512B"
635361Srstrong@cs.ucsd.eduoptions.l3_size="1kB"
645361Srstrong@cs.ucsd.eduoptions.l1d_assoc=2
656769SBrad.Beckmann@amd.comoptions.l1i_assoc=2
665361Srstrong@cs.ucsd.eduoptions.l2_assoc=2
675361Srstrong@cs.ucsd.eduoptions.l3_assoc=2
685361Srstrong@cs.ucsd.edu
695361Srstrong@cs.ucsd.edu# Turn on flush check for the hammer protocol
705361Srstrong@cs.ucsd.educheck_flush = False
715361Srstrong@cs.ucsd.eduif buildEnv['PROTOCOL'] == 'MOESI_hammer':
725361Srstrong@cs.ucsd.edu    check_flush = True
735361Srstrong@cs.ucsd.edu
745361Srstrong@cs.ucsd.edu#
755361Srstrong@cs.ucsd.edu# create the tester and system, including ruby
765361Srstrong@cs.ucsd.edu#
775361Srstrong@cs.ucsd.edutester = RubyTester(check_flush = check_flush, checks_to_complete = 100,
785361Srstrong@cs.ucsd.edu                    wakeup_frequency = 10, num_cpus = options.num_cpus)
795361Srstrong@cs.ucsd.edu
805361Srstrong@cs.ucsd.edusystem = System(tester = tester, physmem = SimpleMemory(null = True))
815361Srstrong@cs.ucsd.edusystem.clock = options.sys_clock
825361Srstrong@cs.ucsd.edu
835361Srstrong@cs.ucsd.eduRuby.create_system(options, system)
84
85assert(options.num_cpus == len(system.ruby._cpu_ruby_ports))
86
87#
88# The tester is most effective when randomization is turned on and
89# artifical delay is randomly inserted on messages
90#
91system.ruby.randomization = True
92
93for ruby_port in system.ruby._cpu_ruby_ports:
94    #
95    # Tie the ruby tester ports to the ruby cpu read and write ports
96    #
97    if ruby_port.support_data_reqs:
98         tester.cpuDataPort = ruby_port.slave
99    if ruby_port.support_inst_reqs:
100         tester.cpuInstPort = ruby_port.slave
101
102    #
103    # Tell the sequencer this is the ruby tester so that it
104    # copies the subblock back to the checker
105    #
106    ruby_port.using_ruby_tester = True
107
108# -----------------------
109# run simulation
110# -----------------------
111
112root = Root(full_system = False, system = system )
113root.system.mem_mode = 'timing'
114
115# Not much point in this being higher than the L1 latency
116m5.ticks.setGlobalFrequency('1ns')
117