realview-simple-atomic-dual.py revision 8713:2f1a3e335255 
1# Copyright (c) 2006-2007 The Regents of The University of Michigan
2# All rights reserved.
3#
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13# this software without specific prior written permission.
14#
15# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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26#
27# Authors: Steve Reinhardt
28
29import m5
30from m5.objects import *
31m5.util.addToPath('../configs/common')
32import FSConfig
33from Benchmarks import *
34
35# --------------------
36# Base L1 Cache
37# ====================
38
39class L1(BaseCache):
40    latency = '1ns'
41    block_size = 64
42    mshrs = 4
43    tgts_per_mshr = 8
44    is_top_level = True
45
46# ----------------------
47# Base L2 Cache
48# ----------------------
49
50class L2(BaseCache):
51    block_size = 64
52    latency = '10ns'
53    mshrs = 92
54    tgts_per_mshr = 16
55    write_buffers = 8
56
57# ---------------------
58# I/O Cache
59# ---------------------
60class IOCache(BaseCache):
61    assoc = 8
62    block_size = 64
63    latency = '50ns'
64    mshrs = 20
65    size = '1kB'
66    tgts_per_mshr = 12
67    addr_range=AddrRange(0, size='256MB')
68    forward_snoops = False
69
70#cpu
71cpus = [AtomicSimpleCPU(cpu_id=i) for i in xrange(2) ]
72#the system
73system = FSConfig.makeArmSystem('atomic', "RealView_PBX", None, False)
74system.iocache = IOCache()
75system.iocache.cpu_side = system.iobus.port
76system.iocache.mem_side = system.membus.port
77
78system.cpu = cpus
79#create the l1/l2 bus
80system.toL2Bus = Bus()
81
82#connect up the l2 cache
83system.l2c = L2(size='4MB', assoc=8)
84system.l2c.cpu_side = system.toL2Bus.port
85system.l2c.mem_side = system.membus.port
86system.l2c.num_cpus = 2
87
88#connect up the cpu and l1s
89for c in cpus:
90    c.addPrivateSplitL1Caches(L1(size = '32kB', assoc = 1),
91                                L1(size = '32kB', assoc = 4))
92    # connect cpu level-1 caches to shared level-2 cache
93    c.connectAllPorts(system.toL2Bus, system.membus)
94    c.clock = '2GHz'
95
96
97root = Root(system=system)
98m5.ticks.setGlobalFrequency('1THz')
99
100